ONSEMI D44C12

D45C12 (PNP),
D44C12 (NPN)
Complementary Silicon
Power Transistor
The D45C12 and D44C12 arefor general purpose driver or
medium power output stages in CW or switching applications.
Features
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4.0 AMPERE COMPLEMENTARY
SILICON POWER
TRANSISTORS 80 VOLTS
•Low Collector-Emitter Saturation Voltage - 0.5 V (Max)
•High ft for Good Frequency Response
•Low Leakage Current
•Pb-Free Packages are Available*
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4
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Collector-Emitter Voltage
VCEO
80
Vdc
Collector-Emitter Voltage
VCES
90
Vdc
Emitter Base Voltage
VEB
5.0
Vdc
Collector Current - Continuous
Peak (Note 1)
IC
4.0
6.0
Adc
Total Power Dissipation @ TC = 25°C
Total Power Dissipation @ TA = 25°C
PD
30
1.67
W
W/°C
TJ, Tstg
-55 to 150
°C
Operating and Storage Junction
Temperature Range
TO-220AB
CASE 221A
STYLE 1
1
2
3
MARKING DIAGRAM
& PIN ASSIGNMENT
4
Collector
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
Thermal Resistance,
Junction-to-Case
RqJC
4.2
°C/W
Thermal Resistance,
Junction-to-Ambient
RqJA
75
°C/W
TL
275
°C
Maximum Lead Temperature for Soldering
Purposes: 1/8 in from Case for 5 Sec
1. Pulse Width v 6.0 ms, Duty Cycle v 50%.
D4xC12G
AYWW
1
Base
3
Emitter
2
Collector
x
A
Y
WW
G
= 4 or 5
= Assembly Location
= Year
= Work Week
= Pb-Free Package
ORDERING INFORMATION
*For additional information on our Pb-Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2007
November, 2007 - Rev. 2
1
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Publication Order Number:
D45C12/D
D45C12 (PNP), D44C12 (NPN)
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ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristic
Symbol
DC Current Gain
(VCE = 1.0 Vdc, IC = 0.2 Adc)
(VCE = 1.0 Vdc, IC = 1.0 Adc)
(VCE = 1.0 Vdc, IC = 2.0 Adc)
Min
Max
40
20
20
120
-
Unit
hFE
-
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
Collector Cutoff Current (VCE = Rated VCES, VBE = 0)
ICES
-
-
0.1
mA
Emitter Cutoff Current (VEB = 5.0 Vdc)
IEBO
-
-
10
mA
Collector-Emitter Saturation Voltage (IC = 1.0 Adc, IB = 50 mAdc)
VCE(sat)
-
0.135
0.5
Vdc
Base-Emitter Saturation Voltage (IC = 1.0 Adc, IB = 100 mAdc)
VBE(sat)
-
0.85
1.3
Vdc
Ccb
-
125
-
pF
fT
-
40
-
MHz
td + tr
-
50
75
ns
Storage Time (IC = 1.0 Adc, IB1 = IB2 = 0.1 Adc)
ts
-
350
550
ns
Fall Time (IC = 1.0 Adc, IB1 = IB2 = 0.1 Adc)
tf
-
50
75
ns
OFF CHARACTERISTICS
ON CHARACTERISTICS
DYNAMIC CHARACTERISTICS
Collector Capacitance (VCB = 10 Vdc, f = 1.0 MHz)
Gain Bandwidth Product (IC = 20 mA, VCE = 4.0 Vdc, f = 20 MHz)
SWITCHING TIMES
Delay and Rise Times (IC = 1.0 Adc, IB1 = 0.1 Adc)
ORDERING INFORMATION
Device
Shipping†
Package
D45C12
TO-220AB
D45C12G
TO-220AB
(Pb-Free)
D44C12
TO-220AB
D44C12G
TO-220AB
(Pb-Free)
50 Units / Rail
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
200
IC, COLLECTOR CURRENT (AMPS)
hFE, DC CURRENT GAIN
VCE = 1.0 Vdc
TJ = 25°C
100
90
80
70
60
50
40
30
20
0.04
0.07 0.1
0.2 0.3 0.4
0.7 1.0
IC, COLLECTOR CURRENT (AMPS)
2.0
10
5.0
3.0
2.0
0.1 ms
dc
1.0
0.5
0.3
0.2
0.1
1.0 ms
TC ≤ 70°C
DUTY CYCLE ≤ 50%
0.05
0.03
0.02
0.01
1.0
3.0 4.0
1.0 ms
10 ms
2.0
3.0
5.0 7.0 10
20
30
50
70 100
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 1. Typical DC Current Gain
Figure 2. Maximum Rated Forward Bias
Safe Operating Area
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2
D45C12 (PNP), D44C12 (NPN)
PACKAGE DIMENSIONS
TO-220
CASE 221A-09
ISSUE AE
-TB
SEATING
PLANE
C
F
T
S
4
DIM
A
B
C
D
F
G
H
J
K
L
N
Q
R
S
T
U
V
Z
A
Q
1 2 3
U
H
K
Z
L
R
V
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
J
G
D
INCHES
MIN
MAX
0.570
0.620
0.380
0.405
0.160
0.190
0.025
0.035
0.142
0.161
0.095
0.105
0.110
0.155
0.014
0.025
0.500
0.562
0.045
0.060
0.190
0.210
0.100
0.120
0.080
0.110
0.045
0.055
0.235
0.255
0.000
0.050
0.045
----0.080
MILLIMETERS
MIN
MAX
14.48
15.75
9.66
10.28
4.07
4.82
0.64
0.88
3.61
4.09
2.42
2.66
2.80
3.93
0.36
0.64
12.70
14.27
1.15
1.52
4.83
5.33
2.54
3.04
2.04
2.79
1.15
1.39
5.97
6.47
0.00
1.27
1.15
----2.04
N
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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3
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Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
D45C12/D