NJRC NJU8754 Analog signal input monaural class d power amplifier Datasheet

NJU8754
PRELIMINARY
Analog Signal Input Monaural Class D Power Amplifier
GENERAL DESCRIPTION
PACKAGE OUTLINE
The NJU8754 is an analog signal input monaural
class D power amplifier. The NJU8754 includes
Inversion operatinal amplifier input circuit, PWM
modulator, an output-short protector and a low voltage
detector. The NJU8754 incorporates BTL amplifier,
which eliminate AC coupling capacitors, capable of
driving up to 0.6W at 3.6V supply voltage with simple
external LC low-pass filters.
The NJU8754 features high power-efficiency by
class-D operation and very small package, and is suited
for cellular phone, PDA, etc.
NJU8754V
NJU8754KM1
FEATURES
Monaural Analog Signal Input
Monaural BTL Output
:1.2W at 5V into 8Ohms
:0.6W at 3.6V into 8Ohms
Standby(Hi-Z), Mute Control
Built-in Short Protector
Built-in Low Voltage Detector
Operating Voltage
:2.7 ~ 5.25V
CMOS Technology
Package Outline
:SSOP10, QFN20
15
NC
OUTP
VDDO
OUTN
NC
PIN CONFIGURATION
11
16
1
2
3
4
5
10
9
8
7
6
SSOP10
VSS
OUTP
VDDO
OUTN
VSS
VSS
VSS
NC
STBY
NC
20
6
1
NC
IN
COM
MUTE
NC
VDD
IN
COM
MUTE
STBY
10
VSS
VSS
NC
VDD
NC
5
QFN20
Ver.2003-03-12
-1-
NJU8754
BLOCK DIAGRAM
VDD
IN
VSS
-
OUTP
+
Pulse
Width
Modulator
-
VDDO
+
COM
OUTN
Short
Protection
Soft Start
Control
MUTE
Low BATT
Protection
Logic
STBY
PIN DESCRIPTION
No.
SSOP10
1
2
3
QFN20
19
2
3
SYMBOL
I/O
VDD
IN
COM
−
I
−
FUNCTION
Power supply : VDD=3.6V
Signal input
Analog common
Mute control
4
4
MUTE
I
Low : Mute ON High : Mute OFF
Standby control
5
7
STBY
I
Low : Standby ON High : Standby OFF
6
9,10
VSS
−
Power GND : VSS=0V
7
12
OUTN
O
Negative output
8
13
VDDO
−
Output power supply
9
14
OUTP
O
Positive output
10
16,17
VSS
−
Power GND : VSS=0V
−
1,5,6,8,11,15,18,20
NC
−
Non connection
*The relations of ”VSS= 0V” and “VDD= VDDO” must be maintained.
*VSS(SSOP10:Pin No.6,10, QFN20:Pin No.9,10,16,17) should be connected at a nearest point to the IC.
*VDDO(SSOP10:Pin No.8, QFN20:Pin No.13) should be connected at a nearest point to the IC.
*MUTE(SSOP10, QFN20:Pin No.4) and STBY(SSOP10:Pin No.5, QFN20:Pin No.7) must be connected
to VDD, when these pins are not used.
-2-
Ver.2003-03-12
NJU8754
NJU3555
FUNCTIONAL DESCRIPTION
(1) Signal Output
The OUTP and OUTN generate PMW output signal, which will be converted to analog signal via external
2nd-order or higher LC filter. A switching regulator with a high response against a voltage fluctuation is the best
selection for the VDDO, which is the power supply for output driver. To obtain better T.H.D. performance, the
stabilization of the power is required.
(2) Standby
By setting the STBY pin to “L”, the standby mode is enabled. In the standby mode, the entire functions of the
NJU8754 enter a low-power state, and the output pins(OUTP and OUTN) are in high impedance.
(3) Mute
By setting the MUTE pin to “L”, the Mute function is enabled, and the output pins(OUTP and OUTN) output
square wave(Duty: 50%).
(4) Low Voltage Detector
When the power supply voltage drops down to below VDD(MIN), the internal oscillation is halted not to
generate unwanted frequency, and the output pins(OUTP and OUTN) become in high impedance.
(5) Short Protection Circuit
The short protector, which protects the NJU8754 from high short-circuit current, turns off the output driver.
After about 5 seconds from the protection, the NJU8754 returns to normal operation. The short protector is
enabled in response to following accidents.
Short between OUTP and OUTN
Short between OUTP and VSS
Short between OUTN and VSS
Note 1)
The detectable current and the period for the protection depend on the power supply voltage and
ambient temperature.
Note 2) The short protector is not effective for a long term short-circuit but for an instantaneous accident.
Continuous high-current may cause permanent damage to NJU8754.
Ver.2003-03-12
-3-
NJU8754
ABSOLUTE MAXIMUM RATINGS
(Ta=25°C)
PARAMETER
SYMBOL
RATING
UNIT
Input Voltage
Operating Temperature
Storage Temperature
VDD
VDDO
Vin
Topr
Tstg
V
V
V
°C
°C
Power Dissipation
PD
-0.3 ~ +5.5
-0.3 ~ +5.5
-0.3 ~ VDD+0.3
-40 ~ +85
-40 ~ +125
250 (SSOP10)
TBD(QFN20)
Supply Voltage
mW
Note 1) All voltage are relative to “VSS= 0V” reference.
Note 2) The LSI must be used inside of the “Absolute maximum ratings”. Otherwise, a stress may cause
permanent damage to the LSI.
Note 3) De-coupling capacitors for VDD-VSS and VDDO-VSS should be connected for stable operation.
Note 4)
Power Dissipation
The class-D amplifiers are more power efficient, and dissipate power less than general
analog-amplifiers. In theory, the NJU8754 actualize quite high output-power such as 1.2W at =5V
operation with 8ohms load, it looks as if the NJU8754 exceeds the absolute maximum rating of the power
dissipation. However, in practice, the effective output-power of usual music sound is only about 1/10 of its
maximum output power, thus it may never exceed the absolute maximum rating.
The maximum power dissipation in the system is calculated, as shown below.
Pdmax(W) = (Tjmax(°C) - Ta(°C)) /θja
Pdmax: Maximum Power Dissipation, Tjmax: Junction Temperature = 125°C
Ta: Ambient Temperature, θja: Thermal Resistance of package(SSOP10) = 400°C/W
Power dissipation of the NJU8754 itself is calculated, as shown below.
Pd(W) = PO(W) X RO(Ω) / RL(Ω) + PdIC(W)
Pd: Power Dissipation, PO: Output Power, RO: Internal Resistance(output driver)
RL: Load Resistance, PdIC: Power of internal circuit
-4-
Ver.2003-03-12
NJU8754
NJU3555
ELECTRICAL CHARACTERISTICS
(Ta=25°C, VDD=VDDO= 3.6V, VSS= 0V, Input Signal=1kHz,
Input Signal Level=200mVrms, Frequency Band=20Hz~20kHz,
Load Impedance=8Ω, 2nd-order 34kHz LC Filter(Q=0.85))
PARAMETER
VDD,VDDO Supply Voltage
Input Impedance
Voltage Gain
Output Power Efficiency
SYMBOL
VDD
ZIN
AV
Eeff
THD
Output THD
Po
Output Power
S/N
Operating Current (Standby)
Operating Current
(No signal input)
Input Voltage
Input Leakage Current
Note 5)
SN
IST
IDD
VIH
VIL
ILK
CONDITIONS
IN pin
Output THD=10%
VDD=VDDO=5.0V, Po=600mW
VDD=VDDO=3.6V, Po=300mW
VDD=VDDO=5.0V
Output THD=10%
VDD=VDDO=3.6V
Output THD=10%
A weight
VDD=VDDO=5.0V
No Filter, No Load
VDD=VDDO=3.6V
No Filter, No Load
MUTE, STBY pins
MUTE, STBY pins
MUTE, STBY pins
MIN
2.7
80
TYP
3.6
20
23
83
0.05
0.07
MAX
5.25
0.08
0.1
UNIT
V
kΩ
dB
%
Note
4
%
1.2
W
0.6
75
-
80
-
1
4
6
2.5
5
-
VDD
0.3VDD
±0.1
dB
µA
mA
0.7VDD
0
-
V
V
µA
Test system of the output THD and S/N
The output THD and S/N are tested in the system shown in Figure1, where a 2nd-order LC LPF and
another filter incorporated in an audio analyzer are used.
Input Signal
NJU8754
2nd-order
LC LPF
Filter
20kHz
(AES17)
NJU8754 Test Board
THD
Measuring
Apparatus
Audio Analyzer
Figure 1. Output THD and S/N Test System
2nd-order LPF
Filters
Ver.2003-03-12
: fc=34kHz / Refer to “Typical Application Circuit”.
: 22Hz HPF + 20kHz LPF(AES17)
(with the A-Weight filter for S/N and Dynamic-range tests)
-5-
NJU8754
TYPICAL APPLICATION CIRCUIT
22µH
10µF 0.1µF
VDD
OUTP(9)
VSS(10)
2.2µF
IN
IN(2)
10µF
COM(3)
NJU8754
VDD(1)
1µF
22µH
OUTN(7)
VDDO(8)
8Ω Speaker
1µF
0.1µF 47µF
VDD
VSS(6)
MUTE(4)
STBY(5)
SSOP10
22µH
10µF 0.1µF
VDD
OUTP(14)
VSS(16,17)
2.2µF
IN
IN(2)
10µF
COM(3)
NJU8754
VDD(19)
1µF
22µH
OUTN(12)
VDDO(13)
0.1µF 47µF
8Ω Speaker
1µF
VDD
VSS(9,10)
MUTE(4)
STBY(7)
QFN20
Note 6)
Note 7)
Note 8)
Note 9)
Note10)
De-coupling capacitors must be connected between each power supply pin and GND.
The capacity value should be adjusted on the application circuit and the operation temperature. It may
malfunction if capacity value is small.
The power supply for VDDO requires fast driving response performance such as a switching regulator for
better THD.
THD performance becomes worse by ripple if the capacity of De-coupling capacitor is small.
The above circuit shows only application example and does not guarantee the any electrical
characteristics. Therefore, please test the circuit carefully to fit your application.
The cutoff frequency of the LC filter influences the quality of sound.
The Q factor of the LC filter must be less than “1”. Otherwise, the operating current increases when the
frequency of input signal is closed to the cutoff frequency.
The transition time for MUTE and STBY signals must be less than 100µs. Otherwise, a malfunction
may be occurred.
(1) – (19) indicates pin number.
[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
the industrial rights.
-6-
Ver.2003-03-12
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