ONSEMI MJ10023

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SEMICONDUCTOR TECHNICAL DATA
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40 AMPERE
NPN SILICON
POWER DARLINGTON
TRANSISTOR
400 VOLTS
250 WATTS
The MJ10023 Darlington transistor is designed for high–voltage, high–speed,
power switching in inductive circuits where fall time is critical. It is particularly suited
for line–operated switchmode applications such as:
•
•
•
•
•
AC and DC Motor Controls
Switching Regulators
Inverters
Solenoid and Relay Drivers
Fast Turn–Off Times
150 ns Inductive Fall Time @ 25_C (Typ)
300 ns Inductive Storage Time @ 25_C (Typ)
• Operating Temperature Range – 65 to + 200_C
• 100_C Performance Specified for:
Reversed Biased SOA with Inductive Loads
Switching Times with Inductive Loads
Saturation Voltages
Leakage Currents
CASE 197A–05
TO–204AE (TO–3)
≈ 100
≈ 15
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MAXIMUM RATINGS
Symbol
Max
Unit
Collector–Emitter Voltage
Rating
VCEO
400
Vdc
Collector–Emitter Voltage
VCEV
600
Vdc
Emitter Base Voltage
VEB
80
Vdc
Collector Current — Continuous
— Peak (1)
IC
ICM
40
80
Adc
Base Current — Continuous
— Peak (1)
IB
IBM
20
40
Adc
Total Power Dissipation @ TC = 25_C
@ TC = 100_C
Derate above 25_C
PD
250
143
1.43
Watts
TJ, Tstg
– 65 to + 200
_C
Symbol
Max
Unit
RθJC
0.7
_C/W
TL
275
_C
Operating and Storage Junction Temperature Range
W/_C
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance, Junction to Case
Maximum Lead Temperature for Soldering
Purposes: 1/8″ from Case for 5 Seconds
(1) Pulse Test: Pulse Width = 5 ms, Duty Cycle
v 10%.
Designer’s and SWITCHMODE are trademarks of Motorola, Inc.
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
 Motorola, Inc. 1998
Motorola Bipolar Power Transistor Device Data
1
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v
MJ10023
ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
400
—
—
—
—
—
—
0.25
5.0
Unit
OFF CHARACTERISTICS
Collector–Emitter Sustaining Voltage (Table 1)
(IC = 100 mA, IB = 0)
VCEO(sus)
Vdc
Collector Cutoff Current
(VCEV = Rated Value, VBE(off) = 1.5 Vdc)
(VCEV = Rated Value, VBE(off) = 1.5 Vdc, TC = 150_C)
ICEV
mAdc
Collector Cutoff Current
(VCE = Rated VCEV, RBE = 50 Ω, TC = 100_C)
ICER
—
—
5.0
mAdc
Emitter Cutoff Current
(VEB = 2.0 V, IC = O)
IEBO
—
—
175
mAdc
SECOND BREAKDOWN
Second Breakdown Collector Current with Base Forward Biased
Clamped Inductive SOA with Base Reverse Biased
IS/b
See Figure 13
RBSOA
See Figure 14
ON CHARACTERISTICS (1)
DC Current Gain
(IC = 10 Adc, VCE = 5.0 V)
hFE
50
—
600
—
—
—
—
—
—
2.2
5.0
2.5
—
—
—
—
2.5
2.5
Vf
—
2.5
5.0
Vdc
Cob
150
—
600
pF
td
—
0.03
0.2
µs
Collector–Emitter Saturation Voltage
(IC = 20 Adc, IB = 1.0 Adc)
(IC = 40 Adc, IB = 5.0 Adc)
(IC = 20 Adc, IB = 10 Adc, TC = 100_C)
VCE(sat)
Base–Emitter Saturation Voltage
(IC = 20 Adc, IB = 1.2 Adc)
(IC = 20 Adc, IB = 1.2 Adc, TC = 100_C)
VBE(sat)
Diode Forward Voltage
(IF = 20 Adc)
—
Vdc
Vdc
DYNAMIC CHARACTERISTICS
Output Capacitance
(VCB = 10 Vdc, IE = 0, ftest = 1.0 kHz)
SWITCHING CHARACTERISTICS
Resistive Load (Table 1)
Delay Time
Rise Time
Storage Time
(VCC = 250 Vdc,
1.0
Adc,
Vd IC = 20 A,
A IB1 = 1
0 Ad
0V
µs
VBE(off) = 5
5.0
V, tp = 50 µs,
Dutyy Cycle
2.0%))
y
Fall Time
tr
—
0.4
1.2
µs
ts
—
0.9
2.5
µs
tf
—
0.3
0.9
µs
tsv
—
1.9
4.4
µs
tc
—
0.6
2.0
µs
tfi
—
0.3
—
µs
tsv
—
1.0
—
µs
tc
—
0.3
—
µs
tfi
—
0.15
—
µs
Inductive Load, Clamped (Table 1)
Storage Time
Crossover Time
(ICM = 20 A,
A VCEM = 250 V,
V IB1 = 1
1.0
0A
A,
VBE(off) = 5 V, TC = 100_C)
Fall Time
Storage Time
Crossover Time
(ICM = 20 A,
A VCEM = 250 V,
V IB1 = 1
1.0
0A
A,
VBE(off) = 5 V, TC = 25_C)
Fall Time
(1) Pulse Test: PW = 300 µs, Duty Cycle
2
2%.
Motorola Bipolar Power Transistor Device Data
MJ10023
VCE , COLLECTOR–EMITTER VOLTAGE (VOLTS)
TYPICAL ELECTRICAL CHARACTERISTICS
300
TJ = 100°C
hFE, DC CURRENT GAIN
200
TJ = 25°C
100
50
VCE = 5 V
30
0.4
1.0
10
2.0
5.0
IC, COLLECTOR CURRENT (AMPS)
TJ = 100°C
4.5
4.0
3.5
3.0
IC = 40 A
2.5
2.0
IC = 20 A
1.5
IC = 10 A
1.0
0.5
0.01 0.02
40
20
5.0
0.2
0.5 1.0
0.1
IB, BASE CURRENT (AMP)
2.0
5.0
10
Figure 2. Collector Saturation Region
3.0
3.0
2.7
2.7
IC/IB = 10
2.4
VBE(sat), BASE–EMITTER
VCE , COLLECTOR–EMITTER VOLTAGE (VOLTS)
Figure 1. DC Current Gain
0.05
2.1
1.8
1.5
1.2
VCE @ 25°C
0.9
0.6
IC/IB = 10
2.4
2.1
1.8
VBE @ 25°C
1.5
1.2
VBE @ 100°C
0.9
0.6
VCE @ 100°C
0.3
0.3
0.4
1.0
2.0
5.0
10
20
0.4
40
1.0
2.0
5.0
10
20
IC, COLLECTOR CURRENT (AMPS)
IC, COLLECTOR CURRENT (AMPS)
Figure 3. Collector–Emitter Saturation Voltage
Figure 4. Base–Emitter Saturation Voltage
104
40
400
103
102
C, CAPACITANCE (pF)
IC, COLLECTOR CURRENT ( µA)
VCE = 250 V
TJ = 125°C
100°C
101
75°C
200
100
100
25°C
10 –1
– 0.2
50
40
0
+ 0.2
+ 0.4
+ 0.6
+ 0.8
4.5
10
20
50
100
200
VBE, BASE–EMITTER VOLTAGE (VOLTS)
VR, REVERSE VOLTAGE (VOLTS)
Figure 5. Collector Cutoff Region
Figure 6. Cob, Output Capacitance
Motorola Bipolar Power Transistor Device Data
400
3
MJ10023
Table 1. Test Conditions for Dynamic Performance
VCEO(sus)
RBSOA AND INDUCTIVE SWITCHING
RESISTIVE SWITCHING
INDUCTIVE TEST CIRCUIT
TURN–ON TIME
20 Ω
1
INPUT
CONDITIONS
1
5V
1
SEE ABOVE FOR
DETAILED CONDITIONS
IB1
Rcoil
1N4937
OR
EQUIVALENT
INPUT
2
PW Varied to Attain
IC = 100 mA
CIRCUIT
VALUES
2
TUT
0
Lcoil
Vclamp
IB1 adjusted to
obtain the forced
hFE desired
VCC
TURN–OFF TIME
RS =
0.1 Ω
2
Use inductive switching
driver as the input to
the resistive test circuit.
Lcoil = 180 µH
Rcoil = 0.05 Ω
VCC = 20 V
Lcoil = 10 mH, VCC = 10 V
Rcoil = 0.7 Ω
Vclamp = VCEO(sus)
VCC = 250 V
RL = 12.5 Ω
Pulse Width = 25 µs
ICM
tf Clamped
t
t1
tf
t1
t2
VCEM
Vclamp
t
TIME
t2
VCEM
90% VCEM
RL
1
2
VCC
(ICM)
[ Lcoil
Vclamp
Test Equipment
Scope — Tektronix
475 or Equivalent
tsv
Vclamp
90% ICM
trv
tfi
tti
tc
VCE
IB
[
TUT
Lcoil (ICM)
VCC
10
ICM
IC
RESISTIVE TEST CIRCUIT
t1 Adjusted to
Obtain IC
10% VCEM
10%
ICM
90% IB1
2% IC
9.0
I B2(pk), BASE CURRENT (AMPS)
TEST CIRCUITS
OUTPUT WAVEFORMS
8.0
7.0
6.0
5.0
4.0
IC = 20 A
IB1 = 1 A
Vclamp = 250 V
TJ = 25°C
3.0
2.0
1.0
TIME
0
Figure 7. Inductive Switching Measurements
1.0
5.0
6.0
7.0
2.0
3.0
4.0
VBE(off), REVERSE BASE VOLTAGE (VOLTS)
Figure 8. Typical Peak Reverse Base Current
2.0
ICM = 20 A
IB1 = 1 A
VCEM = 250 V
tsv @ 100°C
1.75
t, TIME ( µs)
1.5
1.25
tc @ 100°C
1.0
tsv @ 25°C
0.75
0.5
tc @ 25°C
0.25
0
0
1.0
5.0
6.0
7.0
2.0
3.0
4.0
VBE(off), BASE–EMITTER VOLTAGE (VOLTS)
8.0
Figure 9. Typical Inductive Switching Times
4
Motorola Bipolar Power Transistor Device Data
8.0
MJ10023
SWITCHING TIMES NOTE
In resistive switching circuits, rise, fall, and storage times
have been defined and apply to both current and voltage
waveforms since they are in phase. However, for inductive
loads which are common to SWITCHMODE power supplies
and hammer drivers, current and voltage waveforms are not
in phase. Therefore, separate measurements must be made
on each waveform to determine the total switching time. For
this reason, the following new terms have been defined.
tsv = Voltage Storage Time, 90% IB1 to 10% VCEM
trv = Voltage Rise Time, 10 – 90% VCEM
tfi = Current Fall Time, 90 – 10% ICM
tti = Current Tail, 10 – 2% ICM
tc = Crossover Time, 10% VCEM to 10% ICM
An enlarged portion of the inductive switching waveform is
shown in Figure 7 to aid on the visual identity of these terms.
For the designer, there is minimal switching loss during
storage time and the predominant switching power losses
occur during the crossover interval and can be obtained using the standard equation from AN–222A:
PSWT = 1/2 VCCIC(tc)f
In general, t rv + t fi
t c . However, at lower test currents this
relationship may not be valid.
As is common with most switching transistors, resistive
switching is specified at 25_C and has become a benchmark
for designers. However, for designers of high frequency converter circuits, the user orinented specifications which make
this a “SWITCHMODE” transistor are the inductive switching
speeds (tc and tsv) which are guaranteed at 100_C.
`
RESISTIVE SWITCHING
2.0
2.0
VCC = 250 V
IC/IB1 = 20
TJ = 25°C
1.0
1.0
ts
0.5
t, TIME ( µs)
t, TIME ( µs)
0.5
VCC = 250 V
IC/IB1 = 20
VBE(off) = 5 V
0.2
tr
0.1
tf
0.2
0.1
0.05
0.05
td
0.02
0.02
0.4
1.0
2.0
5.0
10
IC, COLLECTOR CURRENT (AMPS)
20
0.4
40
Figure 10. Typical Turn–On Switching Times
1.0
2.0
5.0
10
IC, COLLECTOR CURRENT (AMPS)
20
40
Figure 11. Typical Turn–Off Switching Times
r(t), TRANSIENT THERMAL
RESISTANCE (NORMALIZED)
1.0
0.5
0.2
0.1
D = 0.5
0.2
0.1
RθJC(t) = r(t) RθJC
RθJC = 0.7°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) – TC = P(pk) RθJC(t)
0.05
SINGLE PULSE
0.01
0.1
1.0
10
100
P(pk)
t1
t2
DUTY CYCLE, D = t1/t2
1000
10000
t, TIME (ms)
Figure 12. Thermal Response
Motorola Bipolar Power Transistor Device Data
5
MJ10023
The Safe Operating Area figures shown in Figures 13 and 14 are
specified for these devices under the test conditions shown.
SAFE OPERATING AREA INFORMATION
FORWARD BIAS
IC, COLLECTOR CURRENT (AMPS)
100
50
There are two limitations on the power handling ability of a
transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC – VCE limits of
the transistor that must be observed for reliable operation;
i.e., the transistor must not be subjected to greater dissipation than the curves indicate.
The data of Figure 13 is based on TC = 25_C; T J(pk) is
variable depending on power level. Second breakdown pulse
limits are valid for duty cycles to 10% but must be derated
when TC ≥ 25°C. Second breakdown limitations do not derate the same as thermal limitations. Allowable current at the
voltages shown on Figure 13 may be found at any case temperature by using the appropriate curve on Figure 15.
T J(pk) may be calculated from the data in Figure 12. At
high case temperatures, thermal limitations will reduce the
power that can be handled to values less than the limitations
imposed by second breakdown.
10 µs
(TURN–ON SWITCHING)
20
10
5.0
dc
2.0
1.0
0.5
TC = 25°C
0.2
0.1
0.05
0.02
0.01
1.0
BONDING WIRE LTD
THERMAL LTD
SECOND BREAKDOWN LTD
2.0
100 200 400
5.0
10
20
50
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
Figure 13. Maximum Forward Bias Safe
Operating Area
ICM , PEAK COLLECTOR CURRENT (AMPS)
REVERSE BIAS
For inductive loads, high voltage and high current must be
sustained simultaneously during turn–off, in most cases, with
the base to emitter junction reverse biased. Under these
conditions the collector voltage must be held to a safe level
at or below a specific value of collector current. This can be
accomplished by several means such as active clamping,
RC snubbing, load line shaping, etc. The safe level for these
devices is specified as Reverse Bias Safe Operating Area
and represents the voltage–current condition allowable during reverse biased turn–off. This rating is verified under
clamped conditions so that the device is never subjected to
an avalanche mode. Figure 14 gives the RBSOA characteristics.
IC/IB ≥ 20
25°C ≤ TJ ≤ 100°C
80
70
60
TURN–OFF LOAD LINE
50
40
30
20
10
0
2 V ≤ VBE(off) ≤ 8 V
RBE = 24 Ω
0
100
200
300
400
500
700
600
VCEM, PEAK COLLECTOR–EMITTER VOLTAGE (VOLTS)
Figure 14. Maximum RBSOA, Reverse Bias
Safe Operating Area
POWER DERATING FACTOR (%)
100
SECOND BREAKDOWN
DERATING
80
60
40
THERMAL
DERATING
20
0
0
40
80
120
160
200
TC, CASE TEMPERATURE (°C)
Figure 15. Power Derating
6
Motorola Bipolar Power Transistor Device Data
MJ10023
PACKAGE DIMENSIONS
A
N
C
–T–
E
D
K
2 PL
0.30 (0.012)
U
V
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
SEATING
PLANE
T Q
M
M
Y
M
–Y–
L
2
H
G
B
M
T Y
1
–Q–
0.25 (0.010)
M
DIM
A
B
C
D
E
G
H
K
L
N
Q
U
V
INCHES
MIN
MAX
1.530 REF
0.990
1.050
0.250
0.335
0.057
0.063
0.060
0.070
0.430 BSC
0.215 BSC
0.440
0.480
0.665 BSC
0.760
0.830
0.151
0.165
1.187 BSC
0.131
0.188
MILLIMETERS
MIN
MAX
38.86 REF
25.15
26.67
6.35
8.51
1.45
1.60
1.53
1.77
10.92 BSC
5.46 BSC
11.18
12.19
16.89 BSC
19.31
21.08
3.84
4.19
30.15 BSC
3.33
4.77
STYLE 1:
PIN 1. BASE
2. EMITTER
CASE: COLLECTOR
CASE 197A–05
TO–204AE (TO–3)
ISSUE J
Motorola Bipolar Power Transistor Device Data
7
MJ10023
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8
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Motorola Bipolar Power Transistor DeviceMJ10023/D
Data