Techwell™ 4-CH WD1 (960H)/D1 Compatible Video Decoders and Audio Codecs TW2964 Features Video Decoder Audio Codec WD1 (960H) and D1 compatible video decoding operation and it is programmable each channel Integrated five audio ADCs processing and one audio DAC NTSC (M, 4.43) and PAL (B, D, G, H, I, M, N, N combination), PAL (60) support with automatic format detection Provides multi-channel audio mixed analog output Software selectable analog inputs allows any of 2 CVBS per one video ADC PCM 8/16-bit and u-Law/A-Law 8-bit for audio word length Built-in analog anti-alias filter Programmable audio sample rate that covers popular frequencies of 8/16/32/44.1/48kHz Four 10-bit ADCs and analog clamping circuit for CVBS input Fully programmable static gain or automatic gain control for the Y channel Support I2S/DSP Master/Slave interface for record output and playback input Miscellaneous Two-wire MPU serial bus interface Programmable white peak control for CVBS channel Integrated clock PLL for 144/108MHz clock output 4-H adaptive comb filter Y/C separation Low power consumption PAL delay line for color phase error correction Image enhancement with peaking and CTI Digital sub-carrier PLL for accurate color decoding Digital Horizontal PLL for synchronization processing and pixel sampling Advanced synchronization processing and sync detection for handling non-standard and weak signal Power save and Power down mode Single 27MHz crystal for all standards and both WD1 and D1 format I/O Pin compatible with TW2960 (Supply pins are different) 3.3V tolerant I/O 1.0V/3.3V power supply 100-pin and 128-pin LQFP packages Programmable hue, brightness, saturation, contrast, sharpness Automatic color control and color killer ITU-R 656 like YCbCr (4:2:2) output or time multiplexed output with 36/72/144MHz for WD1 or 27/54/108MHz for D1 format 1 FN8288.1 December 5, 2012 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2012. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. VIN3B VIN4A VIN4B MUX AIN3 Decimation Filter ADC ADC 4H Comb Video Decoder ADC ADC Decimation Filter ADC ADC 4H Comb Video Decoder ADC ADC Decimation Filter ADC ADC 4H Comb Video Decoder AIN4 ADC ADC Decimation Filter AIN5 ADC Decimation Filter AOUT DAC Interpolation Filter BT.656 Interface VIN3A MUX AIN2 ADC ADC VD1[7:0] VD2[7:0] VD3[7:0] VD4[7:0] MPP Interface VIN2B 4H Comb Video Decoder MPP1 MPP2 MPP3 MPP4 Clock PLL Clock Generator VIN2A MUX AIN1 ADC ADC CLKPO XTO XTI CLKNO Host Interface VIN1B SCLK SDAT IRQ I2S Interface VIN1A MUX TW2964 ACLKR ASYNR ADATR ADATM ACLKP ASYNP ADATP FIGURE 1. TW2964 BLOCK DIAGRAM For additional products, see www.intersil.com/product_tree Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com