Fairchild FQD6N50C These n-channel enhancement mode power field effect transistors are produced using fairchild’s proprietary planar stripe, dmos technology Datasheet

®
FQD6N50C / FQU6N50C
500V N-Channel MOSFET
General Description
Features
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switched mode power supplies,
active power factor correction, electronic lamp ballasts
based on half bridge topology.
•
•
•
•
•
•
4.5A, 500V, RDS(on) = 1.2 Ω @VGS = 10 V
Low gate charge (typical 19nC)
Low Crss (typical 15pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
D
!
D
●
◀
G
S
G!
I-PAK
D-PAK
FQD Series
G D S
▲
●
●
FQU Series
!
S
Absolute Maximum Ratings
Symbol
VDSS
ID
TC = 25°C unless otherwise noted
Parameter
Drain-Source Voltage
- Continuous (TC = 25°C)
Drain Current
FQD6N50C / FQU6N50C
500
Units
V
4.5
A
- Continuous (TC = 100°C)
IDM
Drain Current
- Pulsed
(Note 1)
2.7
A
18
A
VGSS
Gate-Source Voltage
± 30
V
EAS
Single Pulsed Avalanche Energy
(Note 2)
300
mJ
IAR
Avalanche Current
(Note 1)
4.5
A
EAR
(Note 1)
dv/dt
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (TA = 25°C)*
6.1
4.5
2.5
mJ
V/ns
W
PD
Power Dissipation (TC = 25°C)
61
0.49
-55 to +150
W
W/°C
°C
300
°C
TJ, TSTG
TL
(Note 3)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
RθJC
Parameter
Thermal Resistance, Junction-to-Case
RθJA
Thermal Resistance, Junction-to-Ambient *
RθJA
Thermal Resistance, Junction-to-Ambient
Typ
-
Max
2.05
Units
°C/W
-
50
°C/W
-
110
°C/W
* When mounted on the minimum pad size recommended (PCB Mount)
©2004 Fairchild Semiconductor Corporation
Rev. B, June 2004
FQD6N50C / FQU6N50C
QFET
Symbol
TC = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Typ
Max
Units
500
--
--
V
--
0.8
--
V/°C
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = 250 µA
∆BVDSS
/
∆TJ
Breakdown Voltage Temperature
Coefficient
ID = 250 µA, Referenced to 25°C
IDSS
IGSSF
IGSSR
VDS = 500 V, VGS = 0 V
--
--
1
µA
VDS = 400 V, TC = 125°C
--
--
10
µA
Gate-Body Leakage Current, Forward
VGS = 30 V, VDS = 0 V
--
--
100
nA
Gate-Body Leakage Current, Reverse
VGS = -30 V, VDS = 0 V
--
--
-100
nA
Zero Gate Voltage Drain Current
On Characteristics
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
2.0
--
4.0
V
RDS(on)
Static Drain-Source
On-Resistance
VGS = 10 V, ID = 2.25A
--
1.0
1.2
Ω
gFS
Forward Transconductance
VDS = 40 V, ID = 2.25A
--
4.5
--
S
--
540
700
pF
--
80
105
pF
--
15
20
pF
--
10
30
ns
--
35
80
ns
--
55
120
ns
--
45
100
ns
--
19
25
nC
--
2.8
--
nC
--
8.8
--
nC
(Note 4)
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDD = 250 V, ID = 4.5A,
RG = 25 Ω
(Note 4, 5)
VDS = 400 V, ID = 4.5A,
VGS = 10 V
(Note 4, 5)
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
--
--
4.5
A
ISM
--
--
18
A
--
--
1.4
V
--
260
--
ns
--
1.6
--
µC
VSD
Maximum Pulsed Drain-Source Diode Forward Current
VGS = 0 V, IS = 4.5 A
Drain-Source Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 4.5 A,
dIF / dt = 100 A/µs
(Note 4)
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 26.6 mH, IAS = 4.5A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ 4.5A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
©2004 Fairchild Semiconductor Corporation
Rev. B, June 2004
FQD6N50C / FQU6N50C
Electrical Characteristics
FQD6N50C / FQU6N50C
Typical Characteristics
VGS
15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
Bottom : 5.0 V
Top :
ID, Drain Current [A]
1
10
ID, Drain Current [A]
1
10
0
10
-1
10
o
150 C
o
25 C
o
0
-55 C
10
※ Notes :
1. 250µ s Pulse Test
2. TC = 25℃
※ Notes :
1. VDS = 40V
2. 250µ s Pulse Test
-1
-1
0
10
10
1
10
10
2
4
6
8
10
VGS, Gate-Source Voltage [V]
VDS, Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
1
3.0
VGS = 10V
2.5
2.0
1.5
10
IDR, Reverse Drain Current [A]
RDS(ON) [Ω ],
Drain-Source On-Resistance
3.5
VGS = 20V
1.0
0
10
150℃
25℃
※ Notes :
1. VGS = 0V
2. 250µ s Pulse Test
※ Note : TJ = 25℃
0.5
-1
0
5
10
15
10
0.2
0.4
0.6
1.0
1.2
1.4
Figure 4. Body Diode Forward Voltage
Variation with Source Current
and Temperature
Figure 3. On-Resistance Variation vs
Drain Current and Gate Voltage
12
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
1000
Ciss
800
Coss
600
400
※ Note ;
1. VGS = 0 V
2. f = 1 MHz
Crss
200
VDS = 100V
10
VGS, Gate-Source Voltage [V]
1200
Capacitance [pF]
0.8
VSD, Source-Drain voltage [V]
ID, Drain Current [A]
VDS = 250V
8
VDS = 400V
6
4
2
※ Note : ID = 4.5A
0
-1
10
0
10
1
10
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
©2004 Fairchild Semiconductor Corporation
0
0
5
10
15
20
QG, Total Gate Charge [nC]
Figure 6. Gate Charge Characteristics
Rev. B, June 2004
(Continued)
3.0
RDS(ON), (Normalized)
Drain-Source On-Resistance
BVDSS, (Normalized)
Drain-Source Breakdown Voltage
1.2
1.1
1.0
※ Notes :
1. VGS = 0 V
2. ID = 250 µA
0.9
0.8
-100
FQD6N50C / FQU6N50C
Typical Characteristics
-50
0
50
100
150
2.5
2.0
1.5
1.0
※ Notes :
1. VGS = 10 V
2. ID = 2.25 A
0.5
0.0
-100
200
-50
0
o
TJ, Junction Temperature [ C]
50
100
150
200
o
TJ, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation
vs Temperature
Figure 8. On-Resistance Variation
vs Temperature
5
2
10
Operation in This Area
is Limited by R DS(on)
100 µs
ID, Drain Current [A]
ID, Drain Current [A]
4
1
10
1 ms
10 ms
DC 100 ms
0
10
-1
10
※ Notes :
-2
0
10
2
1
o
1. TC = 25 C
o
2. TJ = 150 C
3. Single Pulse
10
3
1
2
10
0
25
3
10
10
50
VDS, Drain-Source Voltage [V]
Zθ JC(t), Thermal Response
100
125
150
Figure 10. Maximum Drain Current
vs Case Temperature
Figure 9. Maximum Safe Operating Area
10
75
TC, Case Temperature [℃]
D = 0 .5
0
0 .2
※ N o te s :
1 . Z θ JC (t) = 2 .05 ℃ /W M a x .
2 . D uty Fa c to r, D = t 1 /t 2
3 . T JM - T C = P D M * Z θ JC (t)
0 .1
0 .0 5
10
-1
0 .0 2
0 .0 1
s in g le p u ls e
10
PDM
t1
-2
10
-5
10
-4
10
-3
10
-2
10
-1
t20
10
10
1
t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ]
Figure 11. Transient Thermal Response Curve
©2004 Fairchild Semiconductor Corporation
Rev. B, June 2004
FQD6N50C / FQU6N50C
Gate Charge Test Circuit & Waveform
VGS
Same Type
as DUT
50KΩ
200nF
12V
Qg
10V
300nF
VDS
VGS
Qgs
Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS
RG
RL
VDS
90%
VDD
VGS
VGS
DUT
10V
10%
td(on)
tr
td(off)
t on
tf
t off
Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
1
EAS = ---- L IAS2 -------------------2
BVDSS - VDD
L
VDS
BVDSS
IAS
ID
RG
VDD
DUT
10V
tp
©2004 Fairchild Semiconductor Corporation
ID (t)
VDS (t)
VDD
tp
Time
Rev. B, June 2004
FQD6N50C / FQU6N50C
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
_
I SD
L
Driver
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
I SD
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
VSD
VDD
Body Diode
Forward Voltage Drop
©2004 Fairchild Semiconductor Corporation
Rev. B, June 2004
D-PAK
MIN0.55
0.91 ±0.10
9.50 ±0.30
0.50 ±0.10
0.76 ±0.10
0.50 ±0.10
1.02 ±0.20
2.30TYP
[2.30±0.20]
(1.00)
(3.05)
(2XR0.25)
(0.10)
2.70 ±0.20
6.10 ±0.20
9.50 ±0.30
6.60 ±0.20
(5.34)
(5.04)
(1.50)
(0.90)
2.30 ±0.20
(0.70)
2.30TYP
[2.30±0.20]
(0.50)
2.30 ±0.10
0.89 ±0.10
MAX0.96
(4.34)
2.70 ±0.20
0.80 ±0.20
0.60 ±0.20
(0.50)
6.10 ±0.20
5.34 ±0.30
0.70 ±0.20
6.60 ±0.20
0.76 ±0.10
Dimensions in Millimeters
©2004 Fairchild Semiconductor Corporation
Rev. B, June 2004
FQD6N50C / FQU6N50C
Package Dimensions
(Continued)
I-PAK
2.30 ±0.20
6.60 ±0.20
5.34 ±0.20
0.76 ±0.10
2.30TYP
[2.30±0.20]
0.50 ±0.10
16.10 ±0.30
6.10 ±0.20
0.70 ±0.20
(0.50)
9.30 ±0.30
MAX0.96
(4.34)
1.80 ±0.20
0.80 ±0.10
0.60 ±0.20
(0.50)
2.30TYP
[2.30±0.20]
0.50 ±0.10
Dimensions in Millimeters
©2004 Fairchild Semiconductor Corporation
Rev. B, June 2004
FQD6N50C / FQU6N50C
Package Dimensions
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
CORPORATION.
As used herein:
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2. A critical component is any component of a life support
which, (a) are intended for surgical implant into the body,
device or system whose failure to perform can be
or (b) support or sustain life, or (c) whose failure to perform
reasonably expected to cause the failure of the life support
when properly used in accordance with instructions for use
device or system, or to affect its safety or effectiveness.
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In
Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
©2004 Fairchild Semiconductor Corporation
Rev. I11
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