UTC LV2622 250î¼a, 3mhz, low voltage rail-to-rail i/o cmos dual op amp Datasheet

UNISONIC TECHNOLOGIES CO., LTD
LV2622
Preliminary
LINEAR INTEGRATED CIRCUIT
250μA, 3MHZ, LOW VOLTAGE
RAIL-TO-RAIL I/O CMOS DUAL
OP AMPS
„
DESCRIPTION
SOP-8
The UTC LV2622 is low noise, low voltage and low power dual
operational amplifiers that can be designed into a wide range of
applications. With a 3MHz unity-gain frequency and a guaranteed
1.7V/μs slew rate, the quiescent current is only 250μA/amplifier
(5.0V).
The UTC LV2622 provides rail-to-rail output swing into heavy
loads. The input common-mode voltage range includes ground and
the maximum input offset voltage is 3mV. It is specified over the
extended industrial temperature range (−40°C~+125°C). The
operating range is 2.5V~5.5V. The UTC LV2622 provides optimal
performance in low voltage and low noise systems.
„
FEATURES
* Low Cost
* Rail-to-Rail Output Swing
* Input Rail: - 0.1V~+5.6V with VS=5.5V
* Typical VOS: 0.7mV
* Gain-Bandwidth Product: 3MHz
* High Slew Rate: 1.7V/µs
* Settling Time to 0.1% with 2V Step: 2.1µs
* Overload Recovery Time: 1µs
* Low Noise Voltage: 12nV/ Hz
* Operates on 2.5V~5.5V Supplies
* Low Power: 250µA/Amplifier Typical Supply Current
„
ORDERING INFORMATION
Ordering Number
Lead Free
LV2622L-S08-R
LV2622L-S08-T
Halogen Free
LV2622G-S08-R
LV2622G-S08-T
Package
Packing
SOP-8
SOP-8
Tape Reel
Tube
LV2622L-S08-R
(1)Packing Type
(1) R: Tape Reel, T: Tube
(2)Package Type
(2) S08: SOP-8
(4)Lead Free
(3) G: Halogen Free, L: Lead Free
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Copyright © 2011 Unisonic Technologies Co., Ltd
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LV2622
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„
Preliminary
LINEAR INTEGRATED CIRCUIT
PIN CONFIGURATION
OUT A
1
8
+VS
-IN A
2
7
OUT B
+IN A
3
6
-IN B
-VS
4
5
+IN B
BLOCK DIAGRAM
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LV2622
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Preliminary
LINEAR INTEGRATED CIRCUIT
ABSOLUTE MAXIMUM RATING (TA=+25°C, unless otherwise specified)
PARAMETER
SYMBOL
RATINGS
UNIT
Supply Voltage, V+~VVS
7.5
V
Common-Mode Input Voltage
VCM
(-Vs)-0.5~(+Vs)+0.5
V
Junction Temperature
TJ
160
°C
Operating Temperature
TOPR
-40~+150
°C
Storage Temperature
TSTG
-65~+150
°C
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
„
THERMAL DATA
PARAMETER
Junction to Ambient @ TA=25°C
SYMBOL
θJA
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RATINGS
160
UNIT
°C/W
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Preliminary
LINEAR INTEGRATED CIRCUIT
ELECTRICAL CHARACTERISTICS(TA=+25°C,VS=5V,VCM=VS/2,RL=600Ω, unless otherwise specified)
PARAMETER
INPUT CHARACTERISTICS
SYMBOL
Input Offset Voltage
VOS
Input Bias Current
Input Offset Current
Common-Mode Voltage Range
IB
IOS
VCM
Common-Mode Rejection Ratio
CMRR
Open-Loop Voltage Gain
AOL
Input Offset Voltage Drift
OUTPUT CHARACTERISTICS
ΔVOS/ΔT
Output Voltage Swing from Rail
VO
Output Current
IOUT
Closed-Loop Output Impedance
POWER SUPPLY
RO
Operating Voltage Range
VS
Power Supply Rejection Ratio
PSRR
Quiescent Current/ Amplifier
IQ
DYNAMIC PERFORMANCE
Gain-Bandwidth Product
Phase Margin
Full Power Bandwidth
Slew Rate
Settling Time To 0.1%
Overload Recovery Time
NOISE PERFORMANCE
GBP
φO
BWP
SR
tS
tOR
Voltage Noise Density
eN
TEST CONDITIONS
MIN
TYP
MAX
UNIT
0.7
3
3.5
mV
(Note)
VS=5.5V
VS=5.5V, VCM=-0.1V~4V
(Note)
VS=5.5V, VCM=-0.1V~5.6V
(Note)
RL=600Ω, Vo=0.15V~4.85V
(Note)
RL=10KΩ, Vo=0.05V~4.95V
(Note)
75
73
66
64
92
78
100
82
2.7
RL=600Ω
RL=10KΩ
45
30
(Note)
F=100KHz, G=+1
(Note)
VS=+2.5V~+5.5V,
VCM=(-VS)+0.5V
IOUT=0
1
1
-0.1~+5.6
90
dB
92
dB
100
dB
110
dB
μV/°C
0.1
0.015
48
V
mA
2.6
(Note)
2.5
2.5
79
76
94
250
(Note)
RL=10KΩ
Ω
5.5
5.5
V
dB
400
480
μA
<1% distortion, RL=600Ω
G=+1, 2V Step, RL=10KΩ
G=+1, 2V Step, RL=600Ω
VIN · Gain=Vs, RL=600Ω
3
67
50
1.7
2.1
1
MHz
degrees
KHz
V/μs
μs
μs
f=1kHz
12
nV/ Hz
Current Noise Density
IN
f=1kHz
3
Note: Denotes the specifications which apply over the operating temperature range (-40°C~125°C).
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pA
pA
V
fA/ Hz
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Preliminary
LINEAR INTEGRATED CIRCUIT
APPLICATION NOTES
Driving a Capacitive Load
The UTC LV2622 can directly drive 1000pF in unity-gain without oscillation. The unity-gain follower (buffer) is the
most sensitive configuration to capacitive loading. When the amplifier is configured in this manner, capacitive
loading directly on the output will decrease the device’s phase margin leading to high frequency ringing
or oscillations. It is recommended that an isolation resistor (RISO) is placed in series with the output of the
amplifier when the greater capacitive load is required. The circuit is shown in Figure 1. The RISO and the load
capacitor CL form a zero to increase stability, but this method results in a loss of gain accuracy for RISO dividing the
voltage with RLOAD.
The circuit in Figure 2 provides DC accuracy and AC stability. To increase the DC accuracy, RF should be
connected between the inverting input and the output. To preserve the phase margin in the overall feedback loop, CF
is required and can compensate the loss of phase margin together with RIso by feeding the high frequency
component of the output signal back to the amplifier’s inverting input
.
CF
RF
UTC LV2622
VIN
+
RISO
VOUT
1/2
CL
RL
Figure 2. Indirectly Driving Heavy Capacitive Load with DC Accuracy
For no-buffer configuration, there are two others ways to increase the phase margin: (a) by increasing the
amplifier’s gain or (b) by placing a capacitor in parallel with the feedback resistor to counteract the parasitic
capacitance associated with inverting node.
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Preliminary
LINEAR INTEGRATED CIRCUIT
APPLICATION NOTES(Cont.)
Power-Supply Bypassing and Layout
The UTC LV2622 can apply for a single +2.5V~+5.5V supply or dual ±1.25V~±2.75V supplies. For single-supply
operation, a 0.1µF ceramic capacitor should be placed close to the VDD pin to bypass the power supply VDD. For
dual-supply operation, separate 0.1µF ceramic capacitors should be placed to the VDD and the VSS supplies to
bypass them to ground, and 2.2µF tantalum capacitor for better performance.
By decreasing the amount of stray capacitance at the op amp’s inputs and output, PC board l performance can be
optimized. For example, placing external components as close to the device as possible can minimize trace lengths
and widths. and using surface-mount components is a better way.
For the operational amplifier, soldering the part to the board directly is strongly recommended. The EMI can be
minimized because keeping the high frequency big current loop area small.
Grounding
A ground plane layer is important for UTC LV2622 circuit design. The length of the current path speed currents in
an inductive ground return will create an unwanted voltage noise. Broad ground plane areas will reduce the parasitic
inductance.
Input-to-Output Coupling
The input and output signal traces should not be parallel to minimize capacitive coupling. This helps reducing
unwanted positive feedback.
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Preliminary
LINEAR INTEGRATED CIRCUIT
TYPICAL APPLICATION CIRCUITS
Figure 4 is the differential amplifier. If the resistors ratios are equal (R4/R3=R2/R1), then
VOUT=(Vp-Vn)×R2/R1+Vref.
Figure 5 performs the same function as that in Figure 4 but with the high input impedance.
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LV2622
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Preliminary
LINEAR INTEGRATED CIRCUIT
TYPICAL APPLICATION CIRCUITS(Cont.)
Figure 6 is the low pass filter. It’s DC gain is -R2/R1 and the –3dB corner frequency is 1/2πR2C.
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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