ETC IW4069BE Hex inverter high-voltage silicon-gate cmo Datasheet

IW4069UB
HEX INVERTER
High-Voltage Silicon-Gate CMOS
The IW4069UB types consist of six inverter circuits. These
devices are intended for all general-purpose inverter applications
where the medium-power TTL-drive and logic-level-conversion
capabilities of circuits such as the IW4049UB Hex Inverter/Buffers
are not required. Each of the six inverters is a single stage
• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of 1 µA at 18 V over full packagetemperature range; 100 nA at 18 V and 25°C
• Noise margin (over full package temperature range):
0.5 V min @ 5.0 V supply
1.0 V min @ 10.0 V supply
1.0 V min @ 15.0 V supply
ORDERING INFORMATION
IW4069UBN Plastic
IW4069UBD SOIC
TA = -55° to 125° C for all
packages
LOGIC DIAGRAM
PIN ASSIGNMENT
FUNCTION TABLE
Inputs
Output
A
Y
L
H
H
L
PIN 14 =VCC
PIN 7 = GND
1
IW4069UB
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage (Referenced to GND)
-0.5 to +20
V
VIN
DC Input Voltage (Referenced to GND)
-0.5 to VCC +0.5
V
VOUT
DC Output Voltage (Referenced to GND)
-0.5 to VCC +0.5
V
IIN
DC Input Current, per Pin
mA
±10
PD
Power Dissipation in Still Air, Plastic DIP+
750
mW
SOIC Package+
500
PD r Dissipation per Output Transistor
100
mW
Tstg
Storage Temperature
-65 to +150
°C
260
TL
Lead Temperature, 1 mm from Case for 10
°C
Seconds
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC
DC Supply Voltage (Referenced to GND)
VIN, VOUT DC Input Voltage, Output Voltage (Referenced to
GND)
TA
Operating Temperature, All Package Types
Min
3.0
0
Max
18
VCC
Unit
V
V
-55
+125
°C
This device contains protection circuitry to guard against damage due to high static
voltages or electric fields. However, precautions must be taken to avoid applications of any voltage
higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and
VOUT should be constrained to the range GND≤(VIN or VOUT)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or
VCC). Unused outputs must be left open.
2
IW4069UB
DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND)
Guaranteed Limit
VCC
Symbol
Parameter
Test Conditions
V ≥-55°C 25°C ≤125
°C
4
4
4
5.0
VIH
Minimum
High- VOUT=0.5V
8
8
8
10
Level
Input VOUT=1.0 V
12.5 12.5
12.5
15
Voltage
VOUT=1.5V
1
1
1
5.0
VIL
Maximum Low - VOUT= VCC - 0.5 V
2
2
2
10
Level
Input VOUT= VCC - 1 V
2.5
2.5
2.5
15
Voltage
VOUT= VCC - 1.5 V
4.95 4.95
4.95
VOH
Minimum
High- VIN=GND
5.0
9.95 9.95
9.95
Level
Output
10
Voltage
15 14.95 14.95 14.9
5
0.05 0.05
0.05
VOL
Maximum
Low- VIN= VCC
5.0
0.05 0.05
0.05
Level
Output
10
0.05 0.05
0.05
Voltage
15
IIN
Maximum
Input VIN= GND or VCC
18
±0.1
±0.1 ±1.0
Leakage Current
7.5
0.25
VIN= GND or VCC
0.25
ICC
Maximum
5.0
15
0.5
0.5
Quiescent Supply
10
30
1.0
1.0
Current
15
150
5.0
5.0
(per Package)
20
IOL
Minimum Output VIN= GND or VCC
0.51 0.36
0.64
Low
(Sink) UOL=0.4 V
5.0
0.9
1.3
1.6
Current
10
UOL=0.5 V
2.4
3.4
4.2
15
UOL=1.5 V
IOH
Minimum Output VIN= GND or VCC
-1.6 -1.15
-2.0
5.0
High
(Source) UOH=2.5 V
5.0 -0.64 -0.51 -0.36
Current
UOH=4.6 V
-0.9
-1.3
-1.6
10
UOH=9.5 V
-2.4
-3.4
-4.2
15
UOH=13.5 V
3
Unit
V
V
V
V
µA
µA
mA
mA
IW4069UB
AC ELECTRICAL CHARACTERISTICS(CL=50pF, RL=200kΩ, Input tr=tf=20 ns)
Guaranteed Limit
VCC
Symbol
Parameter
V
≥-55
25°C
≤125
°C
°C
220
110
110
tPLH,
Maximum Propagation Delay, Input A to 5.0
120
60
60
tPHL
Output Y (Figure 1)
10
100
50
50
15
400
200
200
tTLH, tTHL Maximum Output Transition Time, Any 5.0
200
100
100
Output (Figure 1)
10
160
80
80
15
CIN
Maximum Input Capacitance
15
Figure 1. Switching Waveforms
EXPANDED LOGIC DIAGRAM
(1/6 of the Device)
4
Unit
ns
ns
pF
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