FAIRCHILD 100313SCX

Revised August 2000
100313
Low Power Quad Driver
General Description
Features
The 100313 is a monolithic quad driver with two OR and
two NOR outputs and common enable. The common input
is buffered to minimize input loading. If the D inputs are not
used the Enable can be used to drive sixteen 50Ω lines. All
inputs have 50 kΩ pull-down resistors and all outputs are
buffered.
■ 50% power reduction of the 100113
■ 2000V ESD protection
■ Pin/function compatible with 100113 and 100112
■ Voltage compensated operating range = −4.2V to −5.7V
■ Available to industrial grade temperature range
(PLCC package only)
Ordering Code:
Order Number
Package Number
Package Description
100313SC
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
100313PC
N24E
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
100313QC
V28A
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
100313QI
V28A
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (−40°C to +85°C)
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagrams
24-Pin DIP/SOIC
Pin Descriptions
Pin Names
28-Pin PLCC
Description
Da–Dd
Data Inputs
E
Enable Input
Ona–Ond
Data Outputs
Ona–Ond
Complementary Data Outputs
© 2000 Fairchild Semiconductor Corporation
DS010249
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100313 Low Power Quad Driver
September 1989
100313
Truth Table
Inputs
Outputs
E
Da
Db
Dc
Dd
O1a, 02a
O1a, O2a
H
X
X
X
X
H
L
H
L
H
L
H
L
L
L
L
L
L
L
H
L
H
L
H
L
H
L
L
L
L
H
L
H
L
H
L
H
H
L
L
L
L
H
L
L
H
L
H
H
L
L
H
L
L
L
H
H
L
H
L
H
H
L
H
L
L
L
H
L
L
L
H
H
L
L
H
L
H
L
L
H
L
H
L
H
H
L
L
H
H
L
L
L
H
H
L
L
H
H
L
H
L
L
H
L
L
H
H
H
L
H
H
L
H
L
H
L
L
H
L
L
L
H
L
L
H
L
H
L
H
L
H
L
L
H
H
L
L
H
L
H
H
L
L
H
L
H
L
H
L
L
H
H
L
L
H
L
H
L
H
H
H
L
L
H
H
L
H
L
L
H
H
L
L
H
L
H
L
L
H
L
H
L
H
H
L
H
H
L
H
L
L
H
H
L
L
H
H
H
L
H
L
H
L
H
L
L
H
L
H
H
H
H
H
L
H
L
H
L
H
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
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O1b, 02b O1b, 02b O1c, 02c O1c, 02c O1d, 02d O1d, 02d
Recommended Operating
Conditions
−65°C to +150°C
Storage Temperature (TSTG)
+150°C
Maximum Junction Temperature (TJ)
Case Temperature (TC)
−7.0V to +0.5V
VEE Pin Potential to Ground Pin
Output Current (DC Output HIGH)
−50 mA
ESD (Note 2)
≥2000V
0°C to +85°C
Commercial
VEE to +0.5V
Input Voltage (DC)
100313
Absolute Maximum Ratings(Note 1)
−40°C to +85°C
Industrial
−5.7V to −4.2V
Supply Voltage (VEE)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: ESD testing conforms to MIL-STD-883, Method 3015.
Commercial Version
DC Electrical Characteristics (Note 3)
VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = 0°C to +85°C
Min
Typ
Max
VOH
Symbol
Output HIGH Voltage
Parameter
−1025
−955
−870
Units
VOL
Output LOW Voltage
−1830
−1705
−1620
VOHC
Output HIGH Voltage
−1035
VOLC
Output LOW Voltage
VIH
Input HIGH Voltage
−1165
−870
mV
Guaranteed HIGH Signal
VIL
Input LOW Voltage
−1830
−1475
mV
Guaranteed LOW Signal
IIL
Input LOW Current
0.50
IIH
Input HIGH Current
mV
mV
−1610
Conditions
VIN =VIH (Max)
Loading with
or VIL (Min)
50Ω to −2.0V
VIN = VIH (Min)
Loading with
or VIL (Max)
50Ω to −2.0V
for All Inputs
for All Inputs
IEE
Data
350
Enable
240
−59
Power Supply Current
−29
µA
VIN = VIL (Min)
µA
VIN = VIH (Max)
mA
Inputs OPEN
Note 3: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional
noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under “worst case” conditions.
DIP AC Electrical Characteristics
VEE = −4.2V to −5.7V, VCC = VCCA = GND
Symbol
Parameter
tPLH
Propagation Delay
tPHL
Data to Output
tPLH
Propagation Delay
tPHL
Enable to Output
tTLH
Transition Time
tTHL
20% to 80%, 80% to 20%
TC = 0°C
TC = +25°C
TC = +85°C
Units
Min
Max
Min
Max
Min
Max
0.55
1.30
0.55
1.30
0.55
1.40
ns
0.80
1.80
0.80
1.80
0.80
1.90
ns
0.45
1.30
0.45
1.30
0.45
1.30
ns
Conditions
Figures 1, 2
(Note 4)
Figures 1, 2
Note 4: The propagation delay specified is for single output switching. Delays may vary up to 150 ps with multiple outputs switching.
3
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100313
Commercial Version (Continued)
SOIC and PLCC AC Electrical Characteristics
VEE = −4.2V to −5.7V, VCC = VCCA = GND
Symbol
Parameter
tPLH
Propagation Delay
tPHL
Data to Output
tPLH
Propagation Delay
tPHL
Enable to Output
tTLH
Transition Time
tTHL
20% to 80%, 80% to 20%
tOSHL
TC = 0°C
TC = +25°C
TC = +85°C
Min
Max
Min
Max
Min
Max
0.55
1.20
0.55
1.20
0.55
1.30
Units
ns
0.80
1.70
0.80
1.70
0.80
1.80
ns
0.45
1.30
0.45
1.30
0.45
1.30
ns
Maximum Skew Common Edge
Output-to-Output Variation
Conditions
Figures 1, 2
(Note 5)
Figures 1, 2
PLCC Only
280
280
280
ps
290
290
290
ps
330
330
330
ps
360
360
360
ps
330
330
330
ps
360
360
360
ps
200
200
200
ps
200
200
200
ps
(Note 6)
Data to Output Path
tOSHL
Maximum Skew Common Edge
Output-to-Output Variation
PLCC Only
(Note 6)
Enable to Output Path
tOSLH
Maximum Skew Common Edge
Output-to-Output Variation
PLCC Only
(Note 6)
Data to Output Path
tOSLH
Maximum Skew Common Edge
Output-to-Output Variation
PLCC Only
(Note 6)
Enable to Output Path
tOST
Maximum Skew Opposite Edge
Output-to-Output Variation
PLCC Only
(Note 6)
Data to Output Path
tOST
Maximum Skew Opposite Edge
Output-to-Output Variation
PLCC Only
(Note 6)
Enable to Output Path
tPS
Maximum Skew
Pin (Signal) Transition Variation
PLCC Only
(Note 6)
Data to Output Path
tPS
Maximum Skew
Pin (Signal) Transition Variation
PLCC Only
(Note 6)
Enable to Output Path
Note 5: The propagation delay specified is for single output switching. Delays may vary up to 150 ps with multiple outputs switching.
Note 6: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same packaged device. The specifications apply to any outputs switching in the same direction either HIGH-to-LOW (tOSHL), or LOW-to-HIGH (tOSLH), or in opposite
directions both HL and LH (tOST). Parameters tOST and tPS guaranteed by design.
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100313
Industrial Version
PLCC DC Electrical Characteristics (Note 7)
VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = −40°C to +85°C
TC = −40°C
TC = 0°C to +85°C
Symbol
Parameter
Min
Max
Min
Max
Units
Conditions
VOH
Output HIGH Voltage
−1085
−870
−1025
−870
VOL
Output LOW Voltage
−1830
−1575
−1830
−1620
VOHC
Output HIGH Voltage
−1095
VOLC
Output LOW Voltage
VIH
Input HIGH Voltage
−1170
−870
−1165
−870
mV
Guaranteed HIGH Signal for All Inputs
VIL
Input LOW Voltage
−1830
−1480
−1830
−1475
mV
Guaranteed LOW Signal for All Inputs
IIL
Input LOW Current
0.50
µA
VIN = VIL(Min)
IIH
Input HIGH Current
µA
VIN = VIH(Max)
mA
Inputs OPEN
IEE
−1035
−1565
−1610
0.50
Data
350
350
Enable
240
240
Power Supply Current
−59
−29
−59
−29
mV
mV
VIN = VIH(Max)
Loading with
or VIL(Min)
50Ω to −2.0V
VIN = VIH(Min)
Loading with
or VIL(Max)
50Ω to −2.0V
Note 7: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional
noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under “worst case” conditions.
PLCC AC Electrical Characteristics
VEE = −4.2V to −5.7V, VCC = VCCA = GND
Symbol
Parameter
tPLH
Propagation Delay
tPHL
Data to Output
tPLH
Propagation Delay
tPHL
Enable to Output
tTLH
Transition Time
tTHL
20% to 80%, 80% to 20%
TC = −40°C
TC = +25°C
TC = +85°C
Units
Min
Max
Min
Max
Min
Max
0.55
1.20
0.55
1.20
0.55
1.30
ns
0.80
1.70
0.80
1.70
0.80
1.80
ns
0.45
1.30
0.45
1.30
0.45
1.30
ns
Conditions
Figures 1, 2
(Note 8)
Figures 1, 2
Note 8: The propagation delay specified is for single output switching. Delays may vary up to 150 ps with multiple outputs switching.
5
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100313
Test Circuitry
Notes:
VCC, VCCA = +2V, VEE = −2.5V.
L1 and L2 = equal length 50Ω impedance lines.
RT = 50Ω terminator internal to scope.
Decoupling 0.1 µF from GND to VCC and VEE.
All unused outputs are loaded with 50Ω to GND.
CL = Fixture and stray capacitance ≤ 3 pF.
FIGURE 1. AC Test Circuit
Switching Waveforms
FIGURE 2. Propagation Delay and Transition Times
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100313
Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M24B
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
Package Number N24E
7
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100313 Low Power Quad Driver
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Package Number V28A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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