VICOR B048L120T10

V•I Chip – BCM
Bus Converter Module
TM
B048K120T10
Vin = 42 - 53 V
Vout = 10.5 - 13.25 V
Iout = 8.3 A
K = 1/4
Rout = 32 mΩ max
• 48V to 12V V•I Chip Converter
• >96% efficiency
• 100 Watt (150 Watt for 1 ms)
• 125°C operation
• High density – up to 400 W/in3
• <1 µs transient response
• Small footprint – 100 W/in
• >3.5 million hours MTBF
• Low weight – 0.4 oz (12 g)
• No output filtering required
• Pick & Place / SMD
• V•I Chip BGA package
2
1
©
Actual size
Product Description
The V•I Chip Bus Converter Module
(BCM) is a high efficiency (>96%),
narrow input range Voltage
Transformation Module (VTM) operating
from a pre-regulated 48 Vdc primary bus
to deliver an isolated 12 V secondary for
Intermediate Bus Architecture
applications. The BCM may be used to
power non-isolated POL converters or as
an independent 12 V source. Due to the
fast response time and low noise of the
BCM, the need for limited life aluminum
electrolytic or tantalum capacitors at the
input of POL converters is reduced—or
eliminated—resulting in savings of board
area, materials and total system cost.
P
Absolute Maximum Ratings
Parameter
Values
Unit
-1.0 to 60.0
Vdc
+In to -In
100
Vdc
PC to -In
-0.3 to 7.0
Vdc
TM to -In
-0.3 to 7.0
Vdc
+In to -In
SG to -In
Isolation voltage
Operating junction temperature
Peak output current
L
E
R
The BCM achieves a power density of
400 W/in3 and may be surface mounted
with a profile as low as 0.16" (4mm) over
the PCB. Its V•I Chip power BGA package
is compatible with on-board or in-board
surface mounting. The V•I Chip package
provides flexible thermal management
through its low Junction-to-Case and
Junction-to-BGA thermal resistance.
Owing to its high conversion efficiency
and safe operating temperature range, the
BCM does not require a discrete heat sink
in typical applications. It is also
compatible with heat sink options,
assuring low junction temperatures and
long life in the harshest environments.
45
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
I
IM
Output current
Case temperature during reflow
Storage temperature
For 100 ms
Y
R
A
N
500
+Out to -Out
Notes
mA
-0.5 to 15.0
Vdc
1500
Vdc
-40 to 125
°C
See note 2
8.3
A
Continuous
12.5
A
For 1 ms
208
°C
Input to Output
-40 to 150
°C
Output power
100
W
Continuous
Peak output power
150
W
For 1 ms
Thermal Resistance
Symbol
Parameter
Typ
Max
Units
RθJC
Junction-to-case
1.1
1.5
°C/W
RθJB
Junction-to-BGA
2.1
2.5
°C/W
RθJA
Junction-to-ambient 3
6.5
7.2
°C/W
RθJA
Junction-to-ambient 4
5.0
5.5
°C/W
Notes
1. For complete product matrix see chart on page 10.
2. The referenced junction is defined as the semiconductor having the highest temperature. This
temperature is monitored by the temperature monitor (TM) signal and by a shutdown comparator.
3. B048K120T10 surface mounted in-board to a 2" x 2" FR4 board, 4 layers 2 oz Cu, 300 LFM.
4. B048L120T10 (0.25"H integral Pin Fins) surface mounted on FR4 board, 300 LFM.
V•I Chip Bus Converter
B048K120T10
Rev. 1.2
Page 1 of 16
Specifications
INPUT (Conditions are at nominal line, full load, and 25°C ambient unless otherwise specified)
Parameter
Input voltage range
Input dV/dt
Input undervoltage turn-on
Input undervoltage turn-off
Input overvoltage turn-on
Input overvoltage turn-off
Input quiescent current
Inrush current overshoot
Input current
Input reflected ripple current
No load power dissipation
Internal input capacitance
Internal input inductance
Recommended external input capacitance
P
Min
42
37
53
L
E
R
Typ
48
Max
53
10
42
Unit
V
V/µs
V
V
V
V
mA
A
A
mA p-p
W
µF
nH
µF
Note
N
I
IM
1.5
1.0
52
1.7
2
20
8
59
1.8
2.5
70
3.0
Y
AR
PC low
Using test circuit in Fig.24; See Fig.1
Using test circuit in Fig.24; See Fig.4
200 nH maximum source inductance; See Fig.24
INPUT WAVEFORMS
Figure 1— Inrush transient current at full load and nominal VIN
with PC enabled
Figure 2— Output voltage turn-on waveform with PC enabled
at full load and nominal VIN
Figure 3—Output voltage turn-on waveform with input turn-on
at full load and nominal VIN
Figure 4— Input reflected ripple current at full load and
nominal VIN
45
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
V•I Chip Bus Converter
B048K120T10
Rev. 1.2
Page 2 of 16
Specifications, continued
OUTPUT (Conditions are at nominal line, full load, and 25°C ambient unless otherwise specified)
Parameter
Rated DC current
Min
0
Typ
Peak repetitive current
DC current limit
Current share accuracy
Efficiency
Half load
Full load
Internal output inductance
Internal output capacitance
Load capacitance
Output overvoltage setpoint
Output ripple voltage
No external bypass
1µF bypass capacitor
Average short circuit current
Effective switching frequency
Line regulation
K
Load regulation
ROUT
Transient response
Voltage undershoot
Voltage overshoot
Response time
Recovery time
Output overshoot
Input turn-on
PC enable
Output turn-on delay
From application of power
From release of PC pin
P
8.3
10.5
5
95.0
95.0
Max
8.3
Unit
A
12.5
A
13.1
10
A
%
95.5
96.5
1.6
7
14.5
2.8
0.245
L
E
R
135
1/4
0.255
Max pulse width 1ms, max duty cycle 10%,
baseline power 50%
See Parallel Operation on page 11
%
%
nH
µF
µF
V
1000
70
6
200
3.5
Note
mV
mV
mA
MHz
4.2
I
IM
32
mΩ
See Fig.5
See Fig.5
Effective value
Y
R
NA
See Figs.7 and 10
See Fig.8
Fixed, 1.75 MHz per phase
VOUT=K•VIN at no load
See Figs.9 and 28
140
96
200
1
mV
mV
ns
µs
0-8.3A load step, w/Cin =100µF, see Fig.11
8.3 -0A load step, w/Cin =100µF, see Fig.12
See Figs.11 and 12
See Figs.11 and 12
0
0
mV
mV
No output filter; See Fig.2
No output filter; See Fig.3
ms
µs
See Fig.3
See Fig.2
180
320
300
410
OUTPUT WAVEFORMS
Efficiency vs. Output Power
Power Dissipation
4
96
3.5
Power Dissipation (W)
98
Efficiency (%)
94
92
90
88
86
3
2.5
2
1.5
1
0.5
84
0
0
10
20
30
40
50
60
70
80
90
100
0
Output Power (W)
45
20
30
40
50
60
70
80
90
100
Output Power (W)
Figure 5— Efficiency vs. output power at nominal VIN
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
10
Figure 6—Power dissipation as a function of output power
V•I Chip Bus Converter
B048K120T10
Rev. 1.2
Page 3 of 16
Specifications, continued
PRELIMINARY
Figure 7— Output voltage ripple at full load and nominal VIN;
without any external bypass capacitor.
Figure 8—Output voltage ripple at full load and nominal VIN
with 1 µF ceramic external bypass capacitor.
80
70
Output Ripple (mV)
60
50
40
30
20
10
0
0
10
20
30
40
50
60
70
80
90
100
Output Power (W)
Figure 9— Output impedance vs. frequency
Figure 10— Output voltage ripple vs. output power at nominal
line without any external bypass capacitor.
Figure 11— 0 -8.3A transient response with no external bypass
capacitance.
Figure 12— 8.3 -0A transient response with no external
bypass capacitance.
45
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
V•I Chip Bus Converter
B048K120T10
Rev. 1.2
Page 4 of 16
Specifications, continued
GENERAL
Parameter
MTBF
MIL-HDBK-217F
Telcordia TR-NT-000332
Telcordia SR-332
Demonstrated
Isolation specifications
Voltage
Capacitance
Resistance
Agency approvals(pending)
Min
Typ
Max
3.6
4.2
TBD
TBD
1,500
5,000
6,500
10
Unit
Note
Mhrs
Mhrs
hrs
hrs
25°C, GB
Vdc
pF
MΩ
Input to Output
Input to Output
Input to Output
UL/CSA 60950, EN 60950
Low Voltage Directive
See mechanical drawing, Figs.16 and 18
cTÜVus
CE Mark
Mechanical parameters
Weight
Dimensions
Length
Width
Height
0.43 / 12.25
oz / g
1.26 / 32
0.85 / 21.5
0.24 / 6
in / mm
in / mm
in / mm
L
E
R
I
IM
Y
R
NA
Auxiliary Pins (Conditions are at nominal line, full load, and 25°C ambient unless otherwise specified)
Parameter
Primary control (PC)
DC voltage
Module disable voltage
Module enable voltage
Current limit
Enable delay time
Disable delay time
Temperature Monitor (TM)
27°C setting
Temperature coefficient
Full range accuracy
Current limit
P
Min
4.8
2.4
2.4
2.95
-5
100
Figure 13— VOUT at full load vs. PC disable
45
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
Typ
Max
Unit
Note
5.0
2.5
2.5
2.5
320
16
5.2
V
V
V
mA
µs
µs
Source only
See Fig.2
See Fig.13
3.00
10
2.6
2.9
410
40
3.05
5
V
mV/°C
°C
µA
Operating junction temperature
Operating junction temperature
Source only
Figure 14— PC signal during fault
V•I Chip Bus Converter
B048K120T10
Rev. 1.2
Page 5 of 16
Specifications, continued
PRELIMINARY
THERMAL
Symbol
Parameter
Over temperature shutdown
Thermal capacity
Min
125
Typ
130
0.61
Max
135
Unit
°C
Ws/°C
RθJC
Junction-to-case thermal impedance
1.1
1.5
°C/W
RθJB
Junction-to-BGA thermal impedance
2.1
2.5
°C/W
RθJA
Junction-to-ambient 1
6.5
7.2
°C/W
RθJA
Junction-to-ambient 2
5.0
5.5
°C/W
Note
Junction temperature
Notes
1. B048K120T10 surface mounted in-board to a 2" x 2" FR4 board, 4 layers 2 oz Cu, 300 LFM.
2. B048L120T10 (0.25"H integral Pin Fins) surface mounted on FR4 board, 300 LFM.
V•I CHIP STRESS DRIVEN PRODUCT QUALIFICATION PROCESS
Test
High Temperature Operational Life (HTOL)
Temperature Cycling
High Temperature Storage
Moisture Resistance
Temperature Humidity Bias Testing (THB)
Pressure Cooker Testing (Autoclave)
Highly Accelerated Stress Testing (HAST)
Solvent Resistance/Marking Permanency
Mechanical Vibration
Mechanical Shock
Electro Static Discharge Testing – Human Body Model
Electro Static Discharge Testing – Machine Model
Highly Accelerated Life Testing (HALT)
Dynamic Cycling
Standard
JESD22-A-108-B
JESD22-A-104B
JESD22-A-103A
JESD22-A113-B
EIA/JESD22-A-101-B
JESD22-A-102-C
JESD22-A-110B
JESD22-B-107-A
JESD22-B-103-A
JESD22-B-104-A
EIA/JESD22-A114-A
EIA/JESD22-A115-A
Per Vicor Internal
Test Specification
Environment
125°C, Vmax, 1,008 hrs
-55°C to 125°C, 1,000 cycles
150°C, 1,000 hrs
Moisture Sensitivity Level 4
85°C, 85% RH, Vmax, 1,008 hrs
121°C, 100% RH, 15 PSIG, 96 hrs
130°C, 85% RH, Vmax, 96 hrs
Solvents A, B & C as defined
20g peak, 20-2,000 Hz, test in X, Y & Z directions
1,500g peak 0.5 ms pulse duration, 5 pulses in 6 directions
Meets or exceeds 2,000 Volts
Meets or exceeds 200 Volts
Per Vicor Internal
Test Specification
Constant line, 0-100% load,
Operation limits verified, destruct margin determined
-20°C to 125°C
V•I CHIP BALL GRID ARRAY INTERCONNECT QUALIFICATION
Test
BGA Daisy-Chain Thermal Cycling
Ball Shear
Bend Test
45
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
Standard
IPC-SM-785
IPC-9701
IPC-9701
IPC J-STD-029
IPC J-STD-029
V•I Chip Bus Converter
Environment
TC3, -40 to 125°C at <10 °C/min,
10 min dwell time.
No failure through intermetallic.
Deflection through 4 mm.
B048K120T10
Rev. 1.2
Page 6 of 16
Pin/Control Functions
+IN/-IN – DC Voltage Input Ports
The V•I Chip input voltage range should not be exceeded. An
internal under/over voltage lockout-function prevents operation
outside of the normal operating input range. The BCM turns
ON within an input voltage window bounded by the “Input
under-voltage turn-on” and “Input over-voltage turn-off” levels,
as specified. The V•I Chip may be protected against accidental
application of a reverse input voltage by the addition of a
rectifier in series with the positive input, or a reverse rectifier in
shunt with the positive input located on the load side of the
input fuse.
4 3
+Out
-Out
+Out
The connection of the V•I Chip to its power source should be
implemented with minimal distribution inductance. If the
interconnect inductance exceeds 100 nH, the input should be
bypassed with a RC damper to retain low source impedance and
stable operation. With an interconnect inductance of 200 nH, the
RC damper may be 8 µF in series with 0.3Ω.
21
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
AA
AB
AC
AD
AE
AF
AG
AH
AJ
AK
AL
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
AA
AB
AC
AD
AE
AF
AG
AH
AJ
AK
AL
-Out
+In
Temp.
Monitor
Signal
Ground
Primary
Control
-In
Bottom View
Figure 15—BCM BGA configuration
SG – Signal Ground
The Signal Ground provides a Kelvin return for the PC and TM
ports. It is internally connected to the –IN port. The SG
connection is not sized to carry the –IN current and cannot be a
substitute for the –IN port, which must be connected with low
interconnect impedance.
I
IM
PC – Primary Control
The Primary Control port is a multifunction node that provides
the following functions:
L
E
R
Enable/Disable – If the PC port is left floating or is at a
logic HI, the BCM output is enabled. Once this port
is pulled lower than 2.4 Vdc with respect to SG, the output
is disabled. This action can be realized by employing a
relay, opto-coupler, or open collector transistor. Refer to
Figures 1-3, 13 and 14 for the typical Enable/Disable
characteristics. This port should not be toggled at a rate
higher than 1 Hz.
P
Primary Auxiliary Supply – The PC port can source up to
2.4 mA at 5.0 Vdc.
Alarm – The BCM contains watchdog circuitry that
monitors output overload, input over voltage or
under voltage, and internal junction temperatures. In
response to an abnormal condition in any of the monitored
parameters, the PC port will toggle. Refer to Figure 14 for
PC alarm characteristics.
TM – Temperature Monitor
The Temperature Monitor port monitors the highest junction
temperature of the BCM. This output may be used to provide
feedback and validation of the thermal management of
V•I Chips, as applied in diverse power systems and environments.
45
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
Signal
Name
+In
–In
TM
SG
PC
BGA
Designation
A1-L1, A2-L2
AA1-AL1, AA2-AL2
P1, P2
T1, T2
V1, V2
A3-G3, A4-G4,
U3-AC3, U4-AC4
J3-R3, J4-R4,
AE3-AL3, AE4-AL4
Y
R
NA
+Out
–Out
At 300 °K (+27 °C), the TM output is nominally 3.0 Vdc. The
TM output is proportional to temperature and varies at 10 mV/°C.
The TM accuracy is +/-5 °C. SG should be used as ground
return of the TM signal to maintain the specified accuracy.
+OUT/-OUT – DC Voltage Output Ports
Two sets of contacts are provided for the +OUT port. They
must be connected in parallel with low interconnect resistance.
Similarly, two sets of contacts are provided for the –OUT port.
They must be connected in parallel with low interconnect
resistance. Within the specified operating range, the average
output voltage is defined by the Level 1 DC behavioral model
of Figure 28. The current source capability of the BCM is rated
in the specifications section of this document.
The low output impedance of the BCM, see Figure 9, reduces
or eliminates the need for limited life aluminum electrolytic or
tantalum capacitors at the input of POL converters.
Total load capacitance at the output of the BCM should not
exceed the specified maximum. Owing to the wide bandwidth
and low output impedance of the BCM (see Figure 9), low
frequency bypass capacitance and significant energy storage
may be more densely and efficiently provided by adding
capacitance at the input of the BCM.
V•I Chip Bus Converter
B048K120T10
Rev. 1.2
Page 7 of 16
PRELIMINARY
Mechanical Drawings
1,00
0.039
6,0
0.24
21,5
0.85
SOLDER BALL
#A1 INDICATOR
(106) X ø
0,51
0.020
1,00
0.039
18,00
0.709
9,00
0.354
SOLDER BALL
SOLDER BALL #A1
OUTPUT
28,8
1.13
C
L
15,00
0.591
16,0
0.63
C
L
1,6
0.06
TOP VIEW (COMPONENT SIDE)
30,00
1.181
INPUT
32,0
1.26
OUTPUT
INPUT
1,00 TYP
0.039
1,00
0.039
BOTTOM VIEW
4,0
0.16
15,7
0.62
NOTES:
mm
1- DIMENSIONS ARE inch .
2- UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
.X/[.XX] = +/-0.25/[.01]; .XX/[.XXX] = +/-0.13/[.005]
3- PRODUCT MARKING ON BOTH TOP AND BOTTOM SURFACES
SEATING PLANE
Figure 16—BCM BGA mechanical outline; In-board mounting
IN-BOARD MOUNTING
BGA surface mounting requires a
cutout in the PCB in which to recess the V•I Chip
1,50
0.059
( 1,00 )
0.039
(ø
0,51
)
0.020
ø 0,53 PLATED VIA
0.021
CONNECT TO
INNER LAYERS
0,50
0.020
SOLDER MASK
DEFINED PADS
0,50
0.020
( 1,00 )
0.039
18,00
0.709
1,00
0.039
9,00
0.354
SOLDER PAD #A1
(4) X 6,00
0.236
+IN
+OUT1
(2) X 10,00
0.394
1,00
0.039
1,00
0.039
-OUT1
(COMPONENT SIDE SHOWN)
29,26
1.152
SG
TM
RECOMMENDED LAND AND VIA PATTERN
PCB CUTOUT
0,51
0.020
PC
-IN
-OUT2
(106) X ø
24,00
0.945
+OUT2
20,00
0.787 17,00
0.669 15,00 13,00
0.591
0.512
16,00
0.630
0,37
0.015
8,08
0.318
SOLDER MASK
DEFINED PAD
16,16
0.636
NOTES:
mm
1- DIMENSIONS ARE inch .
2- UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
.X/[.XX] = +/-0.25/[.01]; .XX/[.XXX] = +/-0.13/[.005]
8,00
0.315
1,6
(4) X R 0.06
Figure 17—BCM BGA PCB land/VIA layout information; In-board mounting
45
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
V•I Chip Bus Converter
B048K120T10
Rev. 1.2
Page 8 of 16
PRELIMINARY
Mechanical Drawings
6,2
0.25
22,0
0.87
15,99
0.630
3,01
0.118
3,01
0.118
(4) PL. 7,10
0.280
OUTPUT
INPUT
INPUT
24,00
0.945
OUTPUT
32,0
1.26
11,10 (2) PL.
0.437
CL
16,00
0.630
12,94
0.509
8,00
0.315
20,00
0.787
C
L
0,45
0.018
TOP VIEW (COMPONENT SIDE)
14,94
0.588
16,94
0.667
BOTTOM VIEW
NOTES:
1- DIMENSIONS ARE mm/[INCH].
2- UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
.X/[.XX] = +/-0.25/[.01]; .XX/[.XXX] = +/-0.13/[.005]
3- PRODUCT MARKING ON BOTH TOP AND BOTTOM SURFACES
Figure 18—BCM J-lead mechanical outline; On-board mounting
3,26
0.128
24,00
0.945
+OUT2
+IN
PC SG TM
(4) PL. 7,48
0.294
-OUT1
-OUT2
20,00
0.787 16,94
0.667 14,94
0.588 12,94
0.509
-IN
1,60
(3) PL. 0.063
3,26
0.128
+OUT1
L. 11,48
0.452
15,74
0.620
16,00
0.630
8,00
0.315
RECOMMENDED LAND PATTERN
NOTES:
1- DIMENSIONS ARE mm/[INCH].
2- UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
.X/[.XX] = +/-0.25/[.01]; .XX/[.XXX] = +/-0.13/[.005]
(COMPONENT SIDE SHOWN)
Figure 19— BCM J-lead PCB land layout information; On-board mounting
45
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
V•I Chip Bus Converter
B048K120T10
Rev. 1.2
Page 9 of 16
Part Numbering and Configuration Options
V•I Chip BUS CONVERTER PART NUMBERING
B
048
Bus Converter
Module
Input Voltage
Designator
K
120
Configuration Options
F = On-board (Fig.21)
Output Voltage
Designator
(=Vout x10)
G = On-board with 0.25"
Integral Pin Fins (Fig.23)
T
10
Product Grade Temperatures (°C)
Grade
Storage
Operating
T
-40 to150 -40 to125
Output Power
Designator
(=Pout/10)
NOTE:
150W and 200W
versions are
also available.
K = In-board (Fig.20)
L = In-board with 0.25"
Integral Pin Fins (Fig.22)
CONFIGURATION OPTIONS
IN-BOARD*
ON-BOARD*
IN-BOARD WITH 0.25"
PIN FINS**
ON-BOARD WITH 0.25"
PIN FINS**
Effective Power Density
585 W/in3
365 W/in3
203 W/in3
163 W/in3
Junction-Board
Thermal Resistance
2.1 °C/W
2.4 °C/W
2.1 °C/W
2.4 °C/W
Junction-Case
Thermal Resistance
1.1 °C/W
1.1 °C/W
N/A
N/A
Junction-Ambient
Thermal Resistance 300LFM
6.5 °C/W
6.8 °C/W
5.0 °C/W
5.0 °C/W
B048F120T10
B048L120T10
B048G120T10
CONFIGURATION
BCM Model No.
B048K120T10
L
E
PR
N
I
IM
Y
R
A
*Surface mounted to a 2" x 2" FR4 board, 4 layers 2 oz Cu
**Pin Fin heat sink also available as a separate item
21.5
0.85
22.0
0.87
32.0
1.26
32.0
1.26
4.0
0.16
6.3
0.25
ON–BOARD MOUNT
IN–BOARD MOUNT
(V•I Chip recessed into PCB)
mm
in
Figure 20—In-board mounting – package K
45
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
mm
in
Figure 21—On-board mounting – package F
V•I Chip Bus Converter
B048K120T10
Rev. 1.2
Page 10 of 16
PRELIMINARY
Configuration Options (Cont.)
21.5
0.85
22.0
0.87
32.0
1.26
32.0
1.26
14.0
0.56
11.7
0.46
ON–BOARD MOUNT
IN–BOARD MOUNT
with 0.25'' Pin Fins
(V•I Chip recessed into PCB)
with 0.25'' Pin Fins
mm
in
Figure 22— In-board with pin fins – package L
mm
in
Figure 23— On-board with pin fins – package G
Input reflected ripple
measurement point
F1
7A
Fuse
Enable/Disable Switch
C2
C1
8 µF
ceramic
+
+Out
+In
R1
0.30 Ω
0.47 µF
ceramic
PC
R2
2K Ω
SG
D1
SW1
R3
0.1 Ω
Load
BCM
C3
TM
–In
1 µF
ceramic
–
–Out
+
Temperature Monitor
–
Notes:
Source inductance should be no more than 200 nH. If source inductance is
greater than 200 nH, additional bypass capacitance is required.
C3 should be placed close to the load.
D1 power good indicator will dim when a module fault is detected.
TM should always be referenced to SG.
Figure 24—BCM test circuit
Application Note
Parallel Operation
The BCM will inherently current share when properly
configured in an array of BCMs. Arrays may be used for
higher power or redundancy in an application.
delivered to the load is larger than that sourced from the input,
allowing traces to be utilized on the input side if necessary. The
use of dedicated power planes is, however, preferable.
Current sharing accuracy is maximized when the source and
load impedance presented to each BCM within an array are equal.
The BCM power train and control architecture allow
bi-directional power transfer, including reverse power
processing from the BCM output to its input. Reverse power
transfer is enabled if the BCM input is within its operating
range and the BCM is otherwise enabled. The BCM’s ability to
process power in reverse improves the BCM transient response
to an output load dump.
The recommended method to achieve matched impedances is to
dedicate common copper planes within the PCB to deliver and
return the current to the array, rather than rely upon traces of
varying lengths. In typical applications the current being
45
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
V•I Chip Bus Converter
B048K120T10
Rev. 1.2
Page 11 of 16
PRELIMINARY
Thermal Management
The high efficiency of the V•I Chip results in relatively low
power dissipation and correspondingly low generation of heat.
The heat generated within internal semiconductor junctions is
coupled with low effective thermal resistances, RθJC and RθJB,
to the V•I Chip case and its Ball Grid Array allowing thermal
management flexibility to adapt to specific application
requirements (Fig. 25).
CASE 1 Convection via optional Pin Fins to air (Pin Fins
available mounted to the V•I Chip or as a separate item.)
If the application is in a typical environment with forced
convection over the surface of the PCB and greater than 0.4"
headroom, a simple thermal management strategy is to procure
V•I Chips with the Pin Fin option. The total Junction-toAmbient thermal resistance, RθJA, of a surface mounted
V•I Chip with integral 0.25" Pin Fins is 5 °C/W in 300 LFM air
flow (Fig.27). At full rated output power of 100 W, the heat
generated by the BCM is approximately 4 W (Fig.6). Therefore,
the junction temperature rise to ambient is approximately 20°C.
Given a maximum junction temperature of 125°C, a
temperature rise of 20°C allows the V•I Chip to operate at rated
output power at up to 105°C ambient temperature. At 50 W of
output power, operating ambient temperature extends to 115°C.
CASE 2—Conduction to the PCB
The low thermal resistance Junction-to-BGA, RθJB, allows
use of the PCB to exchange heat from the V•I Chip,
including convection from the PCB to the ambient or
conduction to a cold plate.
The PCB may also be coupled to a cold plate by low thermal
resistance standoff elements as a means of achieving effective
cooling for an array of V•I Chips, without a direct interface to
their case.
CASE 3—Combined direct convection to the air and
conduction to the PCB.
Parallel use of the V•I Chip internal thermal resistances
(including Junction-to-Case and Junction-to-BGA) in series
with external thermal resistances provides an efficient thermal
management strategy as it reduces total thermal resistance. This
may be readily estimated as the parallel network of two pairs of
series configured resistors.
The TM (Temperature Monitor) port monitors the V•I Chip
junction temperature and provides feedback and validation of
the thermal management of V•I Chips, as applied in diverse
power systems and environments.
210
180
Output Power
BCM Application Circuit
150
120
90
60
30
0
-40
The thermal resistance of the PCB to the surrounding
environment in proximity to V•I Chips may be reduced by low
profile heat sinks surface mounted to the PCB.
0
20
40
60
80
100
120
140
Operating Junction Temperature
Figure 26— Thermal derating curve
BCM with 0.25'' optional Pin Fins
10
9
8
Tja
For example, with a V•I Chip surface mounted on a 2" x 2"
area of a multi-layer PCB, with an aggregate 8 oz of effective
copper weight, the total Junction-to-Ambient thermal
resistance, RθJA, is 6.5 °C/W in 300 LFM air flow (see
Thermal Resistance section, page 1). Given a maximum
junction temperature of 125°C and 4 W dissipation at 100 W of
output power, a temperature rise of 26°C allows the V•I Chip to
operate at rated output power at up to 99°C ambient temperature.
-20
7
6
5
θJC = 1.1 °C/W
4
θJB = 2.1 °C/W
3
0
100
200
300
400
500
600
Airflow (LFM)
Figure 25—Thermal resistance
45
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
Figure 27—Junction-to-ambient thermal resistance of BCM
with 0.25" Pin Fins (Pin Fins available mounted to the V•I
Chip or as a separate item.)
V•I Chip Bus Converter
B048K120T10
Rev. 1.2
Page 12 of 16
PRELIMINARY
Application Note (continued)
V•I Chip BUS CONVERTER LEVEL 1 DC BEHAVIORAL MODEL for 48V to 12V, 100W
ROUT
IOUT
+
+
32 mΩ
1/
4
VIN
V•I
• Iout
+
+
–
IQ
52 mA
1/
4 • Vin
VOUT
–
K
-
–
©
Figure 28—This model characterizes the DC operation of the V•I Chip bus converter, including the converter transfer function
and its losses. The model enables estimates or simulations of output voltage as a function of input voltage and output load, as
well as total converter power dissipation or heat generation.
V•I Chip BUS CONVERTER LEVEL 2 TRANSIENT BEHAVIORAL MODEL for 48V to 12V, 100W
8.5 nH
ROUT
IOUT
L IN = 20 nH
+
32 mΩ
RCIN
2.0 mΩ
CIN
VIN
2 µF
IQ
52 mA
1/
4•
40 mΩ
V•I
Iout
+
+
–
1/ •
4
LOUT = 1.6 nH
RCOUT
+
0.5 mΩ
Vin
COUT
7 µF
VOUT
–
K
–
–
©
Figure 29—This model characterizes the AC operation of the V•I Chip bus converter including response to output load or input
voltage transients or steady state modulations. The model enables estimates or simulations of input and output voltages under
transient conditions, including response to a stepped load with or without external filtering elements.
45
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
V•I Chip Bus Converter
B048K120T10
Rev. 1.2
Page 13 of 16
PRELIMINARY
Application Note (continued)
V•I Chip Handling and Solderability
The product should remain in its package in a dry environment
until ready for use.
The following table shows the soldering requirements for both
the BGA in-board surface mount package and the J-lead
on-board surface mount package.
Solder Paste
Stencil Thickness
Stencil Aperture
Placement
Acceleration Rate
BGA Package
63/37 "No Clean"*
4-6 mil
20 mil; 1:1 ratio
Within 50% of pad center
<500 in/sec2
The reflow process should use industry standard Surface Mount
Technology (SMT) conditions. The exact conditions will
depend upon the solder paste manufacturer’s recommendations.
Under no circumstance should the case temperature exceed
208°C. Refer to Fig. 30 for a suggested thermal profile.
J-Lead Package
63/37 "No Clean"
4-6 mil
0.8-0.9:1 ratio
± 5 mil
<500 in/sec2
*Halide free water washable 63/37 Flux paste can be used for the BGA version
package only. Please consult our Application Engineers for further information.
Figure 30—Thermal profile diagram
45
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
V•I Chip Bus Converter
B048K120T10
Rev. 1.2
Page 14 of 16
Application Note (continued)
PRELIMINARY
Input Impedance Recommendations
Input Fuse Recommendations
To take full advantage of the BCM capabilities, the impedance
presented to its input terminals must be low from DC to
approximately 5 MHz. The source should exhibit low inductance
(less than 100 nH) and should have a critically damped response.
If the interconnect inductance exceeds 100 nH, the BCM input
pins should be bypassed with an RC damper (e.g., 8 µF in series
with 0.3 ohm) to retain low source impedance and stable
operations. Given the wide bandwidth of the BCM, the source
response is generally the limiting factor in the overall system
response.
V•I Chips are not internally fused in order to provide flexibility
in power system configuration. However, input line fusing of V•I
Chips must always be incorporated within the power system.
A fast acting fuse, such as NANO2 FUSE 451 Series 7 A 125 V,
is required to meet safety agency Conditions of Acceptability.
The input line fuse should be placed in series with the +IN port.
Anomalies in the response of the source will appear at the output
of the BCM multiplied by its K factor. The DC resistance of the
source should be kept as low as possible to minimize voltage
deviations. This is especially important if the BCM is operated
near low or high line as the over/under voltage detection circuitry
could be activated.
Warranty
Vicor products are guaranteed for two years from date of shipment against defects in material or workmanship when in normal use
and service. This warranty does not extend to products subjected to misuse, accident, or improper application or maintenance. Vicor
shall not be liable for collateral or consequential damage. This warranty is extended to the original purchaser only.
EXCEPT FOR THE FOREGOING EXPRESS WARRANTY, VICOR MAKES NO WARRANTY, EXPRESS OR IMPLIED, INCLUDING,
BUT NOT LIMITED TO, THE WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
Vicor will repair or replace defective products in accordance with its own best judgement. For service under this warranty, the buyer
must contact Vicor to obtain a Return Material Authorization (RMA) number and shipping instructions. Products returned without
prior authorization will be returned to the buyer. The buyer will pay all charges incurred in returning the product to the factory. Vicor
will pay all reshipment charges if the product was defective within the terms of this warranty.
Information published by Vicor has been carefully checked and is believed to be accurate; however, no responsibility is assumed for
inaccuracies. Vicor reserves the right to make changes to any products without further notice to improve reliability, function, or
design. Vicor does not assume any liability arising out of the application or use of any product or circuit; neither does it convey any
license under its patent rights nor the rights of others. Vicor general policy does not recommend the use of its components in life
support applications wherein a failure or malfunction may directly threaten life or injury. Per Vicor Terms and Conditions of Sale, the
user of Vicor components in life support applications assumes all risks of such use and indemnifies Vicor against all damages.
45
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
V•I Chip Bus Converter
B048K120T10
Rev. 1.2
Page 15 of 16
Vicor’s comprehensive line of power solutions includes high density AC-DC
and DC-DC modules and accessory components, fully configurable AC-DC
and DC-DC power supplies, and complete custom power systems.
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is
assumed by Vicor for its use. Vicor components are not designed to be used in applications, such as life
support systems, wherein a failure or malfunction could result in injury or death. All sales are subject to
Vicor’s Terms and Conditions of Sale, which are available upon request.
Specifications are subject to change without notice.
Intellectual Property Notice
Vicor and its subsidiaries own Intellectual Property (issued U.S. and Foreign Patents and
pending patent applications) relating to the product described in this data sheet including;
• The electrical and thermal utility of the V•I Chip package
• The design of the V•I Chip package
• The Power Conversion Topology utilized in the V•I Chip package
• The Control Architecture utilized in the V•I Chip package
• The Factorized Power Architecture.
Purchase of this product conveys a license to use it. However, no responsibility is assumed
by Vicor for any infringement of patents or other rights of third parties which may result
from its use. Except for its use, no license is granted by implication or otherwise under any
patent or patent rights of Vicor or any of its subsidiaries.
Anybody wishing to use Vicor proprietary technologies must first obtain a license. Potential
users without a license are encouraged to first contact Vicor’s Intellectual Property Department.
Vicor Corporation
25 Frontage Road
Andover, MA, USA 01810
Tel: 800-735-6200
Fax: 978-475-6715
Email
Vicor Express: [email protected]
Technical Support: [email protected]
45
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
V•I Chip Bus Converter
B048K120T10
Rev. 1.2
Page 16 of 16
11/03/10M