Eutech EUP2618 Triple adjustable output tft-lcd dc-dc converter Datasheet

Preliminary
EUP2618
Triple Adjustable Output
TFT-LCD DC-DC Converters
DESCRIPTION
FEATURES
The EUP2618 triple-output DC-DC converter provides the
regulated voltages required by active-matrix, thin-film
transistor (TFT) liquid-crystal displays (LCDs). One
high-power DC-DC converter and two low-power charge
pumps convert the 3.3V to 5V input supply voltage into
three independent output voltages.
The primary 1.2MHz DC-DC converter generates a boosted
output voltage (VMAIN) up to 18V using ultra-small
inductors and ceramic capacitors. The low-power control
circuitry and the low on-resistance (0.2Ω) of the integrated
power MOSFET allows efficiency up to 92%.
z
1.2MHz Current-Mode PWM Boost Regulator
Up to 18V Main High-Power Output
2.1A, 0.2Ω Power MOSFET
92% High Efficiency
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Dual Adjustable Charge-Pump Outputs
Up to 40V Positive Output
Down to -40V Negative Output
Internal Power-up Sequencing
2.5V to 5.5V Input Range
0.1µA Shutdown Current
0.7mA Quiescent Current
Internal Soft-Start
Power-Ready Output
Ultra-Small External Components
Thin TSSOP-16 Package
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RoHS Compliant and 100% Lead (Pb)-Free
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The dual charge pumps independently regulate one positive
output (VPOS) and one negative output (VNEG). These
low-power outputs use external diode and capacitor stages
to regulate output voltages up to 40V and down to -40V.
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For EUP2618, the supply sequence is VMAIN first, VNEG
next, and finally VPOS. The EUP2618 soft-starts each
supply as soon as the previous supply finishes.
The EUP2618 are available in the ultra-thin TSSOP-16
package.
APPLICATIONS
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Typical Application Circuit
Figure 1.
DS2618 Ver0.1
Nov. 2007
1
TFT Active-Matrix LCD Displays
Passive-Matrix LCD Displays
PDAs
Digital Still Cameras
Camcorders
Preliminary
Block Diagram
Figure 2.
DS2618 Ver0.1
Nov. 2007
2
EUP2618
Preliminary
EUP2618
Pin Configurations
Package Type
Pin Configurations
TSSOP-16
Pin Description
PIN
1
NAME
2
FB
3
COMP
4
IN
5
GND
6
REF
7
FBP
8
FBN
9
SHDN
10
DRVN
Active-Low Logic-Level Shutdown Input. Connect SHDN to IN for normal operation.
Negative Charge-Pump Driver Output. Output high level is VSUPN, and low level is TGND.
11
SUPN
Negative Charge-Pump Driver Supply Voltage. Bypass to TGND with a 0.1µF capacitor.
12
DRVP
Positive Charge-Pump Driver Output. Output high level is VSUPP, and low level is TGND.
13
SUPP
Positive Charge-Pump Driver Supply Voltage. Bypass to TGND with a 0.1µF capacitor.
14
TGND
15
LX
16
PGND
Power Ground of Charge-Pumps.
Main Boost Regulator Power MOSFET n-Channel Drain. Connect output diode and output
capacitor as close to PGND as possible.
Power Ground of Main Boost.
RDY
DS2618 Ver0.1
DESCRIPTION
Active-Low, Open-Drain Output. Indicates all outputs are ready. The on-resistance is 125Ω (typ).
Main Boost Regulator Feedback Input. Regulates to 1.25V nominal. Connect feedback resistive
divider to analog ground (GND).
Main Boost Compensation Network Connection.
Supply Input. 2.5V to 5.5V input range. Bypass with a 0.1µF capacitor between IN and GND, as
close to the pins as possible.
Analog Ground. Connect to power ground (PGND) underneath the IC.
Internal Reference Bypass Terminal. Connect a 0.22µF capacitor from this terminal to analog
ground (GND). External load capability to 100µA.
Positive Charge-Pump Regulator Feedback Input. Regulates to 1.25V nominal. Connect feedback
resistive divider to analog ground (GND).
Negative Charge-Pump Regulator Feedback Input. Regulates to 0V nominal.
Nov. 2007
3
Preliminary
EUP2618
Ordering Information
Order Number
Package Type
Marking
Operating Temperature range
EUP2618QIR1
TSSOP-16
xxxxx
EUP2618
-40 °C to 85°C
EUP2618
□ □ □
□
Lead Free Code
1: Lead Free 0: Lead
Packing
R: Tape & Reel
Operating temperature range
I: Industry Standard
Package Type
Q: TSSOP
DS2618 Ver0.1
Nov. 2007
4
EUP2618
Preliminary
Absolute Maximum Ratings
IN to GND ---------------------------------------------------------------------------- -0.3V to 6V
DRVN to GND ---------------------------------------------------------- -0.3V to (VSUPN +0.3V)
DRVP to GND ----------------------------------------------------------- -0.3V to (VSUPP +0.3V)
PGND ,TGND to GND --------------------------------------------------------------------- ±0.3V
RDY ,SUPP,SUPN to GND -------------------------------------------------------- -0.3V to 14V
LX to GND --------------------------------------------------------------------------- -0.3V to 19V
COMP, SHDN ,REF, FB ,FBN, FBP to GND ------------------------ -0.3V to (VIN +0.3V)
Operating Temperature --------------------------------------------------------- -40°C to 85°C
Junction Temperature ------------------------------------------------------------------- 150°C
Storage Temperature ----------------------------------------------------------- -65°C to150°C
Lead Temp (Soldering, 10sec) --- --------------------------------------------------260°C
„
„
„
„
„
„
„
„
„
„
„
Electrical Characteristics
(Specfications in standard type face are for TA =25℃ and those with boldface type apply over the full Operating
Temperature Range (TA=-40℃ to 85℃). VIN=3.3V, VSUPP=VSUPN=10V ,GND=PGND=TGND=0, unless otherwise
noted.)
EUP2618
Parameter
Conditions
Unit
Min. Typ. Max.
Operating Power
Input Supply Voltage Range
VIN Under Voltage Lockout
Quiescent Current
Shutdown Current
Thermal Shutdown
2.5
5.5
V
Falling
1.9
2.13
2.35
V
Rising
2
2.23
2.45
V
0.7
1
mA
2.1
4
mA
0.1
10
uA
VFB=VFBP=1.4V, VFBN=0V ,
not switching
VFB=1.1V, VFBP=1.4V, VFBN=0V
switching
V SHDN =GND
15℃ Hysteresis
165
℃
Reference
Reference Voltage
IVREF=100uA
1.25
1.28
V
Line Regulation
IVREF=100uA, VIN=2.5~5V
2
5
mV
Load Regulation
IVREF=0~100uA
1
5
mV
1.25
1.28
V
1.22
EA (Error Amplifier)
Feedback Voltage
1.22
Input Bias Current
VFB=1.25V
100
200
nA
Feedback Voltage Line Regulation
2.5V<VDD<5.5V
0.07
0.15
%/V
Error Amp Transconductance
∆I=2uA
60
90
umho
Error Amp Voltage Gain
FB to COMP
30
853
V/V
Oscillator
Operating Frequency
Maximum Duty
1000
1200
85
96
1.5
2.1
1500
kHz
%
N-Channel Switch
Switch Current Limit
DS2618 Ver0.1
Nov. 2007
65% Duty Cycle
5
2.8
A
EUP2618
Preliminary
Electrical Characteristics (continued)
(Specfications in standard type face are for TA =25℃ and those with boldface type apply over the full Operating
Temperature Range (TA=-40℃ to 85℃). VIN=3.3V, VSUPP=VSUPN=10V ,GND=PGND=TGND=0, unless otherwise
noted.)
EUP2618
Parameter
Conditions
Unit
Min.
Typ.
Max.
Switch RDSON
ILX=200mA
0.2
Ω
0.4
Switch Leakage Current
VLX=18V
0.01
20
uA
0.8
V
Control Inputs Characteristics (SHDN)
SHDN Low Threshold
SHDN High Threshold
SHDN Pin Pull Up Current
V
1.8
SHDN=GND
0.001
1
uA
Soft Start & Fault Detect Time
Channel 1 Soft Start Time
14
ms
Channel 2 Soft Start Time
3.5
ms
Channel 3 Soft Start Time
3.5
ms
Channel 1 Fault Protect Trigger Time
55
ms
Channel 2 Fault Protect Trigger Time
14
ms
Channel 3 Fault Protect Trigger Time
14
ms
FB Fault Protection Voltage
1
1.1
1.2
V
FBN Fault Protection Voltage
0.08
0.13
0.18
V
FBP Fault Protection Voltage
1
1.1
1.2
V
Charge Pump Regulator Characteristics
VSUPP Input Supply Range
5
13.5
V
VSUPN Input Supply Range
5
13.5
V
FBN Threshold Voltage
-50
50
mV
FBP Threshold Voltage
1.208
1.308
V
1.258
FBN Input Bias Current
VFBN=-0.05V
-50
50
nA
FBP Input Bias Current
VFBP=-1.5V
-50
50
nA
fOSC/2
Charge Pump Frequency
OUT2 Switch R-on
OUT3 Switch R-on
Continuous Output Current
DS2618 Ver0.1
Nov. 2007
kHz
PMOS
IOUT2=10mA
3
20
NMOS
IOUT2=-10mA
3
20
PMOS
IOUT3=10mA
3
20
NMOS
IOUT3=-10mA
3
20
Ω
Ω
Ω
Ω
30
mA
Test Condition TA=25℃
6
Preliminary
Typical Characteristics
DS2618 Ver0.1
Nov. 2007
7
EUP2618
Preliminary
DS2618 Ver0.1
Nov. 2007
8
EUP2618
Preliminary
DS2618 Ver0.1
Nov. 2007
9
EUP2618
Preliminary
Detailed Description
Main Boost Converter Operations
In steady state operating and continuous conduction
mode where the inductor current is continuous, the boost
converter operates in two cycles. During the first cycle,
the internal power FET turns on and the Schottky diode
is reverse biased and cuts off the current flow to the
output. The output current is supplied from the output
capacitor. The voltage across the inductor is VIN and the
inductor current ramps up in a rate of VIN/L, L is the
inductance. The inductance is magnetized and energy is
stored in the inductor. The change in inductor current is:
∆I
L
= ∆T2 ×
∆T2 =
V −V
IN
MAIN
L
1- D
F
LX
For stable operation, the same amount of energy stored
in the inductor must be taken out. The change in
inductor current during the two cycles must be the same.
∆I1+∆I2=0
D
F
LX
×
V −V
MAIN = 0
IN + 1 − D × IN
L
L
F
LX
V
V
MAIN = 1
1− D
V
IN
Output Voltage
An external feedback resistor divider is required to
divide the output voltage down to the nominal 1.25V
reference voltage. The current drawn by the resistor
network should be limited to maintain the overall
converter efficiency. The maximum value of the resistor
network is limited by the feedback input bias current and
the potential for noise being coupled into the feedback
pin. Selecting R2 in the range of 10kΩ to 50 kΩ. The
boost converter output voltage s determined by the
relationship:
 R 
V
=V
× 1 + 1 
MAIN
FB
 R 2 
The nominal VFB voltage is 1.25V
DS2618 Ver0.1
Nov. 2007
EUP2618
Dual Charge-Pump Regulator
The EUP2618 contain two individual low-power charge
pumps. One charge pump inverts the supply voltage
(SUPN) and provides a regulated negative output voltage.
The second charge pump doubles the supply voltage
(SUPP) and provides a regulated positive output voltage.
The EUP2618 contain internal p-channel and n-channel
MOSFETs to control the power transfer. The internal
MOSFETs switch at a constant 600kHz (0.5 x fOSC).
Negative Charge Pump
During the first half-cycle, the p-channel MOSFET turns
on and the flying capacitor C5 charges to VSUPN minus a
diode drop. During the second half-cycle, the p-channel
MOSFET turns off, and the n-channel MOSFET turns on,
level shifting C5. This connects C5 in parallel with the
reservoir capacitor C6. If the voltage across C6 minus a
diode drop is lower than the voltage across C5, charge
flows from C5 to C6 until the diode (D5) turns off. The
amount of charge transferred to the output is controlled by
the variable n-channel on-resistance.
Positive Charge Pump
During the first half-cycle, the n-channel MOSFET turns
on and charges the flying capacitor C3. This initial charge
is controlled by the variable n-channel on resistance.
During the second half-cycle, the n-channel MOSFET
turns off and the p-channel MOSFET turns on, level
shifting C3 by VSUPP volts. This connects C3 in parallel
with the reservoir capacitor C4. If the voltage across C4
plus a diode drop (VPOS + VDIODE) is smaller than the
level-shifted flying capacitor voltage (VC3 + VSUPP),
charge flows from C3 to C4 until the diode (D3) turns off.
Shutdown
A logic-low level on SHDN disables all three EUP2618
converters and the reference. When shut down, supply
current drops to 0.1µA to maximize battery life and the
reference is pulled to ground. The output capacitance and
load current determine the rate at which each output
voltage will decay. A logic-level high on SHDN power
activates the EUP2618 (see the Power-Up Sequencing
section). Do not leave SHDN floating. If unused,
connect SHDN to GND.
Power-Up Sequencing
Upon power-up or exiting shutdown, the EUP2618 start
their respective power-up sequences.
The reference powers up first, then the main DC-DC
step-up converter powers up with softstart enabled. Once
the main step-up converter reaches regulation, the
negative charge pump turns on. The positive charge pump
starts up. Finally, when the positive output voltage
reaches 88% of its nominal value (VFBP > 1.1V), the
active-low ready signal ( RDY ) goes low (see the Power
Ready section).
10
EUP2618
Preliminary
Power Ready
Power ready is an open-drain output. When the power up
sequence is properly completed, the MOSFET turns on
and pulls RDY low with a typical 125Ω on-resistance.
If a fault is detected, the internal open-drain MOSFET
appears as a high impedance. Connect a 100kΩ pullup
resistor between RDY and IN for a logic level output.
Input Capacitor
The value of the input capacitor depends the input and
output voltages, the maximum output current, the inductor
value and the noise allowed to put back on the input line.
For most applications, a minimum 10µF is required. For
applications that run close to the maximum output current
limit, input capacitor in the range of 22µF to 47µF is
recommended. The EUP2618 is powered from the VIN.
High frequency 0.1µF by-pass cap is recommended to be
close to the VIN pin to reduce supply line noise and
ensure stable operation.
Fault Detection
Once RDY is low and if any output falls below its
fault-detection threshold, RDY goes high impedance.
For the main boost converter, the fault threshold is 88%
of its nominal value (VFB < 1.1V). For the negative
charge pump, the fault threshold is approximately 90%
of its nominal value (VFBN < 130mV). For the positive
charge pump, the fault threshold is 88% of its nominal
value (VFBP < 1.1V).
Once an output faults, all outputs later in the power
sequence shut down until the faulted output rises above
its power-up threshold.
Rectifier Diode
Use a Schottky diode with an average current rating equal
to or greater than the peak inductor current, and a voltage
rating at least 1.5 times the main output voltage (VMAIN).
Charge Pump
Efficiency Considerations
The efficiency characteristics of the EUP2618 regulated
charge pumps are similar to a linear regulator. They are
dominated by quiescent current at low output currents and
by the input voltage at higher output currents (see the
Typical Operating Characteristics). So the maximum
efficiency can be approximated by:
Inductor Selection
The inductor selection determines the output ripple
voltage, transient response, output current capability, and
efficiency. Its selection depends on the input voltage,
output voltage, switching frequency, and maximum
output current. For most applications, a 4.7µH to 10uH
inductor is recommended for 1.2MHz application. The
inductor maximum DC current specification must be
greater than the peak inductor current required by the
regulator. The peak inductor current can be calculated:
I
L(PEAK)
=
I
Efficiency ≅ V
Efficiency ≅ V
×V
V × (V
−V )
IN
MAIN
IN
MAIN
+ 1/2 ×
L×V
× FREQ
V
MAIN
IN
POS
/[V
× ( N + 1)];
SUPP
for the positive charge pump
where N is the number of charge-pump stages.
Output Voltage Selection
Adjust the positive output voltage by connecting a voltagedivider from the output (VPOS) to FBP to GND (see the
Typical Operating Circuit). Adjust the negative output
voltage by connecting a voltage-divider from the output
(VNEG) to FBN to REF. Select R4 and R6 in the 50kΩ to
100kΩ range. Higher resistor values improve efficiency at
low output current but increase output-voltage error due to
the feedback input bias current. Calculate the remaining
resistors with the following equations:
Output Capacitor
Low ESR capacitors should be used to minimized the
output voltage ripple. Multilayer ceramic capacitors
(X5R and X7R) are preferred for the output capacitors
because of their lower ESR and small packages.
Tantalum capacitors with higher ESR can also be used.
The output ripple can be calculated as:
I
×D
∆V = MAIN
+I
× ESR
O
MAIN
F
×C
LX
O
R3 = R4[(V
Choose an output capacitor to satisfy the output ripple
and load transient requirement. A 10µF to 22µF ceramic
capacitor is suitable for most application.
For noise sensitive application, a 0.1µF placed in
parallel with the larger output capacitor is recommended
to reduce the switching noise coupled from the LX
switching node.
Nov. 2007
/[V
× N];
SUPN
for the negative charge pump
MAIN
DS2618 Ver0.1
NEG
R5 = R6(V
POS
POS
/V
) − 1]
REF
/V
)
REF
where VREF = 1.25V. VPOS can range from VSUPP to 40V,
and VNEG can range from 0 to -40V.
11
Preliminary
Flying Capacitor
Increasing the flying capacitor’s value reduces the
output current capability. Above a certain point,
increasing the capacitance has a negligible effect
because the output current capability becomes
dominated by the internal switch resistance and the
diode impedance. Start with 0.1µF ceramic capacitors.
Smaller values can be used for low-current applications.
Charge-Pump Output Capacitor
Increasing the output capacitance or decreasing the ESR
reduces the output ripple voltage and the peak-to-peak
transient voltage. Use the following equation to
approximate the required capacitor value:
C OUT ≥ [I
OUT
/(600kHz × VRIPPLE )]
Use a bypass capacitor with a value equal to or greater
than the flying capacitor. Place the capacitor as close to
the IC as possible. Connect directly to TGND.
Charge-Pump Input Capacitor
Use a bypass capacitor with a value equal to or greater
than the flying capacitor. Place the capacitor as close to
the IC as possible. Connect directly to GND.
Rectifier Diode
Use Schottky diodes with a current rating equal to or
greater than 4 times the average output current, and a
voltage rating at least 1.5 times VSUPP for the positive
charge pump and VSUPN for the negative charge pump.
PC Board Layout and Grounding
Careful printed circuit layout is extremely important to
minimize ground bounce and noise. First, place the main
boost-converter output diode and output capacitor less
than 0.2in (5mm) from the LX and PGND pins with
wide traces and no vias. Then place 0.1µF ceramic
bypass capacitors near the charge-pump input pins
(SUPP and SUPN) to the PGND pin. Keep the charge
pump circuitry as close to the IC as possible, using wide
traces and avoiding vias when possible. Locate all
feedback resistive dividers as close to their respective
feedback pins as possible. The PC board should feature
separate GND and PGND areas connected at only one
point under the IC. To maximize output power and
efficiency and to minimize output-power ripple voltage,
use extra wide power ground traces and solder the IC’s
power ground pin directly to it. Avoid having sensitive
traces near the switching nodes and high-current lines.
DS2618 Ver0.1
Nov. 2007
12
EUP2618
EUP2618
Preliminary
Packaging Information
TSSOP-16
SYMBOLS
A
A1
b
E1
D
E
e
L
DS2618 Ver0.1
Nov. 2007
MILLIMETERS
MIN.
MAX.
1.20
0.00
0.15
0.19
0.30
4.40
5.00
6.20
6.60
0.65
0.45
0.75
13
INCHES
MIN.
0.000
0.007
MAX.
0.047
0.006
0.012
0.173
0.197
0.244
0.260
0.026
0.018
0.030
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