CYSTEKEC MTB095N10KRL3 N-channel enhancement mode mosfet Datasheet

Spec. No. : C714L3
Issued Date : 2017.06.19
Revised Date : 2017.07.20
Page No. : 1/9
CYStech Electronics Corp.
N-Channel Enhancement Mode MOSFET
MTB095N10KRL3
BVDSS
ID @ VGS=10V, TA=25°C
Features
• Low Gate Charge
• Simple Drive Requirement
• ESD protected gate
• Pb-free lead plating & Halogen-free package
Equivalent Circuit
100V
RDSON@VGS=10V, ID=2A
RDSON@VGS=4.5V, ID=2A
3.3A
107mΩ (typ.)
127mΩ (typ.)
Outline
MTB095N10KRL3
SOT-223
D
G:Gate D:Drain
S:Source
D
S
G
Ordering Information
Device
MTB095N10KRL3-0-T3-G
Package
SOT-223
(Pb-free lead plating & Halogen-free package)
Shipping
2500 pcs / Tape & Reel
Environment friendly grade : S for RoHS compliant products, G for RoHS
compliant and green compound products
Packing spec, T3 : 2500 pcs / tape & reel, 13” reel
Product rank, zero for no rank products
Product name
MTB095N10KRL3
Preliminary
CYStek Product Specification
Spec. No. : C714L3
Issued Date : 2017.06.19
Revised Date : 2017.07.20
Page No. : 2/9
CYStech Electronics Corp.
Absolute Maximum Ratings (TC=25°C, unless otherwise noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current @ TA=25°C, VGS=10V
Continuous Drain Current @ TA=70°C, VGS=10V
Pulsed Drain Current *1
Avalanche Current @ L=0.1mH
Avalanche Energy @ L=1mH, ID=6A, VDD=50V *2
Repetitive Avalanche Energy @ L=0.05mH
Total Power Dissipation @TA=25℃
Total Power Dissipation @TA=70℃
Operating Junction and Storage Temperature Range
Note : *1. Pulse width limited by maximum junction temperature
Symbol
Limits
VDS
VGS
100
±20
3.3
2.6
16
6
18
0.625
2.5
1.6
-55~+150
ID
IDM
IAS
EAS
EAR
PD
Tj, Tstg
Unit
V
A
mJ
W
°C
*2. Guaranteed by design, not by 100% test.
Thermal Data
Parameter
Thermal Resistance, Junction-to-case, max
Thermal Resistance, Junction-to-ambient, max
Symbol
RθJC
RθJA
Value
18.5
50 (Note)
Unit
°C/W
2
Note : When mounted on a 1 in pad of 2 oz. copper.
Characteristics (Tc=25°C, unless otherwise specified)
Symbol
Static
BVDSS
VGS(th)
GFS *1
IGSS
IDSS
RDS(ON)
*1
Dynamic
Qg *1, 2
Qgs *1, 2
Qgd *1, 2
td(ON) *1, 2
tr
*1, 2
td(OFF) *1, 2
tf *1, 2
MTB095N10KRL3
Min.
Typ.
Max.
100
1.2
-
2.9
107
127
2.6
±10
1
25
140
180
-
6.7
1.1
1.6
5.2
16.6
17
5.2
10
1.7
2.4
7.8
24.9
25.5
7.8
Unit
V
S
μA
mΩ
Test Conditions
VGS=0V, ID=250μA
VDS =VGS, ID=250μA
VDS =10V, ID=1A
VGS=±16V, VDS=0V
VDS =80V, VGS =0V
VDS =80V, VGS =0V, Tj=125°C
VGS =10V, ID=2A
VGS =4.5V, ID=2A
nC
VDS=80V, VGS=10V, ID=2A
ns
VDS=50V, ID=2A, VGS=10V, RG=1Ω
Preliminary
CYStek Product Specification
CYStech Electronics Corp.
Ciss
Coss
Crss
Source-Drain Diode
IS *1
ISM *3
VSD *1
trr
Qrr
-
301
29
8
452
44
12
-
0.88
18.3
9.8
3.3
16
1.2
-
pF
Spec. No. : C714L3
Issued Date : 2017.06.19
Revised Date : 2017.07.20
Page No. : 3/9
VGS=0V, VDS=50V, f=1MHz
A
V
ns
nC
IS=2A, VGS=0V
IF=2A, dIF/dt=100A/μs
Note : *1.Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2%
*2.Independent of operating temperature
*3.Pulse width limited by maximum junction temperature.
Recommended soldering footprint
MTB095N10KRL3
Preliminary
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C714L3
Issued Date : 2017.06.19
Revised Date : 2017.07.20
Page No. : 4/9
Typical Characteristics
Brekdown Voltage vs Junction Temperature
Typical Output Characteristics
1.4
ID, Drain Current (A)
14
BVDSS, Normalized Drain-Source
Breakdown Voltage
16
10V,9V,8V,7V,6V,5V,4.5V
12
4V
10
8
3.5V
6
4
VGS=3V
1.3
1.2
1.1
1
0.9
0.8
2
0.7
0
0.6
0
2
4
6
8
VDS, Drain-Source Voltage(V)
-75 -50 -25 0 25 50 75 100 125 150 175
Tj, Junction Temperature(°C)
10
Reverse Drain Current vs Source-Drain Voltage
Static Drain-Source On-State resistance vs Drain Current
1000
R DS(ON), Static Drain-Source On-State
Resistance(mΩ)
1.2
VSD, Source-Drain Voltage(V)
VGS=4.5V
10V
100
Tj=25°C
VGS=0V
1
0.8
Tj=150°C
0.6
0.4
0.2
10
0.01
0.1
1
ID, Drain Current(A)
0
10
R DS(ON), NormalizedStatic Drain-Source
On-State Resistance
350
300
2
4
6
IDR, Reverse Drain Current(A)
8
Drain-Source On-State Resistance vs Junction Tempearture
Static Drain-Source On-State Resistance vs Gate-Source
Voltage
R DS(ON), Static Drain-Source OnState Resistance(mΩ)
ID=250μA,
VGS=0V
ID=2A
250
200
150
100
50
2.4
2
VGS=10V, ID=2A
1.6
1.2
0.8
RDSON@Tj=25°C : 107mΩ typ.
0.4
0
0
0
MTB095N10KRL3
2
4
6
8
VGS, Gate-Source Voltage(V)
10
-75 -50 -25
Preliminary
0 25 50 75 100 125 150 175
Tj, Junction Temperature(°C)
CYStek Product Specification
Spec. No. : C714L3
Issued Date : 2017.06.19
Revised Date : 2017.07.20
Page No. : 5/9
CYStech Electronics Corp.
Typical Characteristics(Cont.)
Threshold Voltage vs Junction Tempearture
Capacitance vs Drain-to-Source Voltage
VGS(th) , Normalized Threshold Voltage
1000
Capacitance---(pF)
Ciss
100
C oss
10
Crss
1.5
1.3
ID=1mA
1.1
0.9
0.7
ID=250μA
0.5
1
0
5
10
15 20 25 30 35 40
VDS, Drain-Source Voltage(V)
45
-75 -50 -25
50
50
75 100 125 150 175
Gate Charge Characteristics
10
10
VDS=10V
VGS, Gate-Source Voltage(V)
GFS, Forward Transfer Admittance(S)
25
Tj, Junction Temperature(°C)
Forward Transfer Admittance vs Drain Current
1
VDS=15V
0.1
Pulsed
Ta=25°C
VDS=50V
8
VDS=80V
6
4
2
ID=2A
0
0.01
0.001
0.01
0.1
ID, Drain Current(A)
1
0
10
2
4
6
Qg, Total Gate Charge(nC)
8
Maximum Drain Current vs Junction Temperature
Maximum Safe Operating Area
4
100
ID, Maximum Drain Current(A)
RDS(ON)
Limited
10
ID, Drain Current(A)
0
10 μs
1
100μs
1ms
0.1
10ms
TA=25°C, Tj=150°C,
RθJA=50°C/W,
Single Pulse
0.01
100ms
DC
3.5
3
2.5
2
1.5
1
VGS=10V, RθJA=50°C/W
0.5
0
0.001
0.01
MTB095N10KRL3
0.1
1
10
100
VDS, Drain-Source Voltage(V)
1000
25
50
Preliminary
75
100
125
150
Tj, Junction Temperature(°C)
175
CYStek Product Specification
Spec. No. : C714L3
Issued Date : 2017.06.19
Revised Date : 2017.07.20
Page No. : 6/9
CYStech Electronics Corp.
Typical Characteristics(Cont.)
Typical Transfer Characteristics
16
50
VDS=10V
14
TJ(MAX) =150°C
TA=25°C
RθJA=50°C/W
40
12
10
Power (W)
ID, Drain Current (A)
Single Pulse Power Rating, Junction to Ambient
(Note on page 2)
8
6
30
20
4
10
2
0
0
2
4
6
8
VGS, Gate-Source Voltage(V)
10
0
0.0001
0.001
0.01
0.1
Pulse Width(s)
1
10
Transient Thermal Response Curves
r(t), Normalized Effective Transient Thermal
Resistance
1
D=0.5
1.RθJA(t)=r(t)*RθJA
2.Duty Factor, D=t1/t2
3.TJM-TA=PDM*RθJA(t)
4.RθJA=50°C/W
0.2
0.1
0.1
0.05
0.02
0.01
0.01
1.E-05
Single Pulse
1.E-04
1.E-03
1.E-02
1.E-01
1.E+00
1.E+01
t1, Square Wave Pulse Duration(s)
MTB095N10KRL3
Preliminary
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C714L3
Issued Date : 2017.06.19
Revised Date : 2017.07.20
Page No. : 7/9
Reel Dimension
Carrier Tape Dimension
MTB095N10KRL3
Preliminary
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C714L3
Issued Date : 2017.06.19
Revised Date : 2017.07.20
Page No. : 8/9
Recommended wave soldering condition
Product
Peak Temperature
Soldering Time
Pb-free devices
260 +0/-5 °C
5 +1/-1 seconds
Recommended temperature profile for IR reflow
Profile feature
Sn-Pb eutectic Assembly
Average ramp-up rate
3°C/second max.
(Tsmax to Tp)
Preheat
100°C
−Temperature Min(TS min)
−Temperature Max(TS max)
150°C
−Time(ts min to ts max)
60-120 seconds
Time maintained above:
−Temperature (TL)
183°C
− Time (tL)
60-150 seconds
Peak Temperature(TP)
240 +0/-5 °C
Time within 5°C of actual peak
10-30 seconds
temperature(tp)
Ramp down rate
6°C/second max.
6 minutes max.
Time 25 °C to peak temperature
Pb-free Assembly
3°C/second max.
150°C
200°C
60-180 seconds
217°C
60-150 seconds
260 +0/-5 °C
20-40 seconds
6°C/second max.
8 minutes max.
Note :1. All temperatures refer to topside of the package, measured on the package body surface.
2.For devices mounted on FR-4 PCB of 1.6mm or equivalent grade PCB. If other grade PCB is used, care
should be taken to match the coefficients of thermal expansion between components and PCB. If they are
not matched well, the solder joints may crack or the bodies of the parts may crack or shatter as the
assembly cools.
MTB095N10KRL3
Preliminary
CYStek Product Specification
Spec. No. : C714L3
Issued Date : 2017.06.19
Revised Date : 2017.07.20
Page No. : 9/9
CYStech Electronics Corp.
SOT-223 Dimension
A
Marking:
B095N
10KR
□□□□
Device Name
B
C
1
2
Date Code
3
1
D
E
F
H
G
2
3
Style: Pin 1.Gate 2.Drain 3.Source
a1
I
3-Lead SOT-223 Plastic
Surface Mounted Package
CYStek Package Code: L3
a2
*: Typical
Inches
Min.
Max.
0.1142
0.1220
0.2638
0.2874
0.1299
0.1457
0.0236
0.0315
*0.0906
0.2480
0.2638
DIM
A
B
C
D
E
F
Millimeters
Min.
Max.
2.90
3.10
6.70
7.30
3.30
3.70
0.60
0.80
*2.30
6.30
6.70
DIM
G
H
I
a1
a2
Inches
Min.
Max.
0.0551
0.0709
0.0098
0.0138
0.0008
0.0039
*13o
0o
10 o
Millimeters
Min.
Max.
1.40
1.80
0.25
0.35
0.02
0.10
*13o
0o
10 o
Notes: 1.Controlling dimension: millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material:
• Lead: Pure tin plated.
• Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0.
Important Notice:
• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
• CYStek reserves the right to make changes to its products without notice.
• CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
• CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
MTB095N10KRL3
Preliminary
CYStek Product Specification
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