NXP MF1ICS2005 Sawn bumped 120î¼m wafer addendum Datasheet

MF1 IC S20 05
Sawn bumped 120µm wafer addendum
Rev. 3.0 — 18 July 2007
Product data sheet
141130
PUBLIC
1. General description
The MF1 IC S20 05 is a contactless Smart Card IC designed for card IC coils following the
“Mifare card IC coil design guide” and is qualified to work properly in NXP´ reader
environment, which is built according to NXP´ specification.
This specification describes electrical, physical and dimensional properties of wafers.
2. Ordering information
Table 1.
Ordering information
Type number
Package
Name
MF1ICS2005W/U7D
Description
Ordering Code
Die on sawn wafer
9352 851 56005
3. Mechanical specification
3.1 Wafer
•
•
•
•
Diameter:
8”
Thickness:
120 µm ± 15 µm
Flatness:
not applicable
PGDW:
24892
3.2 Wafer backside
• Material:
• Treatment:
Si
ground and stress relieve
3.3 Chip dimensions
• Chip size:
• Scribe lines:
1.11 x 1.06 mm
x-line: 80 µm
y-line: 80 µm
3.4 Passivation
• Type:
• Material:
sandwich structure
PSG / Nitride
MF1 IC S20 05
NXP Semiconductors
Sawn bumped 120µm wafer addendum
• Thickness:
500 nm / 600 nm
3.5 Au bump
•
•
•
•
•
Bump material:
> 99.9% pure Au
Bump hardness:
35 – 80 HV 0.005
Bump shear strength:
> 70 MPa
Bump height:
18 µm
Bump height uniformity:
– within a die:
± 2 µm
– within a wafer:
± 3 µm
– wafer to wafer:
± 4 µm
± 1.5 µm
• Bump flatness:
• Bump size:
104 x 104 µm
– LA, LB, VSS1
–
89 x 104 µm
TESTIO1
• Bump size variation:
• Under bump metallization:
± 5 µm
sputtered TiW
Remark: Substrate is connected to VSS.
3.6 Fail die identification
Electronic wafer mapping covers the electrical test results and additionally the results of
mechanical/ visual inspection.
No inkdots are applied.
1.Pads VSS and TESTIO are disconnected when wafer is sawn.
141130
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 3.0 — 18 July 2007
2 of 7
MF1 IC S20 05
NXP Semiconductors
Sawn bumped 120µm wafer addendum
4. Limiting values
Table 2.
Limiting values[1][2][3]
In accordance with the Absolute Maximum Rating System (IEC 134)
Symbol
Parameter
Min
Max
Unit
IIN
Input Current
-
30
mA
PTOT
Total power dissipation per package
-
200
mW
TSTOR
Storage temperature
-55
125
°C
TOP
Operating temperature
-25
70
°C
2
-
kV
VESD
Electrostatic discharge voltage
ILU
Latch-up current
[4]
± 100
mA
[1]
Stresses above one or more of the limiting values may cause permanent damage to the device
[2]
These are stress ratings only. Operation of the device at these or any other conditions above those given in
the Characteristics section of the specification is not implied
[3]
Exposure to limiting values for extended periods may affect device reliability
[4]
MIL Standard 883-C method 3015; Human body model: C = 100 pF, R = 1.5 kW
5. Characteristics
Table 3.
Electrical characteristics [1][2][3]
Symbol
Parameter
fIN
Input frequency
CIN
Input capacitance
22 °C, Cp-D,
(LCR meter HP4258)
13.56 MHz, 2 V
Conditions
Typ
Max
Unit
-
13.56
-
MHz
14.4
16.1
17.4
pF
2.9
-
ms
tW
EEPROM write time
-
tRET
EEPROM data
retention
10
years
NWE
EEPROM write
endurance
105
cycles
[1]
Stresses above one or more of the limiting values may cause permanent damage to the device
[2]
These are stress ratings only. Operation of the device at these or any other conditions above those given in
the Characteristics section of the specification is not implied
[3]
Exposure to limiting values for extended periods may affect device reliability
141130
Product data sheet
Min
© NXP B.V. 2007. All rights reserved.
Rev. 3.0 — 18 July 2007
3 of 7
MF1 IC S20 05
NXP Semiconductors
Sawn bumped 120µm wafer addendum
6. Chip orientation and bond pad locations
PAD (center) x [µm]
VSS
0.0
0.0
252.2
602.3
LA
17.4
596.1
LB
712.4
0.0
TESTIO
Y
y [µm]
(1)
(5)
(6)
LA
TESTIO
(4)
LB
VSS
(8)
X
MF1ICS2005
(7)
(2)
(3)
(1)
(2)
(3)
(4)
X - Scribeline width:
Y- Scribeline width:
Chip step, x -length:
Chip step, y -length:
(5)
(6)
(7)
(8)
80 µm
80 µm
1.11 mm
1.06 mm
LA
LA
LB
LB
bump
bump
bump
bump
edge
edge
edge
edge
to
to
to
to
chip
chip
chip
chip
edge,
edge,
edge,
edge,
y-length: 106.5 µm
x-length: 103.0 µm
y-length: 133.4 µm
x-length: 88.6 µm
Fig 1. Chip orientation and bond pad locations
141130
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 3.0 — 18 July 2007
4 of 7
MF1 IC S20 05
NXP Semiconductors
Sawn bumped 120µm wafer addendum
7. References
•
•
•
•
•
Data sheet “General wafer specification for 8” wafers”
Data sheet “Standard card IC MF1 IC S50 memory contents after test”
Data sheet “Standard card IC MF1 IC S50 functional Specification”
Product qualification package “Standard card IC MF1 IC S50 05”
Application note “Mifare‚ card IC coil design guide”
8. Revision history
Table 4.
Revision history
Document ID Release date
Data sheet status
141130
Product data sheet
July 2007
Modifications:
Supersedes
•
The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP
Semiconductors.
•
Legal texts have been adapted to the new company name.
141130
Product data sheet
Change notice
© NXP B.V. 2007. All rights reserved.
Rev. 3.0 — 18 July 2007
5 of 7
MF1 IC S20 05
NXP Semiconductors
Sawn bumped 120µm wafer addendum
9. Legal information
9.1
Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
9.2
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
9.3
Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of a NXP Semiconductors product can reasonably be expected to
result in personal injury, death or severe property or environmental damage.
NXP Semiconductors accepts no liability for inclusion and/or use of NXP
Semiconductors products in such equipment or applications and therefore
such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
9.4
Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Mifare — is a trademark of NXP B.V.
10. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: [email protected]
141130
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 3.0 — 18 July 2007
6 of 7
MF1 IC S20 05
NXP Semiconductors
Sawn bumped 120µm wafer addendum
11. Tables
Table 1.
Table 2.
Ordering information . . . . . . . . . . . . . . . . . . . . .1
Limiting values[1][2][3] . . . . . . . . . . . . . . . . . . . . . .3
Table 3.
Table 4.
Electrical characteristics [1][2][3] . . . . . . . . . . . . . 3
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 5
12. Contents
1
2
3
3.1
3.2
3.3
3.4
3.5
4
5
6
7
8
9
9.1
9.2
9.3
9.4
10
11
12
General description . . . . . . . . . . . . . . . . . . . . . .
Ordering information . . . . . . . . . . . . . . . . . . . . .
Mechanical specification . . . . . . . . . . . . . . . . .
Wafer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Wafer backside . . . . . . . . . . . . . . . . . . . . . . . . .
Chip dimensions . . . . . . . . . . . . . . . . . . . . . . .
Passivation . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Au bump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . .
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . .
Chip orientation and bond pad locations . . . .
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Revision history . . . . . . . . . . . . . . . . . . . . . . . . .
Legal information. . . . . . . . . . . . . . . . . . . . . . . .
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contact information. . . . . . . . . . . . . . . . . . . . . .
Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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3
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6
7
7
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2007.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 18 July 2007
Document identifier: 141130
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