Analogic AAT3232IGV-3.0-T1 300ma cmos low drop out linear regulator Datasheet

$1$/2*,&
TM
7(&+
AAT3232
300mA CMOS Low Drop Out Linear Regulator
Features
The AAT3232 Low Dropout Linear Regulator is
ideal for portable applications where longer
battery life is critical. It features low quiescent
current (30µA typical) and low dropout voltage
(300mV max) at full output current. The device is
able to protect itself from short circuit conditions
with fold back current limiting. Thermal shutdown
is activated to prevent damage under extreme
conditions.
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The AAT3232 also features a low-power
shutdown mode for longer battery life. A pin is
provided to improve PSRR performance, by
connecting an external capacitor from the
AAT3232’s reference output to ground.
The AAT3232 is available in a space saving 5-pin
SOT-23 in 7 factory programmed voltages of
2.5V, 2.7V, 2.8V, 3.0V, 3.3V, 3.5V and 3.8V.
Low Dropout - 300mV (max) at 300mA
Guaranteed 300mA Output
High accuracy
30µA Quiescent Current
Current limit protection
Short circuit current fold back
Over-Temperature protection
Noise reduction bypass capacitor
Shutdown mode for longer battery life
Low Temperature coefficient
7 Factory programmed output voltages
SOT-23 5-pin package
Applications
•
•
•
•
Cellular Phones
Notebook Computers
Portable Communication Devices
Handheld Electronics
Typical Application
INPUT
OUTPUT
V IN
ENABLE
AAT3232
OUT
BYP
EN
GND
CIN
1nF
5.6µF ceramic or
10µF tantalum
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3232.2000.05.0.98
Preliminary Information
General Description
$1$/2*,&
TM
AAT3232
7(&+
300mA CMOS Low Drop Out Linear Regulator
Absolute Maximum Ratings (TA=25°C unless otherwise noted)
Symbol
VIN
IOUT
TJ
ΘJA
PD
TLEAD
Description
Input Voltage
DC Output Current
Operating Junction Temperature Range
Thermal Resistance (SOT-23-5)
Maximum Power Dissipation (SOT-23-5)
Maximum Soldering Temperature (at leads, 10 sec)
Max
Units
8
PD/(VIN-VO)
150
260
380
300
V
mA
°C
°C/W
mW
°C
Note: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at
conditions other than the operating conditions specified is not implied. Only one Absolute Maximum rating should be applied at any one
time.
Recommended Operating Conditions
Symbol
VIN
T
Description
Input Voltage
Ambient Temperature Range
Rating
Units
(VOUT+0.3) to 7
V
°C
-40 to +85
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
VOUT
IOUT
ISC
IQ
ISD
∆VOUT/
VOUT
∆VOUT/
VOUT
VDO
VENL
VENH
PSRR
TSD
THYS
eN
TC
Description
Output Voltage
Output Current
Short Circuit Current
Ground Current
Shutdown Current
Line Regulation
Load Regulation
Conditions
VOUT > 1.2V
VOUT < 0.4V
VIN = 5V, no load
VIN = 5V, EN = low
IOUT = 5mA, VIN = VOUT + 1
to VOUT + 2
Min
-1.5
300
IOUT = 1mA to 300mA
1
Dropout Voltage
Enable Threshold Low
Enable Threshold High
Power Supply Rejection Ratio
Over Temp Shutdown Threshold
Over Temp Shutdown Hysteresis
Output Noise
Ouput Voltage Temp. Coeff.
Typ
IOUT = 300mA
Max
Units
1.5
%
mA
mA
30
300
50
1
0.02
0.1
%
0.2
1
%
200
300
mV
V
V
dB
°C
°C
0.5
VIN-0.5
1 kHz
55
150
30
20
40
µA
µA
µVRMS
ppm/°C
Note 1: VDO is defined as VIN - VOUT when VOUT is 98% of nominal.
Advanced Analogic Technologies, Inc.
1250 Oakmead Pkwy, Suite 310, Sunnyvale, CA 94086
(408)524-9684 Fax (408)524-9689
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3232.2000.05.0.98
$1$/2*,&
TM
AAT3232
7(&+
300mA CMOS Low Drop Out Linear Regulator
Typical Characteristics
(Unless otherwise noted, VIN = VOUT + 1V, TA = 25°C, CNOISE = 10nF, CIN = 2.0µF, COUT = 5.6µF ceramic, IOUT = 100mA)
Ground Current vs. Input Voltage
Output Voltage vs. Load Current
60
3.34
Ta = -40°C
3.33
50
3.32
Ignd (µA)
Vout (V)
Ta = +125°C
40
3.31
Ta = +25°C
3.30
3.29
30
Ta = +25°C
20
3.28
Ta = +125°C
3.27
Ta = -40°C
10
3.26
0
3.25
300
2
Iout (mA)
60
300
50
200
40
100
30
0
20
-100
10
-200
0
-300
-10
-400
-500
100 200 300 400 500 600
Line Voltage (V)
400
Load Current (mA)
Output Voltage
(mV AC coupled)
70
0
6
8
Line Transient Response
Step Load Transient Response
-20
-200 -100
4
Vin (volts)
6
80
5
60
4
40
3
20
2
0
1
-20
0
-100
0
100
Time (us)
200
300
400
500
-40
600
Output Voltage
(mV AC coupled)
250
200
150
100
50
0
0
Time (us)
Advanced Analogic Technologies, Inc.
1250 Oakmead Pkwy, Suite 310, Sunnyvale, CA 94086
(408)524-9684 Fax (408)524-9689
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TM
AAT3232
7(&+
300mA CMOS Low Drop Out Linear Regulator
Power Supply Rejection Ratio
Output Noise
10
10nF
70
Noise (uV / Root Hz)
60
50
40
1nF
30
20
100pF
10
None
1
10nF
1nF
None
0
1.E+01
1.E+02
1.E+03
1.E+04
1.E+05
0.01
1.E+01
1.E+06
1.E+02
1.E+03
Power-Up, Power-Down Response
Input
Output
2
1
0
-20
-10
0
10
20
30
40
50
60
70
Output Voltage (V)
4
3
1.E+05
1.E+06
Turn On / Turn Off
6
5
1.E+04
Frequency (Hz)
Frequency (Hz)
Voltage (V)
100pF
0.1
12
6
10
4
8
2
6
Enable (V)
Rejection Ratio (dB)
80
0
100pF
4
-2
2
-4
10nF
1nF
0
-6
-2
0
2
4
Time (ms)
6
8
10
12
14
16
18
Time (ms)
Advanced Analogic Technologies, Inc.
1250 Oakmead Pkwy, Suite 310, Sunnyvale, CA 94086
(408)524-9684 Fax (408)524-9689
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3232.2000.05.0.98
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TM
7(&+
AAT3232
300mA CMOS Low Drop Out Linear Regulator
Pin Descriptions
Pin #
Symbol
Function
1
2
3
VIN
GND
EN
4
BYP
5
OUT
Input voltage pin – should be decoupled with 1µF or greater capacitor.
Ground connection pin
Enable pin – pin is internally pulled high. When pulled low the PMOS pass transistor
turns off and the device enters low-power mode, consuming less than 1µA.
Bypass capacitor connection -- to improve AC ripple rejection, connect a 1nF
capacitor to GND. This will also provide a soft start function.
Output pin – should be decoupled with 2.2µF or greater output capacitor. See
Detailed Description section for further information.
Functional Block Diagram
VIN
OUT
Over-Current
Protection
Over-Temp
Protection
EN
BYP
VREF
GND
Advanced Analogic Technologies, Inc.
1250 Oakmead Pkwy, Suite 310, Sunnyvale, CA 94086
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7(&+
TM
AAT3232
300mA CMOS Low Drop Out Linear Regulator
Detailed Description
Output Capacitor
Output capacitor size is dependent upon the
magnitude and the rate of change of the load
variation. 10 µF tantalum or 5.6 µF ceramic is
needed only if the load will change by 270 mA
(90% of Imax) in less than a couple of
microseconds. Smaller capacitors can be used if
the output current step size, or rate of change, is
less. (See graph titled Output Capacitance vs.
Load Current Step Size.) In addition, if adequate
bypassing is used at the load, the output capacitor
near the LDO can be reduced.
The AAT3232 has been optimized for operation
with capacitors that are not of the low series
resistance type. There are two benefits of using
an LDO designed to work with series resistance.
First, capacitors sized 10 µF or greater with low
ESR are generally more expensive than the
higher ESR types such as tantalum and
electrolytic. Secondly, output capacitors need not
be placed next to the regulator. Most applications
use a large higher-ESR capacitor placed near the
10
9
Capacitance (uF)
The AAT3232 is intended for use in systems
where minimal current consumption is desired.
During steady state operation, ground current is
30 µA typical. All remaining current is available to
run the load. This part can also be run with drop
out voltages as small as 300 mV allowing very
efficient systems to be designed. Several
compromises have been made for this device to
operate with both low steady state current
consumption and very low drop out voltage. The
primary compromise is the requirement of larger
capacitors over those required by other power
hungry high performance LDO’s. Since the
AAT3232 has considerably faster response than
some ultra low current consumption LDOs
available, it should not be considered a low
performance LDO. The second compromise is
the inability to sink current. If current is sourced
by the load rather than sunk by the load, the
AAT3232 will simply stop supplying current rather
than actively reducing the output voltage. As long
as the output voltage does not exceed the
absolute maximum specification, the AAT3232 will
not be damaged.
Output Capacitance vs.
Load Current Step Size
ESR = 1.0Ω
8
7
ESR = 0.01Ω
6
5
4
3
ESR = 0.5Ω
2
1
0
0
50
100
150
200
250
300
Step size (mA)
regulator and low ESR decoupling capacitors
placed near the load. In cases where very
compact design is desirable, a small 1206 case
size ceramic capacitor and the load are placed
and connected immediately adjacent to the LDO
and the trace from the output pin to the output
capacitor should have at least 5 milliohms of
resistance. For example at least ten squares
should be used on a one ounce copper layer.
Also see Layout Tips, below.
Enable
The enable pin is the on/off switch for the LDO.
When it is a logic high, the LDO is functioning
normally. When it is a logic low, the LDO is in a
low power, shut down mode. It has standard
CMOS voltage levels set by the AAT3232 input
voltage. Voltages at this terminal should be within
the absolute maximum rating (-0.5V, to Vin +
0.5V). The enable pin is internally pulled up so
that it may be left floating for normal operation.
However, since the pull up current is only 500 nA,
if open drain logic is used to drive the enable pin,
several hundred microseconds may be required
for the enable voltage to reach a logic high level.
Cnoise
The LDO's internal reference can be bypassed by
connecting a capacitor from BYP to GND,
reducing most of the internally generated noise
seen at the output. (See graph titled Output
Noise in the previous section.) A large capacitor
on Cnoise also improves the PSRR of the
AAT3232. (See graph titled Power Supply
Rejection Ratio) In addition, a large capacitor
Advanced Analogic Technologies, Inc.
1250 Oakmead Pkwy, Suite 310, Sunnyvale, CA 94086
(408)524-9684 Fax (408)524-9689
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3232.2000.05.0.98
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7(&+
TM
AAT3232
300mA CMOS Low Drop Out Linear Regulator
slows down the rate at which the reference turns
on. The result is that output voltage climbs slowly
when the LDO is turned on either by applying
power to the input terminal or by activating
Enable. (See graph titled Turn On / Turn Off.) As
a result, Cnoise can also be used as a soft start
adjustment.
Input Capacitor
The input capacitor has two purposes: The first is
to prevent load current surges from injecting noise
onto the line. The second is to prevent line noise
from affecting the operation of the regulator. In
most circuits, the same value capacitor is used for
input and output capacitors. If cost and space are
an issue, a ceramic capacitor of a few microfarads
works well.
Additional PSRR
In cases where greater PSRR than normally
provided by the AAT3232 is required, additional
filtering may be placed on the input line. This
allows the filter to drop voltage without affecting
the load voltage. For example, if the maximum
load required is 100mA, and a drop out voltage of
1.5 volts is available, then a 10 ohm resistor and a
6.8uF capacitor can be used as an input filter. For
optimal results, the input filter should be designed
to reject signals above one kilohertz, which is
where the AAT3232’s PSRR rolls off.
Layout
Since the AAT3232 is designed to operate with
series resistance, it is not necessary to have the
regulator close to the output capacitor. However,
if a ceramic output capacitor is used, a small
amount of ESR should be placed between the
output capacitor and the regulator; 10 squares of
trace on 1 oz. copper (about 5 mΩ ) is enough,
but 10 mΩ gives better results. The load should
be connected to the output capacitor’s side of the
resistive trace rather than the regulator’s side of
the resistive trace.
PC board layout guidelines (in order of
importance):
1. Cnoise capacitor to BYP and GND: Traces
should be kept short.
2. Input capacitor to Vin and GND: Traces
should be wide and short.
3. Filter resistor to Input capacitor (for the case
of additional PSRR filtering): Connection
need not be short but other loads should not
be connected to the LDO side of the resistor.
4. Enable is not sensitive to position.
Advanced Analogic Technologies, Inc.
1250 Oakmead Pkwy, Suite 310, Sunnyvale, CA 94086
(408)524-9684 Fax (408)524-9689
1-49
3232.2000.05.0.98
$1$/2*,&
TM
7(&+
AAT3232
300mA CMOS Low Drop Out Linear Regulator
Ordering Information
Output Voltage
Package
2.5V
2.7V
Marking
Part Number
Bulk
Tape and Reel
SOT-23-5
N/A
AAT3232IGV-2.5-T1
SOT-23-5
N/A
AAT3232IGV-2.7-T1
2.8V
SOT-23-5
N/A
AAT3232IGV-2.8-T1
3.0V
SOT-23-5
N/A
AAT3232IGV-3.0-T1
3.3V
SOT-23-5
N/A
AAT3232IGV-3.3-T1
3.5V
SOT-23-5
N/A
AAT3232IGV-3.5-T1
3.8V
SOT-23-5
N/A
AAT3232IGV-3.8-T1
Advanced Analogic Technologies, Inc.
1250 Oakmead Pkwy, Suite 310, Sunnyvale, CA 94086
(408)524-9684 Fax (408)524-9689
1-50
3232.2000.05.0.98
$1$/2*,&
7(&+
TM
AAT3232
300mA CMOS Low Drop Out Linear Regulator
Pin Configuration
5-lead SOT-23
(Top View)
VIN
GND
EN
1 5
2
3 4
VOUT
BYP
Package Information
SOT-23-5
e
Dim
S1
E
A
A1
A2
b
c
D
E
e
H
L
S
S1
Θ
H
D
A
A2
A1
S
b
Millimeters
Min
Max
1.00
1.30
0.00
0.10
0.70
0.90
0.35
0.50
0.10
0.25
2.70
3.10
1.40
1.80
1.90
2.60
3.00
0.37
0.45
0.55
0.85
1.05
1°
9°
Inches
Min
Max
0.039 0.051
0.000 0.004
0.028 0.035
0.014 0.020
0.004 0.010
0.106 0.122
0.055 0.071
0.075
0.102 0.118
0.015
0.018 0.022
0.033 0.041
1°
9°
c
I
L
Advanced Analogic Technologies, Inc.
1250 Oakmead Pkwy, Suite 310, Sunnyvale, CA 94086
(408)524-9684 Fax (408)524-9689
1-51
3232.2000.05.0.98
$1$/2*,&
7(&+
TM
AAT3232
300mA CMOS Low Drop Out Linear Regulator
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Advanced Analogic Technologies, Inc.
1250 Oakmead Pkwy, Suite 310, Sunnyvale, CA 94086
(408)524-9684 Fax (408)524-9689
1-52
3232.2000.05.0.98
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