LINER LTC4446 N-channel mosfet gate driver available in so-8 and 10-lead msop Datasheet

LTC4441/LTC4441-1
N-Channel MOSFET
Gate Driver
Features
n
n
n
n
n
n
n
n
n
n
n
Description
6A Peak Output Current
Wide VIN Supply Range: 5V to 25V
Adjustable Gate Drive Voltage: 5V to 8V
Logic Input Can Be Driven Below Ground
30ns Propagation Delay
Supply Independent CMOS/TTL Input Thresholds
Undervoltage Lockout
Low Shutdown Current: <12µA
Overtemperature Protection
Adjustable Blanking Time for MOSFET’s
Current Sense Signal (LTC4441)
Available in SO-8 and 10-Lead MSOP
(Exposed Pad) Packages
The LTC®4441/LTC4441-1 is an N-channel MOSFET gate
driver that can supply up to 6A of peak output current.
The chip is designed to operate with a supply voltage of
up to 25V and has an adjustable linear regulator for the
gate drive. The gate drive voltage can be programmed
between 5V and 8V.
The LTC4441/LTC4441-1 features a logic threshold driver
input. This input can be driven below ground or above the
driver supply. A dual function control input is provided to
disable the driver or to force the chip into shutdown mode
with <12µA of supply current. Undervoltage lockout and
overtemperature protection circuits will disable the driver
output when activated. The LTC4441 also comes with an
open-drain output that provides adjustable leading edge
blanking to prevent ringing when sensing the source current of the power MOSFETs.
Applications
n
n
n
n
Power Supplies
Motor/Relay Control
Line Drivers
Charge Pumps
The LTC4441 is available in a thermally enhanced 10-lead
MSOP package. The LTC4441-1 is the SO-8 version without
the blanking function.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 6677210.
Typical Application
D1
L1
10µH 20A MBR10100
SHUTDOWN
+
Q2
R5
R1
330k
R6
R2
86.6k
VIN
FB
DRVCC
SGND
OUT
CVCC
10µF
X5R
LTC4441
EN/SHDN
LTC3803
SWITCHING
CONTROLLER
GATE
SENSE+
GND
FB
R7
RBLANK
22µF
25V
X7R
COUT
+
VOUT
52V
2A
RISE/FALL Time vs CLOAD
200
TA = 25°C
180 DRVCC = 5V
160
RISE/FALL TIME (ns)
VIN
6V TO 24V
Si7370
×2
R3
5mΩ
PGND
140
120
100
RISE TIME
80
60
40
IN
BLANK
R4
100Ω
FALL TIME
20
0
R8
511k
0
5
10 15 20 25 30 35 40 45 50
CLOAD (nF)
4441 TA01b
R9
8.06k
4441 TA01a
44411fa
1
LTC4441/LTC4441-1
Absolute Maximum Ratings
(Notes 1, 8)
Supply Voltage
VIN.............................................................................28V
DRVCC..........................................................................9V
Input Voltage
IN..............................................................–15V to 15V
FB, EN/SHDN...........................–0.3V to DRVCC + 0.3V
RBLANK, BLANK (LTC4441 Only)............ –0.3V to 5V
OUT Output Current............................................. 100mA
Operating Junction Temperature Range
(Note 2)................................................... –55°C to 125°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................... 300°C
Pin Configuration
TOP VIEW
TOP VIEW
PGND
BLANK
RBLANK
SGND
IN
1
2
3
4
5
11
10
9
8
7
6
OUT
DRVCC
VIN
FB
EN/SHDN
MSE PACKAGE
10-LEAD PLASTIC MSOP
OUT
PGND 1
8
SGND 2
7
DRVCC
IN 3
6
VIN
EN/SHDN 4
5
FB
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 125°C, θJA = 38°C/W (Note 3)
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
TJMAX = 125°C, θJA = 150°C/W
Order Information
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC4441EMSE#PBF
LTC4441EMSE#TRPBF
LTBJQ
10-Lead Plastic MSOP
–40°C to 125°C
LTC4441IMSE#PBF
LTC4441IMSE#TRPBF
LTBJP
10-Lead Plastic MSOP
–40°C to 125°C
LTC4441MPMSE#PBF
LTC4441MPMSE#TRPBF
LTBJP
10-Lead Plastic MSOP
–55°C to 125°C
LTC4441ES8-1#PBF
LTC4441ES8-1#TRPBF
44411
8-Lead Plastic SO
–40°C to 125°C
LTC4441IS8-1#PBF
LTC4441IS8-1#TRPBF
4441I1
8-Lead Plastic SO
–40°C to 125°C
LEAD BASED FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC4441EMSE
LTC4441EMSE#TR
LTBJQ
10-Lead Plastic MSOP
–40°C to 125°C
LTC4441IMSE
LTC4441IMSE#TR
LTBJP
10-Lead Plastic MSOP
–40°C to 125°C
LTC4441MPMSE
LTC4441MPMSE#TR
LTBJP
10-Lead Plastic MSOP
–55°C to 125°C
LTC4441ES8-1
LTC4441ES8-1#TR
44411
8-Lead Plastic SO
–40°C to 125°C
LTC4441IS8-1
LTC4441IS8-1#TR
4441I1
8-Lead Plastic SO
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
44411fa
2
LTC4441/LTC4441-1
Electrical Characteristics
The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 7.5V, DRVCC = 5V, unless otherwise specified.
SYMBOL
PARAMETER
VDRVCC
Driver Supply Programmable Range
IVIN
VIN Supply Current
CONDITIONS
MIN
l
EN/SHDN = 0V, IN = 0V
EN/SHDN = 5V, IN = 0V
fIN = 100kHz, COUT = 4.7nF (Note 4)
l
l
l
TYP
5
MAX
8
UNITS
V
5
250
3
12
500
6
μA
μA
mA
1.21
1.31
V
9
40
DRVCC Regulator
VFB
Regulator Feedback Voltage
VIN = 7.5V
ΔVDRVCC(LINE)
Regulator Line Regulation
VIN = 7.5V to 25V
ΔVDRVCC(LOAD) Load Regulation
1.11
mV
Load = 0mA to 40mA
–0.1
%
VDROPOUT
Regulator Dropout Voltage
Load = 40mA
370
mV
VUVLO
FB Pin UVLO Voltage
Rising Edge
Falling Edge
1.09
0.97
V
V
VIH
IN Pin High Input Threshold
Rising Edge
l
2
2.4
2.8
V
VIL
IN Pin Low Input Threshold
Falling Edge
l
1
1.4
1.8
V
Input
VIH-VIL
IN Pin Input Voltage Hysteresis
Rising-Falling Edge
IINP
IN Pin Input Current
VIN = ±10V
l
±0.01
±10
μA
IEN/SHDN
EN/SHDN Pin Input Current
VEN/SHDN = 9V
l
±0.01
±1
μA
VSHDN
EN/SHDN Pin Shutdown Threshold
Falling Edge
0.45
VEN
EN/SHDN Pin Enable Threshold
Rising Edge
Falling Edge
1.21
1.09
l
EN/SHDN Pin Enable Hysteresis
Rising-Falling Edge
RONL
Driver Output Pull-Down Resistance
IOUT = 100mA
IPU
Driver Output Peak Pull-Up Current
DRVCC = 8V
VEN(HYST)
1
1.036
V
V
1.145
0.12
V
V
V
Output
l
0.35
6
0.8
Ω
A
IPD
Driver Output Peak Pull-Down Current
DRVCC = 8V
6
A
RON(BLANK)
BLANK Pin Pull-Down Resistance
IN = 0V, IBLANK = 100mA LTC4441 Only
11
Ω
VRBLANK
RBLANK Pin Voltage
RBLANK = 200kΩ LTC4441 Only
1.3
V
COUT = 4.7nF (Note 5)
30
ns
Switching Timing
tPHL
Driver Output High-Low Propagation Delay
tPLH
Driver Output Low-High Propagation Delay
COUT = 4.7nF (Note 5)
36
ns
tr
Driver Output Rise Time
COUT = 4.7nF (Note 5)
13
ns
tf
Driver Output Fall Time
COUT = 4.7nF (Note 5)
8
ns
tBLANK
Driver Output High to BLANK Pin High
RBLANK = 200kΩ (Note 6)
200
ns
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC4441/LTC4441-1 are tested under pulsed load conditions
such that TJ ≈ TA. The LTC4441E/LTC4441E-1 are guaranteed to meet
performance specifications from 0°C to 85°C operating junction
temperature. Specifications over the –40°C to 125°C operating junction
temperature range are assured by design characterization and correlation
with statistical process controls. The LTC4441I/LTC4441I-1 grade are
guaranteed over the –40°C to 125°C operating junction temperature
range. The LTC4441MP is guaranteed and tested over the full –55°C to
125°C operating junction temperature range. Note that the maximum
ambient temperature consistent with these specifications is determined by
specific operating conditions in conjunction with board layout, the rated
package thermal impedance and other environmental factors. The junction
temperature (TJ, in °C) is calculated from the ambient temperature
(TA, in °C) and power dissipation (PD, in Watts) according to the formula:
TJ = TA + (PD • θJA)
where θJA (in °C/W) is the package thermal impedance.
44411fa
3
LTC4441/LTC4441-1
Electrical Characteristics
Note 3: Failure to solder the Exposed Pad of the MSE package to the PC
board will result in a thermal resistance much higher than 38°C/W.
Note 4: Supply current in normal operation is dominated by the current
needed to charge and discharge the external power MOSFET gate. This
current will vary with supply voltage, switching frequency and the external
MOSFETs used.
Note 5: Rise and fall times are measured using 10% and 90% levels.
Delay times are measured from 50% of input to 20%/80% levels at driver
output.
Note 6: Blanking time is measured from 50% of OUT leading edge to 10%
of BLANK with a 1kΩ pull-up at BLANK pin. LTC4441 only.
Note 7: Guaranteed by design, not subject to test.
Note 8: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. The junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the maximum operating junction temperature
may impair device reliability.
Typical Performance Characteristics
IN Pin Low Threshold Voltage
vs Temperature
IN Pin High Threshold Voltage
vs Temperature
1.8
2.8
1.6
1.5
1.4
1.3
1.2
1.1
EN PIN INPUT THRESHOLD VOLTAGE (V)
VIN = 7.5V
2.7 DRVCC = 5V
IN PIN INPUT THRESHOLD (V)
2.6
2.5
2.4
2.3
2.2
2.1
1.0
25 50 75
–75 –50 –25 0
TEMPERATURE (°C)
2.0
25 50 75
–75 –50 –25 0
TEMPERATURE (°C)
100 125
100 125
4441 G01
FB Pin UVLO Threshold
vs Temperature
1.12
VIN = 7.5V
RISING EDGE
1.08
1.04
1.00
FALLING EDGE
0.96
0.92
0.88
0.84
25 50 75
–75 –50 –25 0
TEMPERATURE (°C)
4441 G03
SD Pin Input Threshold Voltage
vs Temperature
SD PIN INPUT THRESHOLD VOLTAGE (V)
FB PIN UVLO THRESHOLD VOLTAGE (V)
1.16
1.30
VIN = 7.5V
1.28
DRVCC = 5V
1.26
1.24
RISING EDGE
1.22
1.20
1.18
1.16
1.14
1.12
FALLING EDGE
1.10
1.08
1.06
1.04
25 50 75 100 125
–75 –50 –25 0
TEMPERATURE (°C)
4441 G02
100 125
4441 G04
0.80
5.50
0.70
5.40
VIN = 7.5V
0.75 DRVCC = 5V
0.65
0.60
RISING EDGE
0.55
0.50
0.45
DRVCC Voltage vs Temperature
R1 = 330k
5.45 R2 = 100k
DRVCC VOLTAGE (V)
IN PIN INPUT THRESHOLD (V)
VIN = 7.5V
1.7 DRVCC = 5V
1.20
EN Pin Input Threshold Voltage
vs Temperature
FALLING EDGE
5.35
5.30
5.25
5.20
5.15
0.40
5.10
0.35
5.05
0.30
25 50 75
–75 –50 –25 0
TEMPERATURE (°C)
100 125
4441 G05
VIN = 25V
VIN = 7.5V
5.00
25 50 75
–75 –50 –25 0
TEMPERATURE (°C)
100 125
4441 G06
44411fa
4
LTC4441/LTC4441-1
Typical Performance Characteristics
5.30
1000
TA = 25°C
R1 = 330k
5.25 R2 = 100k
VIN = 7.5V
5.45 TA = 25°C
R1 = 330k
5.40 R2 = 100k
5.35
5.20
5.30
DRVCC (V)
DRVCC (V)
DRVCC Dropout Voltage
vs Temperature
DRVCC Line Regulation
DRVCC DROPOUT VOLTAGE (mV)
5.50
DRVCC Load Regulation
5.25
5.20
5.15
5.10
5.15
5.10
5.05
5.05
5.00
0
20 40 60 80 100 120 140 160 180 200
ILOAD (mA)
0
5
10
15
20
25
600
500
400
300
200
0
25 50 75
–75 –50 –25 0
TEMPERATURE (°C)
30
VIN (V)
100 125
4441 G08
OUT Pin Pull-Down Resistance
vs Temperature
0.8
60
VIN = 7.5V
0.7 DRVCC = 5V
50
4441 G09
tPLH, tPHL vs DRVCC
60
TA = 25°C
CLOAD = 4.7nF
50
tPLH, tPHL vs Temperature
VDRVCC = 5V
CLOAD = 4.7nF
0.5
0.4
0.3
40
tPLH, tPHL (ns)
0.6
tPLH, tPHL (ns)
tPLH
30
tPHL
20
40
tPLH
30
tPHL
20
0.2
10
0.1
0
25 50 75
–75 –50 –25 0
TEMPERATURE (°C)
10
0
4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0
DRVCC (V)
100 125
4441 G10
100
30
TA = 25°C
90 DRVCC = 5V
25
70
RISE/FALL TIME (ns)
tPLH
60
50
tPHL
40
30
20
100 125
4441 G11
tPLH, tPHL vs CLOAD
80
0
–75 –50 –25 0
25 50 75
TEMPERATURE (°C)
RISE/FALL Time vs DRVCC
RISE/FALL Time vs Temperature
30
TA = 25°C
CLOAD = 4.7nF
25
20
15
10
4441 G12
RISE/FALL TIME (ns)
OUT PIN PULL-DOWN RESISTANCE (Ω)
700
100
5.00
4441 G07
tPLH, tPHL (ns)
VIN = 7.5V
900 DRVCC = 5V
= 40mA
I
800 LOAD
RISE TIME
FALL TIME
VDRVCC = 5V
CLOAD = 4.7nF
20
RISE TIME
15
10
FALL TIME
5
5
0
4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0
DRVCC (V)
0
–50
10
0
0
5
10 15 20 25 30 35 40 45 50
CLOAD (nF)
4441 G13
4441 G14
–25
0
50
75
25
TEMPERATURE (°C)
100
125
4441 G15
44411fa
5
LTC4441/LTC4441-1
Typical Performance Characteristics
RISE/FALL Time vs CLOAD
Blanking Time vs RBLANK
160
TA = 25°C
450 DRVCC = 5V
LTC4441
400
250
140
350
220
120
100
RISE TIME
80
60
40
FALL TIME
20
0
0
5
300
250
200
150
0
100
200
300 400
RBLANK (k)
500
600
700
150
–75 –50 –25 0
25 50 75
TEMPERATURE (°C)
4441 G17
VIN SUPPLY CURRENT (µA)
400
350
VIN = 25V
VIN = 7.5V
150
100
50
0
25 50 75
–75 –50 –25 0
TEMPERATURE (°C)
4441 G18
100 125
15
14 EN = 0V
IN = 0V
13
12
VIN = 25V
11
10
9
8
7
6
VIN = 7.5V
5
4
3
2
1
0
25 50 75
–75 –50 –25 0
TEMPERATURE (°C)
4441 G19
50
IVIN vs fIN
60
IVIN (mA)
IVIN (mA)
20
10
TA = 25°C
fIN = 100kHz
40
DRVCC = 5V
25
15
IVIN vs CLOAD
50
40
30
100 125
4441 G20
TA = 25°C
45 CLOAD = 4.7nF
35
100 125
VIN Standby Supply Current
vs Temperature
EN = 5V
450 IN = 0V
VIN SUPPLY CURRENT (µA)
180
160
500
200
190
50
VIN Operating Supply Current
vs Temperature
250
200
170
4441 G16
300
210
100
0
10 15 20 25 30 35 40 45 50
CLOAD (nF)
VIN = 7.5V
240 DRVCC = 5V
LTC4441
230
BLANKING TIME (ns)
BLANKING TIME (ns)
TA = 25°C
180 DRVCC = 5V
RISE/FALL TIME (ns)
Blanking Time vs Temperature
500
200
DRVCC = 9V
30
20
DRVCC = 9V
DRVCC = 5V
10
5
0
0 100 200 300 400 500 600 700 800 900 1000
fIN (kHz)
4441 G21
0
0
5
10 15 20 25 30 35 40 45 50
CLOAD (nF)
4441 G22
44411fa
6
LTC4441/LTC4441-1
Pin Functions
(MSOP/SO-8)
PGND (Pin 1/Pin 1): Driver Ground. Connect the DRVCC
bypass capacitor directly to this pin, as close as possible
to the IC. In addition, connect the PGND and SGND pins
together close to the IC, and then connect this node to the
source of the power MOSFET (or current sense resistor)
with as short and wide a PCB trace as possible.
EN/SHDN (Pin 6/Pin 4): Enable/Shutdown Input. Pulling
this pin above 1.21V allows the driver to switch. Pulling
this pin below 1.09V forces the driver output to go low.
Pulling this pin below 0.45V forces the LTC4441/LTC4441-1
into shutdown mode; the DRVCC regulator turns off and
the supply current drops below 12μA.
BLANK (Pin 2/NA): Current Sense Blanking Output. Use
this pin to assert a blanking time in the power MOSFET’s
source current sense signal. The LTC4441 pulls this opendrain output to SGND if the driver output is low. The output
becomes high impedance after a programmable blanking
time from the driver leading edge output. This blanking
time can be adjusted with the RBLANK pin.*
FB (Pin 7/Pin 5): DRVCC Regulator Feedback Input. Connect
this pin to the center tap of an external resistive divider
between DRVCC and SGND to program the DRVCC regulator
output voltage. To ensure loop stability, use the value of
330kΩ for the top resistor, R1.
RBLANK (Pin 3/NA): Blanking Time Adjust Input. Connect
a resistor from this pin to SGND to set the blanking time.
A small resistor value gives a shorter delay. Leave this pin
floating if the BLANK pin is not used.*
SGND (Pin 4/Pin 2): Signal Ground. Ground return for the
DRVCC regulator and low power circuitry.
IN (Pin 5/Pin 3): Driver Logic Input. This is the noninverting
driver input under normal operating conditions.
*Available only on the 10-lead version of the LTC4441.
VIN (Pin 8/Pin 6): Main Supply Input. This pin powers the
DRVCC linear regulator. Bypass this pin to SGND with a
1μF ceramic, tantalum or other low ESR capacitor in close
proximity to the LTC4441/LTC4441-1.
DRVCC (Pin 9/Pin 7): Linear Regulator Output. This output
pin powers the driver and the control circuitry. Bypass this
pin to PGND using a 10μF ceramic, low ESR (X5R or X7R)
capacitor in close proximity to the LTC4441/LTC4441-1.
OUT (Pin 10/Pin 8): Driver Output.
GND (Exposed Pad Pin 11/NA): Ground. The exposed pad
must be soldered to the PCB ground.
44411fa
7
LTC4441/LTC4441-1
Block Diagram
VIN
BIAS
1.21V
–
+
FB
MREG
REG
UVLO
DRVCC
1.09V
IN
Q1
INB
P1
EN/SHDN
OUT
N1
PGND
EN
THERMAL
SHUTDOWN
1.21V
LEADING
EDGE DELAY
RBLANK
BLANK
SGND
SHDN
0.45V
SHUTDOWN
MB
FOR 10-LEAD
LTC4441
ONLY
4441 BD
44411fa
8
LTC4441/LTC4441-1
Applications Information
Overview
Power MOSFETs generally account for the majority of
power lost in a converter. It is important to choose not only
the type of MOSFET used, but also its gate drive circuitry.
The LTC4441/LTC4441-1 is designed to drive an N-channel
power MOSFET with little efficiency loss. The LTC4441/
LTC4441-1 can deliver up to 6A of peak current using a
combined NPN Bipolar and MOSFET output stage. This
helps to turn the power MOSFET fully “on” or “off” with
a very brief transition region.
The LTC4441/LTC4441-1 includes a programmable linearregulator to regulate the gate drive voltage. This regulator
provides the flexibility to use either standard threshold or
logic level MOSFETs.
DRVCC Regulator
An internal, P-channel low dropout linear regulator provides
the DRVCC supply to power the driver and the pre-driver
logic circuitry as shown in Figure 1. The regulator output
voltage can be programmed between 5V and 8V with an
external resistive divider between DRVCC and SGND and a
center tap connected to the FB pin. The regulator needs an
R1 value of around 330k to ensure loop stability; the value
of R2 can be varied to achieve the required DRVCC voltage:
406k
R2 =
DRVCC − 1.21V
The DRVCC regulator can supply up to 100mA and is
short-circuit protected. The output must be bypassed
to the PGND pin in very close proximity to the IC pins
with a minimum of 10µF ceramic, low ESR (X5R or X7R)
capacitor. Good bypassing is necessary as high transient
supply currents are required by the driver. If the input
supply voltage, VIN, is close to the required gate drive
voltage, this regulator can be disabled by connecting the
DRVCC and FB pins to VIN.
VIN
LTC4441
1.21V
R1
330k
–
+
FB
REG
MREG
R2
UVLO
ENABLE
DRIVER
1.09V
DRIVER
DRVCC
OUT
CVCC
PGND
4441 F01
Figure 1. DRVCC Regulator
The LTC4441/LTC4441-1 monitors the FB pin for DRVCC’s
UVLO condition (UVLO in Figure 1). During power-up, the
driver output is held low until the DRVCC voltage reaches
90% of the programmed value. Thereafter, if the DRVCC
voltage drops more than 20% below the programmed
value, the driver output is forced low.
Logic Input Stage
The LTC4441/LTC4441-1 driver employs TTL/CMOS compatible input thresholds that allow a low voltage digital
signal to drive standard power MOSFETs. The LTC4441/
LTC4441-1 contains an internal voltage regulator that
biases the input buffer, allowing the input thresholds (VIH
= 2.4V, VIL = 1.4V) to be independent of the programmeddriver supply, DRVCC, or the input supply, VIN. The 1V
hysteresis between VIH and VIL eliminates false triggering
due to noise during switching transitions. However, care
should be taken to isolate this pin from any noise pickup,
especially in high frequency, high voltage applications.The
LTC4441/LTC4441-1 input buffer has high input impedance
and draws negligible input current, simplifying the drive
circuitry required for the input. This input can withstand
voltages up to 15V above and below ground. This makes
the chip more tolerant to ringing on the input digital signal
caused by parasitic inductance.
44411fa
9
LTC4441/LTC4441-1
Applications Information
Driver Output Stage
A simplified version of the LTC4441/LTC4441-1’s driveroutput stage is shown in Figure 2.
VIN
DRVCC
Q1
LOAD
INDUCTOR
LTC4441
P1
OUT
N1
RO
N2
DRVCC
CGD
CGS
POWER
MOSFET
N3
PGND
4441 F02
Figure 2. Driver Output Stage
The pull-up device is the combination of an NPN transistor, Q1, and a P-channel MOSFET, P1. This provides both
the ability to swing to rail (DRVCC) and deliver large peak
charging currents.
The pull-down device is an N-channel MOSFET, N1, with
a typical on resistance of 0.35Ω. The low impedance of
N1 provides fast turn-off of the external power MOSFET
and holds the power MOSFET’s gate low when its drain
voltage switches. When the power MOSFET’s gate is pulled
low (gate shorted to source through N1) by the LTC4441/
LTC4441-1, its drain voltage is pulled high by its load (e.g.,
inductor or resistor). The slew rate of the drain voltage
causes current to flow to the MOSFET’s gate through its
gate-to-drain capacitance. If the MOSFET driver does not
have sufficient sink current capability (low output impedance), the current through the power MOSFET’s CGD can
momentarily pull the gate high and turn the MOSFET
back on.
A similar situation occurs during power-up when VIN isramping up with the DRVCC regulator output still low. N1 is
off and the driver output, OUT, may momentarily pull high
through the power MOSFET’s CGD, turning on the power
MOSFET. The N-channel MOSFETs N2 and N3,shown in
Figure 2, prevent the driver output from going high in this
situation. If DRVCC is low, N3 is off. If OUT is pulled high
through the power MOSFET’s CGD, the gate of N2 gets
pulled high through RO. This turns N2 on, which then
pulls OUT low. Once DRVCC is >1V, N3 turns on to hold
the N2 gate low, thus disabling N2.
The pre-driver that drives Q1, P1 and N1 uses an adaptive method to minimize cross-conduction currents. This
is done with a 5ns nonoverlapping transition time. N1 is
fully turned off before Q1 is turned on and vice-versa using
this 5ns buffer time. This minimizes any cross-conduction
currents while Q1 and N1 are switching on and off without
affecting their rise and fall times.
Thermal Shutdown
The LTC4441/LTC4441-1 has a thermal detector that disables the DRVCC regulator and pulls the driver output low
when activated. If the junction temperature exceeds150°C,
the driver pull-up devices, Q1 and P1, turn off while the
pull-down device, N1, turns on briskly for 200ns to quickly
pull the output low. The thermal shutdown circuit has 20°C
of hysteresis.
Enable/Shutdown Input
The EN/SHDN pin serves two functions. Pulling this pin
below 0.45V forces the LTC4441/LTC4441-1 into shutdown
mode. In shutdown mode, the internal circuitry and the
DRVCC regulator are off and the supply current drops to
<12µA. If the input voltage is between 0.45V and 1.21V,
the DRVCC regulator and internal circuit power up but the
driver output stays low. If the input goes above 1.21V, the
driver starts switching according to the input logic signal.
The driver enable comparator has a small hysteresis of
120mV.
Blanking
In some switcher applications, a current sense resistor
is placed between the low side power MOSFET’s source
terminal and ground to sense the current in the MOSFET.
With this configuration, the switching controller must
incorporate some timing interval to blank the ringing
onthe current sense signal immediately after the MOSFET
is turned on. This ringing is caused by the parasitic inductance and capacitance of the PCB trace and the MOSFET.
The duration of the ringing is thus dependent on the PCB
layout and the components used and can be longer than
the blanking interval provided by the controller.
44411fa
10
LTC4441/LTC4441-1
Applications Information
The 10-Lead LTC4441 includes an open-drain output that
can be used to extend this blanking interval. The 8-Lead
LTC4441-1 does not have this blanking function. Figure 3
shows the BLANK pin connection. The BLANK pin is connected directly to the switching controller’s SENSE+ input.
Figure 4 shows the blanking waveforms. If the driver input
is low, the external power MOSFET is off and MB turns
on to hold SENSE+ low. If the driver input goes high, the
power MOSFET turns on after the driver’s propagation
delay. MB remains on, attenuating the ringing seen by the
controller’s SENSE+ input. After the programmed blanking
time, MB turns off to enable the current sense signal. MB
is designed to turn on and turn off at a controlled slew rate.
This is to prevent the gate switching noise from coupling
into the current sense signal.
IN
OUT
POWER
MOSFET’s
CURRENT
POWER MOSFET’s
SOURCE TERMINAL
MB GATE
BLANK/SENSE+
4441 F04
BLANKING TIME
Figure 4. Blanking Waveforms
VIN
LOAD
INDUCTOR
LTC4441
OUT
DRIVER
POWER
MOSFET
R4
LEADING
EDGE DELAY
TO
SWITCHING
CONTROLLER’S
CURRENT
SENSE
INPUT
SENSE+
R3
SENSE–
BLANK
To ensure proper operation and long-term reliability, the
LTC4441/LTC4441-1 must not operate beyond its maximum temperature rating. The junction temperature can
be calculated by:
IQ(TOT) = IQ + ƒ • QG
PD = VIN • (IQ + ƒ • QG)
MB SGND
RBLANK
Power Dissipation
PGND
4441 F03
KEEP THIS
TRACE SHORT
R7
Figure 3. Blanking Circuit
The blanking interval can be adjusted using resistor R7
connected to the RBLANK pin. A small resistance value
gives a shorter interval with a default minimum of 75ns.
The value of the resistor R4 and the on-resistance of MB
(typically 11Ω) form a resistive divider attenuating the
ringing. R4 needs to be large for effective blanking, but not
so large as to cause delay to the sense signal. A resistance
value of 1k to 10k is recommended.
For optimum performance, the LTC4441/LTC4441-1should
be placed as close as possible to the powerMOSFET and
current sense resistor, R3.
TJ = TA + PD • θJA
where:
IQ = LTC4441/LTC4441-1 static quiescent current,
typically 250µA
ƒ = Logic input switching frequency
QG = Power MOSFET total gate charge at corresponding VGS voltage equal to DRVCC
VIN = LTC4441/LTC4441-1 input supply voltage
TJ = Junction temperature
TA = Ambient temperature
θJA = Junction-to-ambient thermal resistance. The
10-pin MSOP package has a thermal resistance of
θJA = 38°C/W.
44411fa
11
LTC4441/LTC4441-1
Applications Information
The total supply current, IQ(TOT), consists of the LTC4441/
LTC4441-1’s static quiescent current, IQ, and the current
required to drive the gate of the power MOSFET, with
thelatter usually much higher than the former. The dissipated power, PD, includes the efficiency loss of the DRVCC
regulator. With a programmed DRVCC, a high VIN results
in higher efficiency loss.
As an example, consider an application with VIN = 12V.
The switching frequency is 300kHz and the maximum
ambient temperature is 70°C. The power MOSFET chosen
is three pieces of IRFB31N20D, which has a maximum
RDS(ON) of 82mΩ (at room temperature) and a typical
total gatecharge of 70nC (the temperature coefficient of
the gate charge is low).
IQ(TOT) = 500µA + 210nC • 300kHz = 63.5mA
PIC = 12V • 63.5mA = 0.762W
TJ = 70°C + 38°C/W • 0.762W = 99°C
This demonstrates how significant the gate charge current can be when compared to the LTC4441/LTC4441-1’s
static quiescent current. To prevent the maximum junction temperature from being exceeded, the input supply
current must be checked when switching at high VIN. A
tradeoff between the operating frequency and the size of
the power MOSFET may be necessary to maintain areliable
LTC4441/LTC4441-1 junction temperature. Prior to lowering the operating frequency, however, be sure to check with
power MOSFET manufacturers for their innovations on low
QG, low RDS(ON) devices. Power MOSFET manufacturing
technologies are continually improving, with newer and
better performing devices being introduced.
PC Board Layout Checklist
When laying out the printed circuit board, the followingchecklist should be used to ensure proper operation of
the LTC4441/LTC4441-1:
A. Mount the bypass capacitors as close as possible between the DRVCC and PGND pins and between the VIN
and SGND pins. The PCB trace loop areas should be
tightened as much as possible to reduce inductance.
B. Use a low inductance, low impedance ground plane to
reduce any ground drop. Remember that the LTC4441/
LTC4441-1 switches 6A peak current and any significant
ground drop will degrade signal integrity.
C. Keep the PCB ground trace between the LTC4441/
LTC4441-1 ground pins (PGND and SGND) and the
external current sense resistor as short and wide as
possible.
D. Plan the ground routing carefully. Know where the large
load switching current paths are. Maintain separate
ground return paths for the input pin and output pin
to avoid sharing small-signal ground with large load
ground return. Terminate these two ground traces only
at the GND pin of the driver (STAR network).
E. Keep the copper trace between the driver output pin
andthe load short and wide.
F. Place the small-signal components away from the high
frequency switching nodes. These components include
the resistive networks connected to the FB, RBLANK
and EN/SHDN pins.
44411fa
12
LTC4441/LTC4441-1
Package Description
MSE Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1664 Rev G)
BOTTOM VIEW OF
EXPOSED PAD OPTION
1.88 ± 0.102
(.074 ± .004)
5.23
(.206)
MIN
1
0.889 ± 0.127
(.035 ± .005)
0.05 REF
10
0.305 ± 0.038
(.0120 ± .0015)
TYP
RECOMMENDED SOLDER PAD LAYOUT
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
DETAIL “B”
CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
10 9 8 7 6
DETAIL “A”
0° – 6° TYP
1 2 3 4 5
GAUGE PLANE
0.53 ± 0.152
(.021 ± .006)
DETAIL “A”
0.18
(.007)
0.497 ± 0.076
(.0196 ± .003)
REF
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
0.254
(.010)
0.29
REF
1.68
(.066)
1.68 ± 0.102 3.20 – 3.45
(.066 ± .004) (.126 – .136)
0.50
(.0197)
BSC
1.88
(.074)
SEATING
PLANE
0.86
(.034)
REF
1.10
(.043)
MAX
0.17 – 0.27
(.007 – .011)
TYP
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD
SHALL NOT EXCEED 0.254mm (.010") PER SIDE.
0.1016 ± 0.0508
(.004 ± .002)
MSOP (MSE) 0910 REV G
44411fa
13
LTC4441/LTC4441-1
Package Description
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.050 BSC
.189 – .197
(4.801 – 5.004)
NOTE 3
.045 ±.005
8
.245
MIN
.160 ±.005
.010 – .020
× 45°
(0.254 – 0.508)
NOTE:
1. DIMENSIONS IN
5
.150 – .157
(3.810 – 3.988)
NOTE 3
1
RECOMMENDED SOLDER PAD LAYOUT
.053 – .069
(1.346 – 1.752)
0°– 8° TYP
.016 – .050
(0.406 – 1.270)
6
.228 – .244
(5.791 – 6.197)
.030 ±.005
TYP
.008 – .010
(0.203 – 0.254)
7
.014 – .019
(0.355 – 0.483)
TYP
INCHES
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
2
3
4
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
SO8 0303
44411fa
14
LTC4441/LTC4441-1
Revision History
REV
DATE
DESCRIPTION
A
03/11
Added MP-grade part. Changes reflected throughout the data sheet.
PAGE NUMBER
1-16
44411fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC4441/LTC4441-1
Related Parts
PART NUMBER
DESCRIPTION
COMMENTS
LTC4440/
LTC4440-5
High Voltage, High Speed, High Side N-Channel
Gate Driver
Up to 80V Supply Voltage, 8V ≤ VCC ≤ 15V,
2.4A Peak Pull-Up/1.5Ω Peak Pull-Down
LTC4442
High Speed Synchronous N-Channel MOSFET Driver
Up to 38V Supply Voltage, 6V ≤ VCC ≤ 9.5V
LTC4449
High Speed Synchronous N-Channel MOSFET Driver
Up to 38V Supply Voltage, 4.5V ≤ VCC ≤ 6.5V
LTC4444/
LTC4444-5
High Voltage Synchronous N-Channel MOSFET Driver
with Shoot Thru Protection
Up to 100V Supply Voltage, 4.5V/7.2V ≤ VCC ≤ 13.5V,
3A Peak Pull-Up/0.55Ω Peak Pull-Down
LTC4446
High Voltage Synchronous N-Channel MOSFET Driver
without Shoot Thru Protection
Up to 100V Supply Voltage, 7.2V ≤ VCC ≤ 13.5V,
3A Peak Pull-Up/0.55Ω Peak Pull-Down
LTC1154
High Side Micropower MOSFET Driver
Up to 18V Supply Voltage, 85µA Quiescent Current, Internal Charge Pump
44411fa
16 Linear Technology Corporation
LT 0311 REV A • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
 LINEAR TECHNOLOGY CORPORATION 2004
Similar pages