NSC LF451 Lf451 wide-bandwidth jfet-input operational amplifier Datasheet

LF451 Wide-Bandwidth
JFET-Input Operational Amplifier
General Description
Features
The LF451 is a low-cost high-speed JFET-input operational
amplifier with an internally trimmed input offset voltage (BIFET IITM technology). The device requires a low supply current and yet maintains a large gain bandwidth product and a
fast slew rate. In addition, well matched high voltage JFET
input devices provide very low input bias and offset currents. The LF451 is pin compatible with the standard
LM741, allowing designers to upgrade the overall performance of existing designs.
The LF451 may be used in such applications as high-speed
integrators, fast D/A converters, sample-and-hold circuits
and many other circuits requiring low input bias current, high
input impedance, high slew rate and wide bandwidth.
Y
Connection Diagram
Typical Connection
Y
Y
Y
Y
Y
Y
Y
Y
Y
Internally trimmed offset voltage
5.0 mV (max)
Low input bias current
50 pA (typ)
Low input noise current
0.01 pA/0Hz (typ)
Wide gain bandwidth
4 MHz (typ)
High slew rate
13 V/ms (typ)
Low supply current
3.4 mA (max)
High input impedance
1012X (typ)
Low total harmonic distortion AV e 10, k0.02% (typ)
RL e 10k, VO e 20 Vp– p, f e 20 Hz – 20 kHz
Low 1/f noise corner
50 Hz (typ)
Fast settling time to 0.01%
2 ms (typ)
S.O. Package
TL/H/9660 – 2
Top View
Order Number LF451CM
See NS Package Number M08A
TL/H/9660 – 1
Simplified Schematic
TL/H/9660 – 3
BI-FETTM is a trademark of National Semiconductor Corporation.
C1995 National Semiconductor Corporation
TL/H/9660
RRD-B30M125/Printed in U. S. A.
LF451 Wide-Bandwidth JFET-Input Operational Amplifier
December 1995
Absolute Maximum Ratings (Note 1)
ESD Tolerance
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (V a b Vb)
Input Voltage Range
Differential Input Voltage (Note 2)
Junction Temperature (TJ MAX)
Output Short Circuit Duration
Power Dissipation (Note 3)
Vb
TBD
Soldering Information (Note 5)
SO Package: Vapor Phase (60 sec)
Infrared (15 sec)
36V
s VIN s V a
g 30V
150§ C
Continuous
500 mW
215§ C
220§ C
Operating Ratings (Note 1)
TMIN s TA s TMAX
0§ C s TA s a 70§ C
125§ C
Temperature Range
LF451CM
Junction Temperature (TJ max)
Supply Voltage (V a b Vb)
DC Electrical Characteristics The following specifications apply for
face limits apply for TMIN to TMAX; all other limits TA e TJ e 25§ C.
10V to 32V
V a e a 15V
and
Vb e b15V.
Bold-
LF451CM
Symbol
Parameter
Conditions
Typical
(Note 6)
Tested
Limit
(Note 7)
VOS
Maximum Input Offset Voltage
RS e 10 kX, (Note 10)
0.3
5
IOS
Maximum Input Offset Current
(Notes 9, 10)
TJ e 25§ C
TJ e 70§ C
25
100
TJ e 25§ C
TJ e 70§ C
50
IB
RIN
AVOL
VO
Maximum Input Bias Current
(Notes 9, 10)
Input Resistance
TJ e 25§ C
1012
Minimum Large Signal
Voltage Gain
VO e g 10V, RL e 2 kX
(Note 10)
200
Minimum Output Voltage Swing
RL e 10k
VCM
Minimum Input Common Mode
Voltage Range
CMRR
Minimum Common-Mode
Rejection Ratio
RS s 10 kX
PSRR
Minimum Supply Voltage
Rejection Ratio
(Note 11)
IS
Maximum Supply Current
Design
Limit
(Note 8)
Units
mV
2
pA
nA
4
pA
nA
200
X
50
25
V/mV
g 13.5
g 12
g 12
V
a 14.5
b 11.5
a 11
b 11
a 11
b 11
V
V
100
80
80
dB
100
80
80
dB
3.4
3.4
mA
AC Electrical Characteristics The following specifications apply for V a e a 15V and Vb e b15V. Boldface limits apply for TMIN to TMAX; all other limits TA e TJ e 25§ C.
LF451CM
Symbol
Parameter
Conditions
Typical
(Note 6)
Tested
Limit
(Note 7)
Design
Limit
(Note 8)
Units
SR
Slew Rate
AV e a 1
13
8
GBW
Minimum Gain-Bandwidth Product
f e 100 kHz
4
2.7
V/ms
en
Equivalent Input Noise Voltage
RS e 100X, f e 1 kHz
25
nV/0Hz
in
Equivalent Input Noise Current
RS e 100X, f e 1 kHz
0.01
pA/0Hz
MHz
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond its specified operating ratings.
Note 2: When the input voltage exceeds the power supplies, the current should be limited to 1 mA.
Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJ MAX, iJA and the ambient temperature, TA. The maximum
allowable power dissipation at any temperature is PD e (TJ MAX b TA)/iJA or the number given in the Absolute Maximum Ratings, whichever is lower. For
guaranteed operation TJ max e 125§ C. The typical thermal resistance (iJA) of the LF451CM when board-mounted is 170§ C/W.
Note 5: See AN-450 ‘‘Surface Mounting Methods and Their Effect on Product Reliability’’ (Appendix D) for other methods of soldering surface mount devices.
Note 6: Typicals are at TJ e 25§ C and represent most likely parametric norm.
2
Note 7: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 8: Design limits are guaranteed to National’s AOQL, but not 100% tested.
Note 9: The input bias currents are junction leakage currents which approximately double for every 10§ C increase in the junction temperature TJ. Due to limited
production test time, the input bias currents are correlated to junction temperature. In normal operation the junction temperature rises above the ambient
temperature as a result of internal power dissipation, PD. TJ e TA a iJAPD where iJA is the thermal resistance from junction to ambient.
Note 10: VOS, IB, AVOL, and IOS are measured at VCM e 0V.
Note 11: Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice.
Typical Performance Characteristics
Distortion vs Frequency
Undistorted Output
Voltage Swing
Open Loop Frequency
Response
Common-Mode
Rejection Ratio
Power Supply
Rejection Ratio
Equivalent Input
Noise Voltage
Open Loop Voltage
Gain (V/V)
Output Impedance
Inverter Settling Time
TL/H/9660 – 5
3
Typical Performance Characteristics
Input Bias Current
(Continued)
Input Bias Current
Supply Current
Positive Common-Mode
Input Voltage Limit
Negative Common-Mode
Input Voltage Limit
Positive Current Limit
Negative Current Limit
Voltage Swing
Output Voltage Swing
Gain Bandwidth
Bode Plot
Slew Rate
TL/H/9660 – 4
4
Pulse Response
Small Signal Inverting
Small Signal Non-Inverting
TL/H/9660 – 6
TL/H/9660 – 7
Large Signal Inverting
Large Signal Non-Inverting
TL/H/9660 – 8
TL/H/9660 – 9
Current Limit (RL e 100X)
TL/H/9660 – 10
Application Hints
cause large currents to flow which can result in a destroyed
unit.
Exceeding the negative common-mode limit with the non-inverting input, or with both inputs, will force the output to a
high state, potentially causing a reversal of phase to the
output.
In neither case does a latch occur since raising the input
back within the common-mode range again puts the input
stage and thus the amplifier in a normal operating mode.
The LF451CM is an op amp with an internally trimmed input
offset voltage and JFET input devices (BI-FET II). These
JFETs have large reverse breakdown voltages from gate to
source and drain eliminating the need for clamps across the
inputs. Therefore, large differential input voltages can easily
be accommodated without a large increase in input current.
The maximum differential input voltage is independent of
the supply voltages. However, neither of the input voltages
should be allowed to exceed the negative supply as this will
5
Application Hints (Continued)
input to minimize ‘‘pick-up’’ and maximize the frequency of
the feedback pole by minimizing the capacitance from the
input to ground.
Exceeding the positive common-mode limit on a single input
will not change the phase of the output; however, if both
inputs exceed the limit, the output of the amplifier will be
forced to a high state.
The amplifier will operate with a common-mode input voltage equal to the positive supply; however, the gain bandwidth and slew rate may be decreased in this condition.
When the negative common-mode voltage swings to within
3V of the negative supply, an increase in input offset voltage
may occur.
The LF451 is biased by a zener reference which allows normal circuit operation on g 4V power supplies. Supply voltages less than these may result in lower gain bandwidth and
slew rate.
The LF451 will drive a 2 kX load resistance to g 10V over
the full temperature range of 0§ C to a 70§ C. If the amplifier
is forced to drive heavier load currents, however, an increase in input offset voltage may occur on the negative
voltage swing and finally reach an active current limit on
both positive and negative swings.
Precautions should be taken to ensure that the power supply for the integrated circuit never becomes reversed in polarity or that the unit is not inadvertently installed backwards
in a socket as an unlimited current surge through the resulting forward diode within the IC could cause fusing of the
internal conductors and result in a destroyed unit.
As with most amplifiers, care should be taken with lead
dress, component placement and supply decoupling in order to ensure stability. For example, resistors from the output to an input should be placed with the body close to the
A feedback pole is created when the feedback around any
amplifier is resistive. The parallel resistance and capacitance from the input of the device (usually the inverting input) to AC ground set the frequency of the pole. In many
instances the frequency of this pole is much greater than
the expected 3 dB frequency of the closed loop gain and
consequently there is negligible effect on stability margin.
However, if the feedback pole is less than approximately 6
times the expected 3 dB frequency a lead capacitor should
be placed from the output to the input of the op amp. The
value of the added capacitor should be such that the RC
time constant of this capacitor and the resistance it parallels
is greater than or equal to the original feedback pole time
constant.
The benefit of the S.O. package results from its very small
size. It follows, however, that the die inside the S.O. package is less protected from external physical forces than a
die in a standard DIP would be, because there is so much
less plastic in the S.O. Therefore, not following certain precautions when board mounting the LF451CM can put mechanical stress on the die, lead frame, and/or bond wires.
This can cause shifts in the LF451CM’s parameters, even
causing them to exceed limits specified in the Electrical
Characteristics. For recommended practices in LF451CM
surface mounting refer to Application Note AN-450 ‘‘Surface Mounting Methods and Their Effect on Product Reliability’’ and to Section 6 ‘‘Surface Mount’’ found in any
Rev. 1 Linear Databook volume.
Detailed Schematic
TL/H/9660 – 11
6
7
LF451 Wide-Bandwidth JFET-Input Operational Amplifier
Physical Dimensions inches (millimeters)
Lit. Ý 106161
Small Outline Package (M)
Order Number LF451CM
NS Package Number M08A
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