LINER LT1764AET-1.8 3a, fast transient response, low noise,ldo regulator Datasheet

LT1764A Series
3A, Fast Transient
Response, Low Noise,
LDO Regulators
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FEATURES
DESCRIPTIO
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The LT ®1764A is a low dropout regulator optimized for
fast transient response. The device is capable of supplying
3A of output current with a dropout voltage of 340mV.
Operating quiescent current is 1mA, dropping to < 1µA in
shutdown. Quiescent current is well controlled; it does not
rise in dropout as it does with many other regulators. In
addition to fast transient response, the LT1764A has very
low output voltage noise which makes the device ideal for
sensitive RF supply applications.
Output voltage range is from 1.21V to 20V. The LT1764A
regulators are stable with output capacitors as low as 10µF.
Internal protection circuitry includes reverse battery protection, current limiting, thermal limiting and reverse current protection. The device is available in fixed output
voltages of 1.5V, 1.8V, 2.5V, 3.3V and as an adjustable
device with a 1.21V reference voltage. The LT1764A regulators are available in 5-lead TO-220 and DD packages, and
16-lead FE packages.
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Optimized for Fast Transient Response
Output Current: 3A
Dropout Voltage: 340mV at 3A
Low Noise: 40µVRMS (10Hz to 100kHz)
1mA Quiescent Current
Wide Input Voltage Range: 2.7V to 20V
No Protection Diodes Needed
Controlled Quiescent Current in Dropout
Fixed Output Voltages: 1.5V, 1.8V, 2.5V, 3.3V
Adjustable Output from 1.21V to 20V
< 1µA Quiescent Current in Shutdown
Stable with 10µF Output Capacitor*
Stable with Ceramic Capacitors*
Reverse Battery Protection
No Reverse Current
Thermal Limiting
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APPLICATIO S
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, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
3.3V to 2.5V Logic Power Supply
Post Regulator for Switching Supplies
*See Applications Information Section.
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TYPICAL APPLICATIO
Dropout Voltage
400
3.3VIN to 2.5VOUT Regulator
VIN > 3V
OUT
2.5V
3A
+
10µF*
10µF*
LT1764A-2.5
SHDN SENSE
GND
1764 TA01
*TANTALUM,
CERAMIC OR
ALUMINUM ELECTROLYTIC
DROPOUT VOLTAGE (mV)
IN
+
350
300
250
200
150
100
50
0
0
0.5
1.0
1.5
2.0
LOAD CURRENT (A)
2.5
3.0
1764 TA02
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LT1764A Series
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ABSOLUTE MAXIMUM RATINGS (Note 1)
IN Pin Voltage ........................................................ ±20V
OUT Pin Voltage .................................................... ±20V
Input to Output Differential Voltage (Note 12) ....... ±20V
SENSE Pin Voltage ............................................... ±20V
ADJ Pin Voltage ...................................................... ±7V
SHDN Pin Voltage ................................................. ±20V
Output Short-Circuit Duration ......................... Indefinite
Operating Junction Temperature Range
E Grade ............................................. – 40°C to 125°C
MP Grade ......................................... – 55°C to 125°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
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PACKAGE/ORDER INFORMATION
TOP VIEW
FRONT VIEW
FRONT VIEW
TAB IS
GND
5
SENSE/ADJ*
5
SENSE/
ADJ*
4
OUT
4
OUT
3
GND
3
GND
2
IN
2
IN
1
SHDN
1
TAB IS
GND
Q PACKAGE
5-LEAD PLASTIC DD
SHDN
T PACKAGE
5-LEAD PLASTIC TO-220
GND
1
16 GND
NC
2
15 NC
OUT
3
OUT
4
OUT
5
12 IN
SENSE/ADJ*
6
11 NC
GND
7
10 SHDN
GND
8
9
14 IN
13 IN
17
*PIN 6 = SENSE FOR LT1764A-1.5/
LT1764A-1.8/LT1764A-2.5/
LT1764A-3.3
= ADJ FOR LT1764A
GND
*PIN 5 = SENSE FOR LT1764A-1.5/LT1764A-1.8/
LT1764A-2.5/LT1764A-3.3
= ADJ FOR LT1764A
TJMAX = 150°C, θJA = 30°C/ W
*PIN 5 = SENSE FOR LT1764A-1.5/LT1764A-1.8/
LT1764A-2.5/LT1764A-3.3
= ADJ FOR LT1764A
TJMAX = 150°C, θJA = 50°C/ W
ORDER PART NUMBER
ORDER PART NUMBER
ORDER PART NUMBER
FE PART MARKING
LT1764AEQ
LT1764AEQ-1.5
LT1764AEQ-1.8
LT1764AEQ-2.5
LT1764AEQ-3.3
LT1764AMPQ
LT1764AET
LT1764AET-1.5
LT1764AET-1.8
LT1764AET-2.5
LT1764AET-3.3
LT1764AEFE
LT1764AEFE-1.5
LT1764AEFE-1.8
LT1764AEFE-2.5
LT1764AEFE-3.3
LT1764AEFE
LT1764AEFE-1.5
LT1764AEFE-1.8
LT1764AEFE-2.5
LT1764AEFE-3.3
FE PACKAGE
16-LEAD PLASTIC TSSOP
PIN 17 IS GND
TJMAX = 150°C, θJA = 38°C/ W
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. (Note 2)
PARAMETER
CONDITIONS
Minimum Input Voltage
(Notes 3, 11)
ILOAD = 0.5A
ILOAD = 1.5A
E Grade: ILOAD = 3A
MP Grade: ILOAD = 3A
●
●
LT1764A-1.5 VIN = 2.21V, ILOAD = 1mA
2.7V < VIN < 20V, 1mA < ILOAD < 3A
●
LT1764A-1.8 VIN = 2.3V, ILOAD = 1mA
2.8V < VIN < 20V, 1mA < ILOAD < 3A
●
Regulated Output Voltage
(Note 4)
MIN
TYP
MAX
UNITS
1.7
1.9
2.3
2.3
2.7
2.8
V
V
V
V
1.477
1.447
1.500
1.500
1.523
1.545
V
V
1.773
1.737
1.800
1.800
1.827
1.854
V
V
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LT1764A Series
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. (Note 2)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
LT1764A-2.5 VIN = 3V, ILOAD = 1mA
3.5V < VIN < 20V, 1mA < ILOAD < 3A
●
2.462
2.412
2.500
2.500
2.538
2.575
V
V
LT1764A-3.3 VIN = 3.8V, ILOAD = 1mA
4.3V < VIN < 20V, 1mA < ILOAD < 3A
●
3.250
3.183
3.300
3.300
3.350
3.400
V
V
●
●
1.192
1.168
1.168
1.210
1.210
1.210
1.228
1.246
1.246
V
V
V
2.5
3
4
4.5
2
10
10
10
10
10
mV
mV
mV
mV
mV
3
7
23
mV
mV
4
8
25
mV
mV
4
10
30
mV
mV
4
12
40
mV
mV
2
5
20
20
mV
mV
mV
0.02
0.05
0.10
V
V
0.07
0.13
0.18
V
V
0.14
0.20
0.27
V
V
0.25
0.33
0.40
V
V
0.34
0.45
0.66
V
V
1
1.1
3.5
11
40
120
1.5
1.6
5
18
75
200
mA
mA
mA
mA
mA
mA
ADJ Pin Voltage
(Notes 3, 4)
LT1764A
VIN = 2.21V, ILOAD = 1mA
E Grade: 2.7V < VIN < 20V, 1mA < ILOAD < 3A
MP Grade: 2.8V < VIN < 20V, 1mA < ILOAD < 3A
Line Regulation
LT1764A-1.5
LT1764A-1.8
LT1764A-2.5
LT1764A-3.3
LT1764A (Note 3)
∆VIN = 2.21V to 20V, ILOAD = 1mA
∆VIN = 2.3V to 20V, ILOAD = 1mA
∆VIN = 3V to 20V, ILOAD = 1mA
∆VIN = 3.8V to 20V, ILOAD = 1mA
∆VIN = 2.21V to 20V, ILOAD = 1mA
●
●
●
●
●
Load Regulation
LT1764A-1.5
VIN = 2.7V, ∆ILOAD = 1mA to 3A
VIN = 2.7V, ∆ILOAD = 1mA to 3A
●
VIN = 2.8V, ∆ILOAD = 1mA to 3A
VIN = 2.8V, ∆ILOAD = 1mA to 3A
●
VIN = 3.5V, ∆ILOAD = 1mA to 3A
VIN = 3.5V, ∆ILOAD = 1mA to 3A
●
VIN = 4.3V, ∆ILOAD = 1mA to 3A
VIN = 4.3V, ∆ILOAD = 1mA to 3A
●
LT1764A-1.8
LT1764A-2.5
LT1764A-3.3
LT1764A (Note 3) VIN = 2.7V, ∆ILOAD = 1mA to 3A
E Grade: VIN = 2.7V, ∆ILOAD = 1mA to 3A
MP Grade: VIN = 2.8V, ∆ILOAD = 1mA to 3A
●
●
Dropout Voltage
VIN = VOUT(NOMINAL)
ILOAD = 1mA
ILOAD = 1mA
●
(Notes 5, 6, 11)
ILOAD = 100mA
ILOAD = 100mA
●
ILOAD = 500mA
ILOAD = 500mA
●
ILOAD = 1.5A
ILOAD = 1.5A
●
ILOAD = 3A
ILOAD = 3A
●
GND Pin Current
VIN = VOUT(NOMINAL) + 1V
(Notes 5, 7)
ILOAD = 0mA
ILOAD = 1mA
ILOAD = 100mA
ILOAD = 500mA
ILOAD = 1.5A
ILOAD = 3A
●
●
●
●
●
●
Output Voltage Noise
COUT = 10µF, ILOAD = 3A, BW = 10Hz to 100kHz
40
ADJ Pin Bias Current
(Notes 3, 8)
3
10
µA
Shutdown Threshold
VOUT = Off to On
VOUT = On to Off
0.9
0.75
2
V
V
●
●
0.25
µVRMS
SHDN Pin Current
(Note 9)
VSHDN = 0V
VSHDN = 20V
0.01
7
1
30
µA
µA
Quiescent Current in Shutdown
VIN = 6V, VSHDN = 0V
0.01
1
µA
Ripple Rejection
VIN – VOUT = 1.5V (Avg), VRIPPLE = 0.5VP-P,
fRIPPLE = 120Hz, ILOAD = 1.5A
55
63
dB
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LT1764A Series
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. (Note 2)
PARAMETER
CONDITIONS
Current Limit
MIN
TYP
VIN = 7V, VOUT = 0V
Input Reverse Leakage Current
MAX
UNITS
4
A
E Grade: LT1764A; LT1764A-1.5;
VIN = 2.7V, ∆VOUT = – 0.1V
●
3.1
A
MP Grade: LT1764A
VIN = 2.8V, ∆VOUT = – 0.1V
●
3.1
A
VIN = – 20V, VOUT = 0V
●
Reverse Output Current (Note 10) LT1764A-1.5 VOUT = 1.5V, VIN < 1.5V
LT1764A-1.8 VOUT = 1.8V, VIN < 1.8V
LT1764A-2.5 VOUT = 2.5V, VIN < 2.5V
LT1764A-3.3 VOUT = 3.3V, VIN < 3.3V
LT1764A (Note 3) VOUT = 1.21V, VIN < 1.21V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT1764A regulators are tested and specified under pulse load
conditions such that TJ ≈ TA. The LT1764A (E grade) is 100% tested at
TA = 25°C; performance at – 40°C and 125°C is assured by design,
characterization and correlation with statistical process controls. The
LT1764A (MP grade) is 100% tested and guaranteed over the –55°C to
125°C temperature range.
Note 3: The LT1764A (adjustable version) is tested and specified for these
conditions with the ADJ pin connected to the OUT pin.
Note 4. Operating conditions are limited by maximum junction temperature.
The regulated output voltage specification will not apply for all possible
combinations of input voltage and output current. When operating at maximum input voltage, the output current range must be limited. When operating at maximum output current, the input voltage range must be limited.
Note 5: To satisfy requirements for minimum input voltage, the LT1764A
(adjustable version) is tested and specified for these conditions with an
external resistor divider (two 4.12k resistors) for an output voltage of
600
600
600
600
300
1
mA
1200
1200
1200
1200
600
µA
µA
µA
µA
µA
2.42V. The external resistor divider will add a 300µA DC load on the output.
Note 6: Dropout voltage is the minimum input to output voltage differential
needed to maintain regulation at a specified output current. In dropout, the
output voltage will be equal to: VIN – VDROPOUT.
Note 7: GND pin current is tested with VIN = VOUT(NOMINAL) + 1V or VIN =
2.7V (E grade) or VIN = 2.8V (MP grade), whichever is greater, and a current
source load. The GND pin current will decrease at higher input voltages.
Note 8: ADJ pin bias current flows into the ADJ pin.
Note 9: SHDN pin current flows into the SHDN pin.
Note 10: Reverse output current is tested with the IN pin grounded and the
OUT pin forced to the rated output voltage. This current flows into the OUT
pin and out the GND pin.
Note 11. For the LT1764A, LT1764A-1.5 and LT1764A-1.8 dropout voltage
will be limited by the minimum input voltage specification under some
output voltage/load conditions.
Note 12. All combinations of absolute maximum input voltage and
absolute maximum output voltage cannot be achieved. The absolute
maximum differential from input to output is ±20V. For example, with
VIN = 20V, VOUT cannot be pulled below ground.
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TYPICAL PERFOR A CE CHARACTERISTICS
Typical Dropout Voltage
Guaranteed Dropout Voltage
700
DROPOUT VOLTAGE (mV)
500
400
TJ = 125°C
300
200
TJ = 25°C
100
0
= TEST POINTS
600
500
500
TJ ≤ 125°C
400
300
TJ ≤ 25°C
200
0.5
1.0
1.5
2.0
OUTPUT CURRENT (A)
2.5
3.0
1764 G01
400
IL = 3A
300
IL = 1.5A
200
IL = 0.5A
100
100
IL = 100mA
IL = 1mA
0
0
Dropout Voltage
600
DROPOUT VOLTAGE (mV)
GUARANTEED DROPOUT VOLTAGE (mV)
600
0
0.5
2.0
1.5
1.0
OUTPUT CURRENT (A)
2.5
3.0
1764 G02
0
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
125
1764 G03
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LT1764A Series
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TYPICAL PERFOR A CE CHARACTERISTICS
Quiescent Current
LT1764A-1.5 Output Voltage
LT1764A-1.8 Output Voltage
1.54
1.4
1.84
IL = 1mA
IL = 1mA
1.0
LT1764A
0.8
0.6
0.4
VIN = 6V
RL = ∞
IL = 0
VSHDN = VIN
0.2
0
–50 –25
1.53
1.83
1.52
1.82
OUTPUT VOLTAGE (V)
QUIESCENT CURRENT (mA)
1.2
OUTPUT VOLTAGE (V)
LT1764A-1.5/1.8/2.5/3.3
1.51
1.50
1.49
1.48
1.47
50
25
75
0
TEMPERATURE (°C)
100
0
50
75
25
TEMPERATURE (°C)
100
1764 G04
1.76
– 50 – 25
125
IL = 1mA
IL = 1mA
2.54
3.34
1.220
2.48
2.46
ADJ PIN VOLTAGE (V)
1.225
2.50
3.32
3.30
3.28
3.26
3.24
2.42
– 50 – 25
75
50
25
TEMPERATURE (°C)
0
100
125
3.22
– 50 – 25
LT1764A-1.5 Quiescent Current
15
10
5
75
50
25
TEMPERATURE (°C)
0
100
125
1.190
– 50 – 25
0
TJ = 25°C
RL = ∞
VSHDN = VIN
9
10
1764 G41
100
125
1756 G08
TJ = 25°C
RL = ∞
VSHDN = VIN
35
30
25
20
15
10
30
25
20
15
10
5
0
0
8
75
50
25
TEMPERATURE (°C)
0
LT1764A-2.5 Quiescent Current
5
3 4 5 6 7
INPUT VOLTAGE (V)
1.200
QUIESCENT CURRENT (mA)
QUIESCENT CURRENT (mA)
20
2
1.205
40
35
25
1
1.210
LT1764A-1.8 Quiescent Current
30
0
1.215
40
TJ = 25°C
RL = ∞
VSHDN = VIN
IL = 1mA
1756 G07
40
125
1.195
1756 G06
35
100
LT1764A ADJ Pin Voltage
1.230
3.36
2.52
75
50
25
TEMPERATURE (°C)
0
1756 G05
2.56
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
1.78
LT1764A-3.3 Output Voltage
3.38
2.44
QUIESCENT CURRENT (mA)
1.79
1764A G40
LT1764A-2.5 Output Voltage
2.58
1.80
1.77
1.46
– 50 – 25
125
1.81
0
1
2
3 4 5 6 7
INPUT VOLTAGE (V)
8
9
10
1764 G09
0
1
2
3 4 5 6 7
INPUT VOLTAGE (V)
8
9
10
1764 G10
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LT1764A Series
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TYPICAL PERFOR A CE CHARACTERISTICS
LT1764A-3.3 Quiescent Current
20
15
10
20.0
TJ = 25°C
1.4 RL = 4.3k
VSHDN = VIN
1.2
17.5
GND PIN CURRENT (mA)
25
1.6
1.0
0.8
0.6
0.4
0.2
5
0
0
0
1
2
3 4 5 6 7
INPUT VOLTAGE (V)
8
9
2
4
LT1764A-1.8 GND Pin Current
5.0
RL = 18Ω
IL = 100mA*
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 2.5V
2
3 4 5 6 7
INPUT VOLTAGE (V)
8
9
30
RL = 5Ω
IL = 500mA*
25
20
RL = 25Ω
IL = 100mA*
15
RL = 8.33Ω
IL = 300mA*
10
10
1
2
3 4 5 6 7
INPUT VOLTAGE (V)
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 1.21V
8
GND PIN CURRENT (mA)
GND PIN CURRENT (mA)
6
RL = 12.1Ω
IL = 100mA*
90
RL = 0.5Ω
IL = 3A*
60
RL = 1Ω
IL = 1.5A*
0
0
1
2
3 4 5 6 7
INPUT VOLTAGE (V)
8
9
10
1764 G16
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 3.3V
50
RL = 6.6Ω
IL = 500mA*
40
RL = 11Ω
IL = 300mA*
30
RL = 33Ω
IL = 100mA*
20
0
10
1
2
3 4 5 6 7
INPUT VOLTAGE (V)
9
8
10
1764 G15
LT1764A-1.8 GND Pin Current
RL = 2.14Ω
IL = 0.7A*
30
3
0
9
150
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 1.5V
120
RL = 4.33Ω
IL = 300mA*
10
60
LT1764A-1.5 GND Pin Current
9
9
1764 G14
150
RL = 2.42Ω
IL = 500mA*
8
0
0
LT1764A GND Pin Current
12
3 4 5 6 7
INPUT VOLTAGE (V)
10
1764 G13
15
2
70
0
1
1
LT1764A-3.3 GND Pin Current
5
0
0
RL = 15Ω
IL = 100mA*
1764 G42
GND PIN CURRENT (mA)
RL = 6Ω
IL = 300mA*
7.5
2.5
5.0
80
35
GND PIN CURRENT (mA)
GND PIN CURRENT (mA)
10.0
7.5
LT1764A-2.5 GND Pin Current
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 1.8V
RL = 3.6Ω
IL = 500mA*
10.0
0
40
12.5
RL = 5Ω
IL = 300mA*
1764 G12
20.0
15.0
RL = 3Ω
IL = 500mA*
12.5
6 8 10 12 14 16 18 20
INPUT VOLTAGE (V)
1764 G11
17.5
15.0
0
0
10
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 1.5V
2.5
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 1.8V
120
GND PIN CURRENT (mA)
QUIESCENT CURRENT (mA)
30
QUIESCENT CURRENT (mA)
TJ = 25°C
RL = ∞
VSHDN = VIN
35
LT1764A-1.5 GND Pin Current
LT1764A Quiescent Current
40
RL = 0.6Ω
IL = 3A*
90
60
RL = 1.2Ω
IL = 1.5A*
RL = 2.57Ω
IL = 0.7A*
30
0
1
2
3 4 5 6 7
INPUT VOLTAGE (V)
8
9
10
1764A G43
0
0
1
2
3 4 5 6 7
INPUT VOLTAGE (V)
8
9
10
1764 G17
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LT1764A Series
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TYPICAL PERFOR A CE CHARACTERISTICS
LT1764A-2.5 GND Pin Current
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 2.5V
RL = 0.83Ω
IL = 3A*
120
80
RL = 1.66Ω
IL = 1.5A*
40
0
1
0
2
RL = 3.57Ω
IL = 0.7A*
3 4 5 6 7
INPUT VOLTAGE (V)
120
80
RL = 2.2Ω
IL = 1.5A*
RL = 4.71Ω
IL = 0.7A*
9
0
10
0
0
1
2
3 4 5 6 7
INPUT VOLTAGE (V)
1.0
0.9
100
80
60
40
20
10
1.0
2.0
1.5
OUTPUT CURRENT (A)
2.5
0.5
0.4
0.3
0.2
9
4
3
2
50
25
0
75
TEMPERATURE (°C)
100
0
2
4
6 8 10 12 14 16 18 20
SHDN PIN VOLTAGE (V)
1764 G24
10
0.7
0.6
IL = 1mA
0.5
0.4
0.3
0.2
0
–50 –25
125
50
25
0
75
TEMPERATURE (°C)
125
1764 G23
ADJ Pin Bias Current
VSHDN = 20V
3.5
8
7
6
5
4
3
2
0
–50 –25
100
4.0
3.0
2.5
2.0
1.5
1.0
0.5
1
1
9
0.1
ADJ PIN BIAS CURRENT (µA)
SHDN PIN INPUT CURRENT (µA)
9
8
IL = 3A
0.8
SHDN Pin Input Current
5
3 4 5 6 7
INPUT VOLTAGE (V)
1764 G22
10
6
2
0.9
0.6
10
7
1
1.0
0.7
0
–50 –25
3.0
8
0
1764 G20
0.1
0.5
RL = 1.73Ω
IL = 0.7A*
SHDN Pin Threshold
(Off-to-On)
0.8
SHDN Pin Input Current
SHDN PIN INPUT CURRENT (µA)
9
IL = 1mA
1764 G21
0
8
SHDN PIN THRESHOLD (V)
SHDN PIN THRESHOLD (V)
GND PIN CURRENT (mA)
140
120
RL = 0.81Ω
IL = 1.5A*
60
SHDN Pin Threshold
(On-to-Off)
VIN = VOUT(NOM) + 1V
0
90
1764 G19
GND Pin Current vs ILOAD
0
RL = 0.4Ω
IL = 3A*
30
40
8
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 1.21V
120
RL = 1.1Ω
IL = 3A*
1764 G18
160
150
TJ = 25°C
VSHDN = VIN
*FOR VOUT = 3.3V
160
GND PIN CURRENT (mA)
GND PIN CURRENT (mA)
160
LT1764A GND Pin Current
LT1764A-3.3 GND Pin Current
200
GND PIN CURRENT (mA)
200
50
25
0
75
TEMPERATURE (°C)
100
125
1764 G25
0
– 50 – 25
75
50
25
TEMPERATURE (°C)
0
100
125
1756 G26
1764afb
7
LT1764A Series
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TYPICAL PERFOR A CE CHARACTERISTICS
Current Limit
6
Reverse Output Current
6
5
VIN = 7V
VOUT = 0V
5
CURRENT LIMIT (A)
CURRENT LIMIT (A)
TJ = –50°C
4
TJ = 125°C
3
TJ = 25°C
2
1
4
3
2
1
5.0
LT1764A-1.5
REVERSE OUTPUT CURRENT (mA)
Current Limit
4.5
LT1764A-1.8
4.0
LT1764A-2.5
3.5
3.0
LT1764A-3.3
LT1764A
2.5
TJ = 25°C
VIN = 0V
CURRENT FLOWS
INTO OUTPUT PIN
VOUT = VADJ (LT1764A)
VOUT = VFB
(LT1764A-1.5/1.8/-2.5/-3.3)
2.0
1.5
1.0
0.5
0
0
–50 –25
4 6 8 10 12 14 16 18 20
INPUT/OUTPUT DIFFERENTIAL (V)
0
50
25
75
0
TEMPERATURE (°C)
100
1764 G27
RIPPLE REJECTION (dB)
REVERSE OUTPUT CURRENT (mA)
0.4
LT1764A
0.2
0.1
50
25
0
75
TEMPERATURE (°C)
75
100
125
50
COUT = 100µF
TANTALUM +
10 × 1µF
CERAMIC
40
30
20
COUT = 10µF
IL = 1.5A
TANTALUM
10 VIN = VOUT(NOM) + 1V
+ 50mVRMS RIPPLE
0
100
100k
10
1k
10k
FREQUENCY (Hz)
LOAD REGULATION (mV)
MINIMUM INPUT VOLTAGE (V)
IL = 1.5A
1.5
IL = 100mA
1.0
0.5
100
125
1764 G33
50
25
0
75
TEMPERATURE (°C)
100
–5
LT1764A-1.5
LT1764A-1.8
–10
LT1764A-2.5
–15
–20
LT1764A-3.3
∆IL = 1mA TO 3A
VIN = 2.7V (LT1764A/LT1764A-1.5)
VIN = VOUT(NOM) + 1V
(LT1764A-1.8/-2.5/-3.3)
–30
– 50 – 25
75
50
25
TEMPERATURE (°C)
0
125
1764 G32
Output Noise Spectral Density
LT1764A
0
–25
50
25
75
0
TEMPERATURE (°C)
50
–50 –25
1M
5
2.0
0
–50 –25
55
10
IL = 500mA
60
Load Regulation
LT1764A Minimum Input Voltage
10
65
1764 G31
3.0
IL = 3A
9
IL = 1.5A
VIN = VOUT(NOM) + 1V
+ 0.5VP-P RIPPLE
AT f = 120Hz
70
60
1764 G30
2.5
3 4 5 6 7 8
OUTPUT VOLTAGE (V)
70
0.5
0
–50 –25
2
Ripple Rejection
80
VIN = 0V
LT1764A-1.5/1.8/-2.5/-3.3
0.3
1
1764 G29
Ripple Rejection
VOUT = 1.21V (LT1764A)
0.9 VOUT = 1.5V (LT1764A-1.5)
= 1.8V (LT1764A-1.8)
V
0.8 VOUT = 2.5V (LT1764A-2.5)
OUT
0.7 VOUT = 3.3V (LT1764A-3.3)
0
1764 G28
Reverse Output Current
1.0
0.6
125
RIPPLE REJECTION (dB)
2
OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz)
0
100
125
1764 G34
1
COUT = 10µF
ILOAD = 3A
LT1764A-3.3
LT1764A-2.5
LT1764A
LT1764A-1.8
0.1
LT1764A-1.5
0.01
10
100
1k
10k
FREQUENCY (Hz)
100k
1764 G35
1764afb
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LT1764A Series
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TYPICAL PERFOR A CE CHARACTERISTICS
RMS Output Noise vs Load Current
(10Hz to 100kHz)
40
COUT = 10µF
LT1764A-3.3 10Hz to 100kHz
Output Noise
LT1764A-3.3
OUTPUT NOISE (µVRMS)
35
30
LT1764A-2.5
25
VOUT
100µV/DIV
LT1764A-1.8
20
15
LT1764A-1.5
LT1764A
10
COUT = 10µF
IL = 3A
5
0
0.0001
0.001
0.01
0.1
LOAD CURRENT (A)
1ms/DIV
1764A G37
10
1
1764 G36
0.1
0
VIN = 4.3V
CIN = 3.3µF TANTALUM
COUT = 10µF TANTALUM
–0.1
–0.2
OUTPUT VOLTAGE
DEVIATION (V)
0.2
LT1764A-3.3 Transient Response
0.2
0.1
0
–0.1
VIN = 4.3V
CIN = 33µF
COUT = 100µF TANTALUM
+ 10 × 1µF CERAMIC
–0.2
1.00
0.75
0.50
0.25
0
0
2
4
6
8 10 12 14 16 18 20
TIME (µs)
1764 G38
LOAD CURRENT (A)
LOAD CURRENT (A)
OUTPUT VOLTAGE
DEVIATION (V)
LT1764A-3.3 Transient Response
3
2
1
0
0
2
4
6
8 10 12 14 16 18 20
TIME (µs)
1764 G39
1764afb
9
LT1764A Series
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PI FU CTIO S
DD/TO-220/TSSOP
SHDN (Pin 1/1/10): Shutdown. The SHDN pin is used to
put the LT1764A regulators into a low power shutdown
state. The output will be off when the SHDN pin is pulled
low. The SHDN pin can be driven either by 5V logic or
open-collector logic with a pull-up resistor. The pull-up
resistor is required to supply the pull-up current of the
open-collector gate, normally several microamperes, and
the SHDN pin current, typically 7µA. If unused, the SHDN
pin must be connected to VIN. The device will be in
the low power shutdown state if the SHDN pin is not
connected.
IN (Pin 2/Pin 2/Pins 12, 13, 14): Input. Power is supplied
to the device through the IN pin. A bypass capacitor is
required on this pin if the device is more than six inches
away from the main input filter capacitor. In general, the
output impedance of a battery rises with frequency, so it
is advisable to include a bypass capacitor in batterypowered circuits. A bypass capacitor in the range of 1µF to
10µF is sufficient. The LT1764A regulators are designed to
withstand reverse voltages on the IN pin with respect to
ground and the OUT pin. In the case of a reverse input,
which can happen if a battery is plugged in backwards, the
device will act as if there is a diode in series with its input.
There will be no reverse current flow into the regulator and
no reverse voltage will appear at the load. The device will
protect both itself and the load.
Applications Information section for more information on
output capacitance and reverse output characteristics.
SENSE (Pin 5/Pin 5/Pin 6): Sense. For fixed voltage
versions of the LT1764A (LT1764A-1.5/LT1764A-1.8/
LT1764A-2.5/LT1764A-3.3), the SENSE pin is the input
to the error amplifier. Optimum regulation will be obtained at the point where the SENSE pin is connected to the
OUT pin of the regulator. In critical applications, small
voltage drops are caused by the resistance (RP) of PC
traces between the regulator and the load. These may be
eliminated by connecting the SENSE pin to the output at
the load as shown in Figure 1 (Kelvin Sense Connection).
Note that the voltage drop across the external PC traces
will add to the dropout voltage of the regulator. The SENSE
pin bias current is 600µA at the nominal rated output
voltage. The SENSE pin can be pulled below ground (as in
a dual supply system where the regulator load is returned
to a negative supply) and still allow the device to start
and operate.
ADJ (Pin 5/Pin 5/Pin 6): Adjust. For the adjustable LT1764A,
this is the input to the error amplifier. This pin is internally
clamped to ±7V. It has a bias current of 3µA which flows
into the pin. The ADJ pin voltage is 1.21V referenced to
ground and the output voltage range is 1.21V to 20V.
2
NC (Pins 2, 11, 15) TSSOP Only: No Connect.
IN
OUT
4
RP
LT1764A
GND (Pin 3/Pin 3/Pins 1, 7, 8, 9, 16, 17): Ground.
OUT (Pin 4/Pin 4/Pins 3, 4, 5): Output. The output
supplies power to the load. A minimum output capacitor
of 10µF is required to prevent oscillations. Larger output
capacitors will be required for applications with large
transient loads to limit peak voltage transients. See the
+
VIN
1
SHDN
SENSE
GND
+
5
LOAD
3
RP
1764 F01
Figure 1. Kelvin Sense Connection
1764afb
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LT1764A Series
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APPLICATIO S I FOR ATIO
The LT1764A series are 3A low dropout regulators optimized for fast transient response. The devices are capable
of supplying 3A at a dropout voltage of 340mV. The low
operating quiescent current (1mA) drops to less than 1µA
in shutdown. In addition to the low quiescent current, the
LT1764A regulators incorporate several protection features which make them ideal for use in battery-powered
systems. The devices are protected against both reverse
input and reverse output voltages. In battery backup
applications where the output can be held up by a backup
battery when the input is pulled to ground, the LT1764A-X
acts like it has a diode in series with its output and prevents
reverse current flow. Additionally, in dual supply applications where the regulator load is returned to a negative
supply, the output can be pulled below ground by as much
as 20V and still allow the device to start and operate.
Adjustable Operation
The adjustable version of the LT1764A has an output
voltage range of 1.21V to 20V. The output voltage is set by
the ratio of two external resistors as shown in Figure 2. The
device servos the output to maintain the voltage at the ADJ
pin at 1.21V referenced to ground. The current in R1 is
then equal to 1.21V/R1 and the current in R2 is the current
in R1 plus the ADJ pin bias current. The ADJ pin bias
current, 3µA at 25°C, flows through R2 into the ADJ pin.
The output voltage can be calculated using the formula in
Figure 2. The value of R1 should be less than 4.17k to
minimize errors in the output voltage caused by the ADJ
pin bias current. Note that in shutdown the output is turned
off and the divider current will be zero.
The adjustable device is tested and specified with the ADJ
pin tied to the OUT pin for an output voltage of 1.21V.
Specifications for output voltages greater than 1.21V will
be proportional to the ratio of the desired output voltage to
1.21V: VOUT/1.21V. For example, load regulation for an
output current change of 1mA to 3A is – 3mV typical at
VOUT = 1.21V. At VOUT = 5V, load regulation is:
(5V/1.21V)(–3mV) = – 12.4mV
IN
VIN
OUT
VOUT
+
LT1764A
R2
ADJ
GND
R1
1764 F02
⎛ R2⎞
VOUT = 1.21V ⎜ 1 + ⎟ + (IADJ )(R2)
⎝ R1⎠
VADJ = 1.21V
IADJ = 3µA AT 25°C
OUTPUT RANGE = 1.21V TO 20V
Figure 2. Adjustable Operation
Output Capacitors and Stability
The LT1764A regulator is a feedback circuit. Like any
feedback circuit, frequency compensation is needed to
make it stable. For the LT1764A, the frequency compensation is both internal and external—the output capacitor.
The size of the output capacitor, the type of the output
capacitor, and the ESR of the particular output capacitor all
affect the stability.
In addition to stability, the output capacitor also affects the
high frequency transient response. The regulator loop has
a finite band width. For high frequency transient loads,
recovery from a transient is a combination of the output
capacitor and the bandwidth of the regulator. The
LT1764A was designed to be easy to use and accept a
wide variety of output capacitors. However, the frequency
compensation is affected by the output capacitor and
optimum frequency stability may require some ESR, especially with ceramic capacitors.
For ease of use, low ESR polytantalum capacitors (POSCAP)
are a good choice for both the transient response and
stability of the regulator. These capacitors have intrinsic
ESR that improves the stability. Ceramic capacitors have
extremely low ESR, and while they are a good choice in
many cases, placing a small series resistance element will
sometimes achieve optimum stability and minimize ringing. In all cases, a minimum of 10µF is required while the
maximum ESR allowable is 3Ω.
The place where ESR is most helpful with ceramics is low
output voltage. At low output voltages, below 2.5V, some
ESR helps the stability when ceramic output capacitors
are used. Also, some ESR allows a smaller capacitor
value to be used. When small signal ringing occurs with
ceramics due to insufficient ESR, adding ESR or increas1764afb
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LT1764A Series
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APPLICATIO S I FOR ATIO
ing the capacitor value improves the stability and reduces
the ringing. Table 1 gives some recommended values of
ESR to minimize ringing caused by fast, hard current
transitions.
Table 1. Capacitor Minimum ESR
VOUT
10µF
22µF
47µF
100µF
1.2V
10mΩ
5mΩ
3mΩ
0mΩ
1.5V
7mΩ
5mΩ
3mΩ
0mΩ
1.8V
5mΩ
5mΩ
3mΩ
0mΩ
2.5V
0mΩ
0mΩ
0mΩ
0mΩ
3.3V
0mΩ
0mΩ
0mΩ
0mΩ
≥ 5V
0mΩ
0mΩ
0mΩ
0mΩ
Figures 3 through 8 show the effect of ESR on the transient
response of the regulator. These scope photos show the
transient response for the LT1764A at three different
output voltages with various capacitors and various values of ESR. The output load conditions are the same for all
traces. In all cases there is a DC load of 1A. The load steps
up to 2A at the first transition and steps back to 1A at the
second transition.
At the worst case point of 1.2VOUT with 10µF COUT
(Figure 3), a minimum amount of ESR is required. While
5mΩ is enough to eliminate most of the ringing, a value
closer to 20mΩ provides a more optimum response. At
2.5V output with 10µF COUT (Figure 4) the output rings
at the transitions with 0Ω ESR but still settles to within
10mV in 20µs after the 1A load step. Once again a small
value of ESR will provide a more optimum response.
At 5VOUT with 10µF COUT (Figure 5) the response is well
damped with 0Ω ESR.
With a COUT of 100µF at 0Ω ESR and an output of 1.2V
(Figure 6), the output rings although the amplitude is only
10mVp-p. With COUT of 100µF it takes only 5mΩ to 20mΩ
of ESR to provide good damping at 1.2V output. Performance at 2.5V and 5V output with 100µF COUT shows similar characteristics to the 10µF case (see Figures 7-8). At
2.5VOUT 5mΩ to 20mΩ can improve transient response.
At 5VOUT the response is well damped with 0Ω ESR.
Capacitor types with inherently higher ESR can be combined with 0mΩ ESR ceramic capacitors to achieve both
good high frequency bypassing and fast settling time.
Figure 9 illustrates the improvement in transient response
that can be seen when a parallel combination of ceramic
and POSCAP capacitors are used. The output voltage is at
the worst case value of 1.2V. Trace A, is with a 10µF
ceramic output capacitor and shows significant ringing
with a peak amplitude of 25mV. For Trace B, a 22µF/45mΩ
POSCAP is added in parallel with the 10µF ceramic. The
output is well damped and settles to within 10mV in less
than 5µs.
For Trace C, a 100µF/35mΩ POSCAP is connected in
parallel with the 10µF ceramic capacitor. In this case the
peak output deviation is less than 20mV and the output
settles in about 5µs. For improved transient response the
value of the bulk capacitor (tantalum or aluminum electrolytic) should be greater than twice the value of the ceramic
capacitor.
Tantalum and Polytantalum Capacitors
There is a variety of tantalum capacitor types available,
with a wide range of ESR specifications. Older types have
ESR specifications in the hundreds of mΩ to several
Ohms. Some newer types of polytantalum with multielectrodes have maximum ESR specifications as low as
5mΩ. In general the lower the ESR specification, the larger
the size and the higher the price. Polytantalum capacitors
have better surge capability than older types and generally
lower ESR. Some types such as the Sanyo TPE and TPB
series have ESR specifications in the 20mΩ to 50mΩ
range, which provide near optimum transient response.
Aluminum Electrolytic Capacitors
Aluminum electrolytic capacitors can also be used with the
LT1764. These capacitors can also be used in conjunction
with ceramic capacitors. These tend to be the cheapest
and lowest performance type of capacitors. Care must be
used in selecting these capacitors as some types can have
ESR which can easily exceed the 3Ω maximum value.
1764afb
12
LT1764A Series
VOUT = 1.2V
IOUT = 1A WITH
1A PULSE
COUT = 10µF CERAMIC
10
5
20mV/DIV
50mV/DIV
RESR (mΩ)
5
VOUT = 1.2V
IOUT = 1A WITH
1A PULSE
COUT = 100µF CERAMIC
0
RESR (mΩ)
0
10
20
20
50
20µs/DIV
20µs/DIV
1764A F03
Figure 6
Figure 3
VOUT = 2.5V
IOUT = 1A WITH
1A PULSE
COUT = 10µF CERAMIC
5
5
20mV/DIV
50mV/DIV
10
VOUT = 2.5V
ILOAD = 1A WITH
1A PULSE
COUT = 100µF CERAMIC
0
RESR (mΩ)
0
RESR (mΩ)
1764A F06
10
20
20
50
20µs/DIV
1764A F04
20µs/DIV
Figure 4
Figure 7
VOUT = 5V
IOUT = 1A WITH
1A PULSE
COUT = 10µF CERAMIC
10
20
5
20mV/DIV
50mV/DIV
5
VOUT = 5V
ILOAD = 1A WITH
1A PULSE
COUT = 100µF CERAMIC
0
RESR (mΩ)
0
10
20
20µs/DIV
1764A F05
20µs/DIV
1764A F08
Figure 8
Figure 5
A
20mV/DIV
RESR (mΩ)
RESR (mΩ)
1764A F07
B
VOUT = 1.2V
IOUT = 1A WITH 1A PULSE
COUT =
A = 10µF CERAMIC
B = 10µF CERAMIC IN PARALLEL WITH 22µF/
45mΩ POLY
C = 10µF CERAMIC IN PARALLEL WITH 100µF/
35mΩ POLY
C
20µs/DIV
1764A F09
Figure 9
1764afb
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Ceramic Capacitors
Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior over
temperature and applied voltage. The most common
dielectrics used are Z5U, Y5V, X5R and X7R. The Z5U and
Y5V dielectrics are good for providing high capacitances
in a small package, but exhibit strong voltage and temperature coefficients as shown in Figures 3 and 4. When
used with a 5V regulator, a 10µF Y5V capacitor can exhibit
an effective value as low as 1µF to 2µF over the operating
temperature range. The X5R and X7R dielectrics result in
more stable characteristics and are more suitable for use
as the output capacitor. The X7R type has better stability
across temperature, while the X5R is less expensive and
is available in higher values.
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress,
similar to the way a piezoelectric accelerometer or microphone works. For a ceramic capacitor the stress can be
induced by vibrations in the system or thermal transients.
“FREE” Resistance with PC Traces
The resistance values shown in Table 1 can easily be made
using a small section of PC trace in series with the output
capacitor. The wide range of noncritical ESR makes it easy
to use PC trace. The trace width should be sized to handle
the RMS ripple current associated with the load. The
output capacitor only sources or sinks current for a few
microseconds during fast output current transitions. There
Table 2. PC Trace Resistors
0.5oz CU
1.0oz CU
2.0oz CU
10mΩ
20mΩ
30mΩ
Width
0.011" (0.28mm)
0.011" (0.28mm)
0.011" (0.28mm)
Length
0.102" (2.6mm)
0.204" (5.2mm)
0.307" (7.8mm)
Width
0.006" (0.15mm)
0.006" (0.15mm)
0.006" (0.15mm)
Length
0.110" (2.8mm)
0.220" (5.6mm)
0.330" (8.4mm)
Width
0.006" (0.15mm)
0.006" (0.15mm)
0.006" (0.15mm)
Length
0.224" (5.7mm)
0.450" (11.4mm)
0.670" (17mm)
40
20
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
20
CHANGE IN VALUE (%)
CHANGE IN VALUE (%)
0
X5R
–20
–40
–60
Y5V
–80
–100
–20
–40
2
8
6
4
10 12
DC BIAS VOLTAGE (V)
14
16
1764 F10
Figure 3. Ceramic Capacitor DC Bias Characteristics
Y5V
–60
–80
0
X5R
0
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
–100
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
125
1764 F11
Figure 4. Ceramic Capacitor Temperature Characteristics
1764afb
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is no DC current in the output capacitor. Worst case ripple
current will occur if the output load is a high frequency
(>100kHz) square wave with a high peak value and fast
edges (< 1µs). Measured RMS value for this case is 0.5
times the peak-to-peak current change. Slower edges or
lower frequency will significantly reduce the RMS ripple
current in the capacitor.
This resistor should be made using one of the inner
layers of the PC board which are well defined. The resistivity is determined primarily by the sheet resistance of the
copper laminate with no additional plating steps. Table 2
gives some sizes for 0.75A RMS current for various
copper thicknesses. More detailed information regarding
resistors made from PC traces can be found in Application
Note 69, Appendix A.
Overload Recovery
Like many IC power regulators, the LT1764A-X has safe
operating area protection. The safe area protection decreases the current limit as input-to-output voltage increases and keeps the power transistor inside a safe
operating region for all values of input-to-output voltage.
The protection is designed to provide some output current
at all values of input-to-output voltage up to the device
breakdown.
When power is first turned on, as the input voltage rises,
the output follows the input, allowing the regulator to start
up into very heavy loads. During the start-up, as the input
voltage is rising, the input-to-output voltage differential is
small, allowing the regulator to supply large output currents. With a high input voltage, a problem can occur
wherein removal of an output short will not allow the
output voltage to recover. Other regulators, such as the
LT1085, also exhibit this phenomenon, so it is not unique
to the LT1764A series.
The problem occurs with a heavy output load when the
input voltage is high and the output voltage is low. Common situations are immediately after the removal of a
short circuit or when the SHDN pin is pulled high after the
input voltage has already been turned on. The load line
for such a load may intersect the output current curve at
two points. If this happens, there are two stable output
operating points for the regulator. With this double
intersection, the input power supply may need to be
cycled down to zero and brought up again to make the
output recover.
Output Voltage Noise
The LT1764A regulators have been designed to provide
low output voltage noise over the 10Hz to 100kHz bandwidth while operating at full load. Output voltage noise is
typically 50nV√Hz over this frequency bandwidth for the
LT1764A (adjustable version). For higher output voltages
(generated by using a resistor divider), the output voltage
noise will be gained up accordingly. This results in RMS
noise over the 10Hz to 100kHz bandwidth of 15µVRMS for
the LT1764A increasing to 37µVRMS for the LT1764A-3.3.
Higher values of output voltage noise may be measured
when care is not exercised with regards to circuit layout
and testing. Crosstalk from nearby traces can induce
unwanted noise onto the output of the LT1764A-X. Power
supply ripple rejection must also be considered; the
LT1764A regulators do not have unlimited power supply
rejection and will pass a small portion of the input noise
through to the output.
Thermal Considerations
The power handling capability of the device is limited
by the maximum rated junction temperature (125°C).
The power dissipated by the device is made up of two
components:
1. Output current multiplied by the input/output voltage
differential: (IOUT)(VIN – VOUT), and
2. GND pin current multiplied by the input voltage:
(IGND)(VIN).
The GND pin current can be found using the GND Pin
Current curves in the Typical Performance Characteristics. Power dissipation will be equal to the sum of the two
components listed above.
The LT1764A series regulators have internal thermal limiting designed to protect the device during overload conditions. For continuous normal conditions, the maximum
junction temperature rating of 125°C must not be
exceeded. It is important to give careful consideration to
1764afb
15
LT1764A Series
U
U
W
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APPLICATIONS INFORMATION
all sources of thermal resistance from junction to ambient.
Additional heat sources mounted nearby must also be
considered.
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Surface mount heatsinks and plated
through-holes can also be used to spread the heat generated by power devices.
The following table lists thermal resistance for several different board sizes and copper areas. All measurements were
taken in still air on 1/16" FR-4 board with one ounce copper.
Table 3. Q Package, 5-Lead DD
COPPER AREA
TOPSIDE*
BACKSIDE
2
2
2500mm
2
1000mm
125mm
2
BOARD AREA
2500mm
2
2500mm
2
2500mm
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
2500mm
2
23°C/W
2500mm
2
25°C/W
2500mm
2
33°C/W
*Device is mounted on topside.
T Package, 5-Lead TO-220
Thermal Resistance (Junction-to-Case) = 2.5°C/W
Calculating Junction Temperature
Example: Given an output voltage of 3.3V, an input voltage
range of 4V to 6V, an output current range of 0mA to
500mA and a maximum ambient temperature of 50°C,
what will the maximum junction temperature be?
The power dissipated by the device will be equal to:
IOUT(MAX)(VIN(MAX) – VOUT) + IGND(VIN(MAX))
where,
IOUT(MAX) = 500mA
VIN(MAX) = 6V
IGND at (IOUT = 500mA, VIN = 6V) = 10mA
So,
P = 500mA(6V – 3.3V) + 10mA(6V) = 1.41W
Using a DD package, the thermal resistance will be in the
range of 23°C/W to 33°C/W depending on the copper
area. So the junction temperature rise above ambient will
be approximately equal to:
The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:
TJMAX = 50°C + 39.5°C = 89.5°C
Protection Features
The LT1764A regulators incorporate several protection
features which make them ideal for use in battery-powered
circuits. In addition to the normal protection features
associated with monolithic regulators, such as current
limiting and thermal limiting, the devices are protected
against reverse input voltages, reverse output voltages
and reverse voltages from output to input.
Current limit protection and thermal overload protection
are intended to protect the device against current overload
conditions at the output of the device. For normal operation, the junction temperature should not exceed 125°C.
The input of the device will withstand reverse voltages
of 20V. Current flow into the device will be limited to
less than 1mA and no negative voltage will appear at the
output. The device will protect both itself and the load.
This provides protection against batteries which can be
plugged in backward.
The output of the LT1764A-X can be pulled below ground
without damaging the device. If the input is left open circuit
or grounded, the output can be pulled below ground by
20V. For fixed voltage versions, the output will act like a
large resistor, typically 5k or higher, limiting current flow
to typically less than 600µA. For adjustable versions, the
output will act like an open circuit; no current will flow out
of the pin. If the input is powered by a voltage source, the
output will source the short-circuit current of the device
and will protect itself by thermal limiting. In this case,
grounding the SHDN pin will turn off the device and stop
the output from sourcing the short-circuit current.
The ADJ pin of the adjustable device can be pulled above
or below ground by as much as 7V without damaging the
device. If the input is left open circuit or grounded, the ADJ
pin will act like an open circuit when pulled below ground
and like a large resistor (typically 5k) in series with a diode
when pulled above ground.
1.41W(28°C/W) = 39.5°C
1764afb
16
LT1764A Series
U
U
W
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APPLICATIONS INFORMATION
will typically drop to less than 2µA. This can happen if the
input of the device is connected to a discharged (low
voltage) battery and the output is held up by either a
backup battery or a second regulator circuit. The state of
the SHDN pin will have no effect on the reverse output
current when the output is pulled above the input.
In situations where the ADJ pin is connected to a resistor
divider that would pull the ADJ pin above its 7V clamp
voltage if the output is pulled high, the ADJ pin input
current must be limited to less than 5mA. For example, a
resistor divider is used to provide a regulated 1.5V output
from the 1.21V reference when the output is forced to 20V.
The top resistor of the resistor divider must be chosen to
limit the current into the ADJ pin to less than 5mA when the
ADJ pin is at 7V. The 13V difference between OUT and ADJ
pins divided by the 5mA maximum current into the ADJ pin
yields a minimum top resistor value of 2.6k.
REVERSE OUTPUT CURRENT (mA)
5.0
In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled to
ground, pulled to some intermediate voltage, or is left
open circuit. Current flow back into the output will follow
the curve shown in Figure 5.
4.5
TJ = 25°C
VIN = OV
CURRENT FLOWS INTO
OUTPUT PIN
VOUT = VADJ (LT1764A)
VOUT = VFB (LT1764A-1.5
LT1764A-1.8, LT1764A-2.5,
LT1764A-3.3)
LT1764A-1.5
4.0
LT1764A-1.8
3.5
3.0
LT1764A
2.5
2.0
LT1764A-2.5
1.5
1.0
LT1764A-3.3
0.5
0
0
1
2
When the IN pin of the LT1764A-X is forced below the OUT
pin or the OUT pin is pulled above the IN pin, input current
3 4 5 6 7 8
OUTPUT VOLTAGE (V)
9
10
1764 F12
Figure 5. Reverse Output Current
U
TYPICAL APPLICATIO S
SCR Preregulator Provides Efficiency Over Line Variations
L1
500µH
NTE5437
LT1764A-3.3
L2
+
1N4148
10V AC
AT 115VIN
90V AC
TO 140V AC
IN
SHDN
10000µF
OUT
FB
22µF
GND
1k
VOUT
3.3V
3A
+
34k*
10V AC
AT 115VIN
12.1k*
NTE5437
1N4002
1N4002
V+
“SYNC”
TO
ALL “V +”
POINTS
1N4002
2.4k
22µF
750Ω
+
+
1N4148
200k
C1A
1/2 LT1018
0.1µF
–
V+
0.033µF
750Ω
V+
+
C1B
1/2 LT1018
+
1N4148
A1
LT1006
–
L1: COILTRONICS CTX500-2-52
L2: STANCOR P-8560
*1% FILM RESISTOR
10k
10k
10k
V+
–
1µF
V+
LT1004
1.2V
1764 TA03
1764afb
17
LT1764A Series
U
TYPICAL APPLICATIO S
Adjustable Current Source
R5
0.01Ω
+
VIN > 2.7V
C1
10µF
LT1004-1.2
IN
OUT
LT1764A-1.8
SHDN
FB
R1
1k
R2
40.2k
R4
2.2k
R6
2.2k
LOAD
R8
100k
GND
R3
2k
C3
1µF
R7
470Ω
ADJUST R1 FOR 0A TO 3A
CONSTANT CURRENT
2
–
3
+
8
1/2 LT1366
1
4
C2
3.3µF
1764 TA04
U
PACKAGE DESCRIPTION
Q Package
5-Lead Plastic DD Pak
(Reference LTC DWG # 05-08-1461)
0.256
(6.502)
0.060
(1.524)
0.060
(1.524)
TYP
0.390 – 0.415
(9.906 – 10.541)
0.165 – 0.180
(4.191 – 4.572)
15° TYP
0.060
(1.524)
0.183
(4.648)
0.059
(1.499)
TYP
0.330 – 0.370
(8.382 – 9.398)
BOTTOM VIEW OF DD PAK
HATCHED AREA IS SOLDER PLATED
COPPER HEAT SINK
(
+0.008
0.004 –0.004
+0.203
0.102 –0.102
)
0.095 – 0.115
(2.413 – 2.921)
0.075
(1.905)
0.300
(7.620)
0.045 – 0.055
(1.143 – 1.397)
(
+0.012
0.143 –0.020
+0.305
3.632 –0.508
)
0.067
(1.70)
0.028 – 0.038 BSC
(0.711 – 0.965)
0.013 – 0.023
(0.330 – 0.584)
0.050 ± 0.012
(1.270 ± 0.305)
Q(DD5) 1098
1764afb
18
LT1764A Series
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PACKAGE DESCRIPTION
T Package
5-Lead Plastic TO-220 (Standard)
(Reference LTC DWG # 05-08-1421)
0.147 – 0.155
(3.734 – 3.937)
DIA
0.390 – 0.415
(9.906 – 10.541)
0.165 – 0.180
(4.191 – 4.572)
0.045 – 0.055
(1.143 – 1.397)
0.230 – 0.270
(5.842 – 6.858)
0.570 – 0.620
(14.478 – 15.748)
0.460 – 0.500
(11.684 – 12.700)
0.620
(15.75)
TYP
0.330 – 0.370
(8.382 – 9.398)
0.700 – 0.728
(17.78 – 18.491)
0.095 – 0.115
(2.413 – 2.921)
SEATING PLANE
0.260 – 0.320
(6.60 – 8.13)
0.067
BSC
(1.70)
0.152 – 0.202
(3.861 – 5.131)
0.155 – 0.195*
(3.937 – 4.953)
0.013 – 0.023
(0.330 – 0.584)
0.135 – 0.165
(3.429 – 4.191)
0.028 – 0.038
(0.711 – 0.965)
* MEASURED AT THE SEATING PLANE
T5 (TO-220) 0399
FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663)
Exposed Pad Variation BB
4.90 – 5.10*
(.193 – .201)
3.58
(.141)
3.58
(.141)
16 1514 13 12 1110
6.60 ±0.10
9
2.94
(.116)
4.50 ±0.10
2.94 6.40
(.116) (.252)
BSC
SEE NOTE 4
0.45 ±0.05
1.05 ±0.10
0.65 BSC
1 2 3 4 5 6 7 8
RECOMMENDED SOLDER PAD LAYOUT
4.30 – 4.50*
(.169 – .177)
0.09 – 0.20
(.0035 – .0079)
0.50 – 0.75
(.020 – .030)
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
MILLIMETERS
2. DIMENSIONS ARE IN
(INCHES)
3. DRAWING NOT TO SCALE
0.25
REF
1.10
(.0433)
MAX
0° – 8°
0.65
(.0256)
BSC
0.05 – 0.15
0.195 – 0.30
(.002 – .006)
(.0077 – .0118)
FE16 (BB) TSSOP 0204
TYP
4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
1764afb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LT1764A Series
U
TYPICAL APPLICATIO
Paralleling of Regulators for Higher Output Current
R1
0.01Ω
+
IN
OUT
LT1764A-3.3
SHDN
FB
C1
100µF
VIN > 3.7V
+
3.3V
6A
C2
22µF
GND
R2
0.01Ω
IN
SHDN
OUT
LT1764A
SHDN
ADJ
R7
4.12k
GND
R3
2.2k
R4
2.2k
3
+
8
–
4
R5
1k
1
1/2 LT1366
2
R6
6.65k
C3
0.01µF
1764 TA05
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
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LT1762 Series
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LT1763 Series
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LT1962
300mA, Low Noise, LDO Micropower Regulator
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LT1963A
1.5A, Low Noise, Fast Transient Response LDO
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LT1964
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OPTI-LOOP is a registered trademark of Linear Technology Corporation. UltraFast and ThinSOT are trademarks of Linear Technology Corporation.
1764afb
20
Linear Technology Corporation
LT 0706 REV B • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
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© LINEAR TECHNOLOGY CORPORATION 2002
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