Intersil ISL21060BFH630Z-TK Precision, low noise fga voltage reference Datasheet

ISL21060
Precision Reference with Disable
®
Data Sheet
September 30, 2009
Precision, Low Noise FGA™ Voltage
References
Features
The ISL21060 FGA™ voltage references are low power,
high precision voltage references fabricated on Intersil’s
proprietary Floating Gate Analog technology. A new disable
feature allows the device to shut down the output and reduce
supply current drain from 15µA operating to <500nA.
The ISL21060 family features guaranteed initial accuracy as
low as ±1.0mV with drift down to 10ppm/°C. Noise is typically
10µVP-P (10Hz BW). This combination of high initial accuracy,
low power and low output noise performance of the ISL21060
enables versatile high performance control and data
acquisition applications with low power consumption.
Pinout
FN6706.4
• Reference Output Voltage . . . . . . . . . . . . 2.048V, 2.500V,
3.000V, 3.300V, 4.096V
• Initial Accuracy . . . . . . . . . . . . . . . . . . . . .±1.0mV, ±2.5mV
• Input Voltage Range
- ISL21060-20 . . . . . . . . . . . . . . . . . . . . . . . . 2.5V to 5.5V
- ISL21060-25 . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
- ISL21060-30 . . . . . . . . . . . . . . . . . . . . . . . . 3.2V to 5.5V
- ISL21060-33 . . . . . . . . . . . . . . . . . . . . . . . . 3.5V to 5.5V
- ISL21060-41 . . . . . . . . . . . . . . . . . . . . . . . . 4.3V to 5.5V
• Output Voltage Noise . . . . . . . . . 10µVP-P (0.1Hz to 10Hz)
• Supply Current . . . . . . . . . . . . . . . . . . . . . . . . .40µA (Max)
• Tempco. . . . . . . . . . . . . . . . . . . . . . . 10ppm/°C, 25ppm/°C
ISL21060
(6 LD SOT-23)
TOP VIEW
• Output Current Capability. . . . . . . . . . . . . . +10.0mA/-5mA
• Operating Temperature Range. . . . . . . . . -40°C to +125°C
NC
1
6
VOUTF
GND
2
5
VOUTS
EN
3
4
VIN
• Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Ld SOT-23
• Pb-Free (RoHS compliant)
Applications
• High Resolution A/Ds and D/As
• Digital Meters
• Bar Code Scanners
• Basestations
• Battery Management/Monitoring
• Industrial/Instrumentation Equipment
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2008, 2009. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL21060
Pin Descriptions
PIN NUMBER
PIN NAME
DESCRIPTION
1
NC
2
GND
3
EN
Enable Input. Active High. Do not Float.
4
VIN
Input Voltage Connection
5
VOUTS
Voltage Reference Output Connection (Sense)
6
VOUTF
Voltage Reference Output Connection (Force)
No Connect; Do Not Connect
Ground Connection
Ordering Information
PART NUMBER
(Note)
PART
MARKING
VOUT OPTION
(V)
GRADE
(mV)
TEMP. RANGE
(ppm/°C)
PACKAGE
(Pb-Free)
PKG. DWG. #
ISL21060BFH620Z-TK*
GACB
2.048
1.0
10
6 Ld SOT-23
MDP0038
ISL21060CFH620Z-TK*
GACD
2.048
2.5
25
6 Ld SOT-23
MDP0038
ISL21060BFH625Z-TK*
GAEA
2.500
1.0
10
6 Ld SOT-23
MDP0038
ISL21060CFH625Z-TK*
GAGA
2.500
2.5
25
6 Ld SOT-23
MDP0038
ISL21060BFH630Z-TK*
GAHA
3.000
1.0
10
6 Ld SOT-23
MDP0038
ISL21060CFH630Z-TK*
GAJA
3.000
2.5
25
6 Ld SOT-23
MDP0038
ISL21060CFH633Z-TK*
GAPA
3.300
2.5
25
6 Ld SOT-23
MDP0038
ISL21060BFH641Z-TK*
GACC
4.096
1.0
10
6 Ld SOT-23
MDP0038
ISL21060CFH641Z-TK*
GACE
4.096
2.5
25
6 Ld SOT-23
MDP0038
*Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations).
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J
STD-020.
2
FN6706.4
September 30, 2009
ISL21060
Absolute Voltage Ratings
Thermal Information
Max Voltage
VIN to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +6.5V
VOUT to GND (10s). . . . . . . . . . . . . . . . . . . . . .-0.5V to VOUT + 1V
Voltage on “DNC” pins . . . . . No connections permitted to these pins
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5500V
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .550V
Charged Device Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2kV
Thermal Resistance (Typical, Note 1)
θJA (°C/W)
6 Ld SOT-23 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
230
Continuous Power Dissipation (TA = +70°C, Note 3)
Storage Temperature Range . . . . . . . . . . . . . . . . . -65°C to +150°C
6 Ld SOT-23, derate
5.88mW/°C above +70°C . . . . . . . . . . . . . . . . . . . . . . . . . 471mW
Pb-free Reflow Profile (Note 2). . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Temperature Range (Industrial) . . . . . . . . . . . . . . . .-40°C to +125°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at
the specified temperature and are pulsed tests, therefore: TJ = TC = TA
NOTE:
1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2. Post-reflow drift for the ISL21060 devices will range from 100µV to 1.0mV based on experimental results with devices tested in sockets and also
on FR4 multi-layer PC boards. The design engineer must take this into account when considering the reference voltage after assembly.
Electrical Specifications
PARAMETER
(ISL21060-20, VOUT = 2.048V) VIN = 3.0V, TA = -40°C to +125°C, IOUT = 0, unless otherwise specified.
DESCRIPTION
VOUT
Output Voltage
VOA
VOUT Accuracy @ TA = +25°C
TC VOUT
Output Voltage Temperature
Coefficient (Note 3)
CONDITIONS
MIN
TYP
MAX
2.048
UNIT
V
ISL21060B20
-1.0
+1.0
mV
ISL21060C20
-2.5
+2.5
mV
ISL21060B
10
ppm/°C
ISL21060C
25
ppm/°C
5.5
V
VIN
Input Voltage Range
IIN
Supply Current
VEN = VIN
16
40
µA
ΔVOUT /ΔVIN
Line Regulation
2.5V < VIN < 5.5V
50
150
µV/V
ΔVOUT/ΔIOUT
Load Regulation
Sourcing: 0mA ≤ IOUT ≤ 10mA
3
50
µV/mA
Sinking: -5mA ≤ IOUT ≤ 0mA
150
400
µV/mA
2.5
ISC
Short Circuit Current
TA = +25°C, VOUT tied to GND
50
mA
tR
Turn-on Settling Time
VOUT = ±0.1%
300
µs
Ripple Rejection
f = 10kHz
75
dB
eN
Output Voltage Noise
0.1Hz ≤ f ≤ 10Hz
10
µVP-P
VN
Broadband Voltage Noise
10Hz ≤ f ≤ 1kHz
2.5
µVRMS
Noise Density
f = 1kHz
60
nV/√Hz
ΔVOUT/ΔTA
Thermal Hysteresis (Note 4)
ΔTA = +165°C
100
ppm
ΔVOUT/Δt
Long Term Stability (Note 5)
TA = +25°C
100
ppm
OUTPUT DISABLE
VENH
Enable Logic High (ON)
VENL
Enable Logic Low (OFF)
IINSD
Shutdown Supply Current
3
1.6
VEN ≤ 0.35V
V
0.4
0.8
V
1.5
µA
FN6706.4
September 30, 2009
ISL21060
Electrical Specifications
PARAMETER
(ISL21060-25, VOUT = 2.500V) VIN = 3.0V, TA = -40°C to +125°C, IOUT = 0, unless otherwise specified.
DESCRIPTION
VOUT
Output Voltage
VOA
VOUT Accuracy @ TA = +25°C
TC VOUT
CONDITIONS
MIN
TYP
MAX
2.500
Output Voltage Temperature
Coefficient (Note 3)
UNIT
V
ISL21060B25
-1.0
+1.0
mV
ISL21060C25
-2.5
+2.5
mV
ISL21060B
10
ppm/°C
ISL21060C
25
ppm/°C
5.5
V
VIN
Input Voltage Range
IIN
Supply Current
VEN = VIN
16
40
µA
ΔVOUT /ΔVIN
Line Regulation
2.7V < VIN < 5.5V
50
150
µV/V
ΔVOUT/ΔIOUT
Load Regulation
Sourcing: 0mA ≤ IOUT ≤ 10mA
3
150
µV/mA
Sinking: -5mA ≤ IOUT ≤ 0mA
130
400
µV/mA
2.7
ISC
Short Circuit Current
TA = +25°C, VOUT tied to GND
50
mA
tR
Turn-on Settling Time
VOUT = ±0.1%
300
µs
Ripple Rejection
f = 10kHz
75
dB
eN
Output Voltage Noise
0.1Hz ≤ f ≤ 10Hz
10
µVP-P
VN
Broadband Voltage Noise
10Hz ≤ f ≤ 1kHz
2.5
µVRMS
Noise Density
f = 1kHz
60
nV/√Hz
ΔVOUT/ΔTA
Thermal Hysteresis (Note 4)
ΔTA = +165°C
100
ppm
ΔVOUT/Δt
Long Term Stability (Note 5)
TA = +25°C
100
ppm
OUTPUT DISABLE
VENH
Enable Logic High (ON)
VENL
Enable Logic Low (OFF)
IINSD
Shutdown Supply Current
Electrical Specifications
1.6
VEN ≤ 0.35V
V
0.4
0.8
V
1.5
µA
(ISL21060-30, VOUT = 3.000V) VIN = 3.5V, TA = -40°C to +125°C, IOUT = 0, unless otherwise
specified.
PARAMETER
DESCRIPTION
VOUT
Output Voltage
VOA
VOUT Accuracy @ TA = +25°C
TC VOUT
Output Voltage Temperature
Coefficient (Note 3)
CONDITIONS
MIN
TYP
MAX
3.000
UNIT
V
ISL21060B30
-1.0
+1.0
mV
ISL21060C30
-2.5
+2.5
mV
ISL21060B
10
ppm/°C
ISL21060C
25
ppm/°C
5.5
V
VIN
Input Voltage Range
IIN
Supply Current
VEN = VIN
16
40
µA
ΔVOUT /ΔVIN
Line Regulation
3.2V < VIN < 5.5V
50
150
µV/V
ΔVOUT/ΔIOUT
Load Regulation
Sourcing: 0mA ≤ IOUT ≤ 10mA
3
50
µV/mA
Sinking: -5mA ≤ IOUT ≤ 0mA
130
400
µV/mA
3.2
ISC
Short Circuit Current
TA = +25°C, VOUT tied to GND
50
mA
tR
Turn-on Settling Time
VOUT = ±0.1%
300
µs
Ripple Rejection
f = 10kHz
75
dB
eN
Output Voltage Noise
0.1Hz ≤ f ≤ 10Hz
10
µVP-P
VN
Broadband Voltage Noise
10Hz ≤ f ≤ 1kHz
2.5
µVRMS
4
FN6706.4
September 30, 2009
ISL21060
Electrical Specifications
(ISL21060-30, VOUT = 3.000V) VIN = 3.5V, TA = -40°C to +125°C, IOUT = 0, unless otherwise
specified. (Continued)
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
Noise Density
f = 1kHz
60
nV/√Hz
ΔVOUT/ΔTA
Thermal Hysteresis (Note 4)
ΔTA = +165°C
100
ppm
ΔVOUT/Δt
Long Term Stability (Note 5)
TA = +25°C
100
ppm
OUTPUT DISABLE
VENH
Enable Logic High (ON)
VENL
Enable Logic Low (OFF)
IINSD
Shutdown Supply Current
Electrical Specifications
PARAMETER
1.6
VEN ≤ 0.35V
V
0.4
0.8
V
1.5
µA
(ISL21060-33, VOUT = 3.300V) VIN = 5.0V, TA = -40°C to +125°C, IOUT = 0, unless otherwise specified.
DESCRIPTION
CONDITIONS
VOUT
Output Voltage
VOA
VOUT Accuracy @ TA = +25°C
TC VOUT
Output Voltage Temperature Coefficient ISL21060C
(Note 3)
VIN
Input Voltage Range
IIN
Supply Current
EN = VIN
ΔVOUT /ΔVIN
Line Regulation
ΔVOUT/ΔIOUT
Load Regulation
MIN
TYP
MAX
3.300
ISL21060C33
-2.5
UNIT
V
+2.5
mV
25
ppm/°C
5.5
V
18
40
µA
3.5V < VIN < 5.5V
20
150
µV/V
Sourcing: 0mA ≤ IOUT ≤ 10mA
10
50
µV/mA
Sinking: -5mA ≤ IOUT ≤ 0mA
120
400
µV/mA
3.5
ISC
Short Circuit Current
TA = +25°C, VOUT tied to GND
50
mA
tR
Turn-on Settling Time
VOUT = ±0.1%
300
µs
Ripple Rejection
f = 10kHz
75
dB
eN
Output Voltage Noise
0.1Hz ≤ f ≤ 10Hz
10
µVP-P
VN
Broadband Voltage Noise
10Hz ≤ f ≤ 1kHz
2.5
µVRMS
Noise Density
f = 1kHz
60
nV/√Hz
ΔVOUT/ΔTA
Thermal Hysteresis (Note 4)
ΔTA = +165°C
100
ppm
ΔVOUT/Δt
Long Term Stability (Note 5)
TA = +25°C
100
ppm
OUTPUT DISABLE
VENH
Enable Logic High (ON)
VENL
Enable Logic Low (OFF)
IINSD
Shutdown Supply Current
5
1.6
VEN ≤ 0.35V
V
0.4
0.8
V
1.5
µA
FN6706.4
September 30, 2009
ISL21060
Electrical Specifications
PARAMETER
(ISL21060-41, VOUT = 4.096V) VIN = 5.0V, TA = -40°C to +125°C, IOUT = 0, unless otherwise specified.
DESCRIPTION
VOUT
Output Voltage
VOA
VOUT Accuracy @ TA = +25°C
TC VOUT
Output Voltage Temperature Coefficient
(Note 3)
CONDITIONS
MIN
TYP
MAX
4.096
UNIT
V
ISL21060B41
-1.0
+1.0
mV
ISL21060C41
-2.5
+2.5
mV
ISL21060B
10
ppm/°C
ISL21060C
25
ppm/°C
5.5
V
VIN
Input Voltage Range
IIN
Supply Current
EN = VIN
20
40
µA
ΔVOUT /ΔVIN
Line Regulation
4.3V < VIN < 5.5V
50
150
µV/V
ΔVOUT/ΔIOUT
Load Regulation
Sourcing: 0mA ≤ IOUT ≤ 10mA
10
50
µV/mA
Sinking: -5mA ≤ IOUT ≤ 0mA
130
400
µV/mA
4.3
ISC
Short Circuit Current
TA = +25°C, VOUT tied to GND
50
mA
tR
Turn-on Settling Time
VOUT = ±0.1%
300
µs
Ripple Rejection
f = 10kHz
75
dB
eN
Output Voltage Noise
0.1Hz ≤ f ≤ 10Hz
10
µVP-P
VN
Broadband Voltage Noise
10Hz ≤ f ≤ 1kHz
2.5
µVRMS
Noise Density
f = 1kHz
60
nV/√Hz
ΔVOUT/ΔTA
Thermal Hysteresis (Note 4)
ΔTA = +165°C
100
ppm
ΔVOUT/Δt
Long Term Stability (Note 5)
TA = +25°C
100
ppm
OUTPUT DISABLE
VENH
Enable Logic High (ON)
VENL
Enable Logic Low (OFF)
IINSD
Shutdown Supply Current
1.6
VEN ≤ 0.35V
V
0.4
0.8
V
1.5
µA
NOTES:
3. Over the specified temperature range. Temperature coefficient is measured by the box method whereby the change in VOUT is divided by the
temperature range; in this case, -40°C to +125°C = +165°C.
4. Thermal Hysteresis is the change of VOUT measured @ TA = +25°C after temperature cycling over a specified range, ΔTA. VOUT is read initially
at TA = +25°C for the device under test. The device is temperature cycled and a second VOUT measurement is taken at +25°C. The difference
between the initial VOUT reading and the second VOUT reading is then expressed in ppm. For Δ TA = +165°C, the device under test is cycled
from +25°C to +125°C to -40°C to +25°C.
5. Long term drift is logarithmic in nature and diminishes over time. Drift after the first 1000 hours will be approximately 10ppm/√1khrs.
6
FN6706.4
September 30, 2009
ISL21060
Typical Performance Curves (ISL21060-30) (REXT = 100kΩ)
3.0020
17
3.0015
16
3.0010
UNIT 3
15
UNIT 2
14
IIN (µA)
3.0005
VOUT (V)
+125°C
3.0000
UNIT 1
2.9995
13
+25°C
2.9990
12
2.9985
11
2.9980
-40
-20
0
20
40
60
80
100
-40°C
10
120
3.0
TEMPERATURE (°C)
100
1.8
90
80
1.6
+125°C
5.0
5.5
-40°C
+25°C
70
60
IIN (µA)
1.2
IIN (µA)
4.5
FIGURE 2. IIN vs VIN, 3 TEMPERATURES
2.0
1.0
0.8
50
+125°C
40
30
0.6
+25°C
0.4
20
10
0.2
0.0
4.0
VIN (V)
FIGURE 1. VOUT vs TEMPERATURE, 3 UNITS
1.4
3.5
-40°C
0
2
1
4
3
0
5
0
1
3
VENABLE (V)
2
VIN (V)
FIGURE 3. IIN vs VIN [SLEEP MODE], 3 TEMPERATURES
5
4
6
FIGURE 4. IIN vs VENABLE, 3 TEMPERATURES
1.2
20
1.0
-10
ΔVOUT (µV)
(NORMALIZED TO VIN = 5V)
+125°C
ΔVOUT (mV)
0.8
0.6
0.4
+25°C
0.2
-40°C
0.0
-0.2
-10
-5
0
OUTPUT CURRENT (mA)
FIGURE 5. LOAD REGULATION
7
5
+25°C
-40
+125°C
-70
-100
-40°C
-130
-160
3.0
3.5
4.0
4.5
5.0
5.5
VIN (V)
FIGURE 6. LINE REGULATION OVER-TEMPERATURE
FN6706.4
September 30, 2009
ISL21060
Typical Performance Curves (ISL21060-30) (REXT = 100kΩ) (Continued)
0
3.30
+125°C
-10
-20
3.20
+25°C
PSRR (dB)
DROPOUT VOLTAGE (V)
3.25
3.15
3.10
3.05
-30
-40
-50
NO LOAD
-60
-40°C
10nF
3.00
-70
2.95
-10
-8
-6
-4
-2
0
LOAD CURRENT (mA)
-80
10
1nF
100
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 7. LOAD CURRENT vs DROPOUT
FIGURE 8. PSRR AT DIFFERENT CAPACITIVE LOADS
100
90
NO LOAD
80
CH2 HIGH
4.80V
ZOUT (Ω)
70
1nF
60
50
40
10nF
30
CH2 LOW
-500mV
20
10
0
1
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 10. TURN-ON TIME, NO LOAD
FIGURE 9. ZOUT vs FREQUENCY
CH2 HIGH
4.80V
CH2 LOW
-500mV
FIGURE 11. TURN-ON TIME, 1kΩ
8
FIGURE 12. LOAD TRANSIENT RESPONSE, 1nF LOAD
CAPACITANCE
FN6706.4
September 30, 2009
ISL21060
Typical Performance Curves (ISL21060-30) (REXT = 100kΩ) (Continued)
FIGURE 14. LINE TRANSIENT RESPONSE, 1nF LOAD
FIGURE 13. LOAD TRANSIENT RESPONSE, 100nF LOAD
CAPACITANCE
3.5
3.0
+125°C
2.5
VOUT (V)
2.0
1.5
1.0
+25°C
0.5
-40°C
0.0
-0.5
FIGURE 15. LINE TRANSIENT RESPONSE, 100nF
9
0
1
2
3
VEN (V)
4
5
6
FIGURE 16. VOUT vs VENABLE
FN6706.4
September 30, 2009
ISL21060
Typical Performance Curves (ISL21060-41) (REXT = 100kΩ)
25
4.100
24
4.099
23
UNIT 3
22
4.097
UNIT 1
21
IIN (µA)
VOUT (V)
4.098
UNIT 1
4.096
UNIT 2
4.095
20
19
UNIT 2
18
4.094
UNIT 3
17
4.093
16
4.092
-40
10
60
15
4.3
110
4.5
4.7
4.9
5.3
5.5
VIN (V)
TEMPERATURE (°C)
FIGURE 17. VOUT vs TEMPERATURE, 3 UNITS
FIGURE 18. IIN vs VIN, 3 TEMPERATURES
0.6
100
90
+125°C
0.5
-40°C
+25°C
80
70
0.4
+25°C
60
IIN (µA)
IIN (µA)
5.1
0.3
0.2
-40°C
50
+125°C
40
30
20
0.1
10
0.0
0
2
0
4
2
0
6
FIGURE 19. IIN vs VIN[SLEEP MODE], 3 TEMPERATURES
FIGURE 20. IIN vs VENABLE, 3 TEMPERATURES
75
0.8
VOUT (µV)
(NORMALIZED TO VIN = 5V)
0.6
ΔVOUT (mV)
0.4
0.2
+25°C
+125°C
0
-0.2
-40°C
-0.4
-0.6
-12
6
4
VENABLE (V)
VIN (V)
-10
-8
-6
-4
-2
0
LOAD CURRENT (mA)
FIGURE 21. LOAD REGULATION
10
2
4
6
+125°C
25
+25°C
-25
-40°C
-75
-125
-175
4.0
4.2
4.4
4.6
4.8
5.0
5.2
5.4
5.6
VIN (V)
FIGURE 22. LINE REGULATION OVER-TEMPERATURE
FN6706.4
September 30, 2009
ISL21060
Typical Performance Curves (ISL21060-41) (REXT = 100kΩ)
0
4.40
1nF
-10
4.35
+125°C
-20
4.30
4.25
PSRR (dB)
DROPOUT VOLTAGE (V)
(Continued)
+25°C
4.20
4.15
-30
-40
-50
NO LOAD
-60
-40°C
4.10
4.05
-8
-7
-6
-5
10nF
-70
-4
-3
-2
-1
0
LOAD CURRENT (mA)
-80
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 23. LOAD CURRENT vs DROPOUT
FIGURE 24. PSRR AT DIFFERENT CAPACITIVE LOADS
160
NO LOAD
140
1nF
120
CH2 PK-PK
-5.17V
100nF
ZOUT (Ω)
100
80
10nF
60
40
20
0
1
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 25. ZOUT vs FREQUENCY
FIGURE 26. TURN-ON TIME, NO LOAD
Δ: 8.20V
@: 6.84V
CH2 PK-PK
5.90V
FIGURE 27. TURN-ON TIME, 1kΩ
11
CH2 PK-PK
2.12V
FIGURE 28. LOAD TRANSIENT RESPONSE, 100nF LOAD
CAPACITANCE
FN6706.4
September 30, 2009
ISL21060
Typical Performance Curves (ISL21060-41) (REXT = 100kΩ)
(Continued)
Δ: 2.05V
@: 1.66V
CH2 PK-PK
1.48V
CH2 PK-PK
2.12V
FIGURE 29. LOAD TRANSIENT RESPONSE, 1nF LOAD
CAPACITANCE
FIGURE 30. LINE TRANSIENT RESPONSE, 1nF LOAD
Δ: 2.05V
@: 1.66V
4.5
CH2 PK-PK
1.52V
4.0
3.5
VOUT (V)
3.0
2.5
2.0
1.5
-40°C
1.0
+125°C
0.5
0.0
0
FIGURE 31. LINE TRANSIENT RESPONSE, 100nF LOAD
CAPACITANCE
12
1
2
3
VENABLE (V)
4
5
6
FIGURE 32. VOUT vs VENABLE
FN6706.4
September 30, 2009
ISL21060
Typical Performance Curves (ISL21060-25) (REXT = 100kΩ)
2.5030
16
2.5025
15
2.5020
UNIT 1
+25°C
13
2.5010
IIN (µA)
VOUT (V)
14
UNIT 2
2.5015
+125°C
2.5005
2.5000
12
-40°C
UNIT 3
11
2.4995
10
2.4990
9
2.4985
2.4980
-50
0
50
100
8
2.5
150
3.0
3.5
4.0
4.5
VIN (V)
TEMPERATURE (°C)
FIGURE 33. VOUT vs TEMPERATURE, 3 UNITS
5.5
6.0
FIGURE 34. IIN vs VIN, 3 TEMPERATURES
90
0.6
-40°C
80
0.5
+25°C
+125°C
70
0.4
60
0.3
IIN (µA)
IIN (µA)
5.0
+25°C
0.2
+125°C
50
40
30
-40°C
20
0.1
10
0.0
1
0
2
3
VIN (V)
5
4
0
0
6
FIGURE 35. IIN vs VIN [SLEEP MODE], 3 TEMPERATURES
1
4
6
5
50
0.5
LINE REGULATION NORMALIZED AT VIN = 5
-40°C
0.4
0
+25°C
+125°C
0.3
0.2
0.1
ΔVOUT (µV)
ΔVOUT (mV)
3
VENABLE (V)
FIGURE 36. IIN vs VENABLE, 3 TEMPERATURES
0.6
+25°C
0
-50
-100
-40°C
-0.1
-0.2
2
+125°C
-0.4
-12
-150
LOAD REGULATION
-0.3
NORMALIZED TO VOUT WITH NO LOAD
-10
-8
-6
-4
-2
0
LOAD CURRENT (mA)
FIGURE 37. LOAD REGULATION
13
2
4
6
-200
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
VIN (V)
FIGURE 38. LINE REGULATION OVER-TEMPERATURE
FN6706.4
September 30, 2009
ISL21060
Typical Performance Curves (ISL21060-25) (REXT = 100kΩ) (Continued)
Δ: 3.80V
@: 8.72V
3.00
CH2 PK-PK
5.83V
DROPOUT VOLTAGE (V)
2.95
2.90
+125°C
2.85
2.80
2.75
2.70
+25°C
2.65
2.60
2.55
-40°C
2.50
2.45
-11
-10
-9
-8
-7
-6
-5
-4
-3
-2
-1
0
LOAD CURRENT (mA)
FIGURE 39. LOAD CURRENT vs DROPOUT
Δ: 3.80V
@: 8.72V
Δ: 1.90V
@: 3.40V
CH2 PK-PK
5.80V
CH2 PK-PK
1.54V
FIGURE 41. TURN-ON TIME, 1kΩ
FIGURE 42. LOAD TRANSIENT RESPONSE, 1nF LOAD
CAPACITANCE
Δ: 1.90V
@: 3.40V
CH2 PK-PK
1.30V
FIGURE 43. LOAD TRANSIENT RESPONSE, 100nF LOAD
CAPACITANCE
14
FIGURE 40. TURN-ON TIME, NO LOAD
Δ: 1.90V
@: 4.44V
CH2 PK-PK
2.84V
FIGURE 44. LINE TRANSIENT RESPONSE, 1nF LOAD
FN6706.4
September 30, 2009
ISL21060
Typical Performance Curves (ISL21060-25) (REXT = 100kΩ) (Continued)
3.0
2.5
-40°C
2.0
VOUT (V)
1.5
1.0
+125°C
0.5
0
-0.5
+25°C
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
VENABLE (V)
FIGURE 45. LINE TRANSIENT RESPONSE,100nF
FIGURE 46. VOUT vs VENABLE
Typical Performance Curves (ISL21060-20) (REXT = 100kΩ)
2.052
14
13
2.051
+125°C
UNIT 2
12
11
IIN (µA)
VOUT (V)
2.050
UNIT 1
2.049
9
UNIT 3
2.048
10
-40°C
+25°C
8
2.047
7
2.046
-50
0
50
TEMPERATURE (°C)
100
6
150
5
4
VIN (V)
6
FIGURE 48. IIN vs VIN, 3 TEMPERATURES
FIGURE 47. VOUT vs TEMPERATURE, 3 UNITS
90
0.7
+125°C
0.6
80
-40°C
70
0.5
+25°C
60
0.4
IIN (µA)
IIN (µA)
3
2
0.3
50
+125°C
40
-40°C
+25°C
30
0.2
20
0.1
0
10
0
0
1
2
3
4
5
VIN (V)
FIGURE 49. IIN vs VIN [SLEEP MODE], 3 TEMPERATURES
15
6
0
1
2
3
4
5
6
VENABLE (V)
FIGURE 50. IIN vs VENABLE, 3 TEMPERATURES
FN6706.4
September 30, 2009
ISL21060
Typical Performance Curves (ISL21060-20) (REXT = 100kΩ) (Continued)
0.6
100
0.2
CHANGE IN OUTPUT (µV)
VOLTAGE DIFF (mV)
50
-40°C
0.4
+25°C
0
-0.2
+125°C
+25°C
0
-50
-100
-40°C
-150
-200
+125°C
-250
-0.4
-300
-0.6
-12
-10
-8
-6
-4
-2
0
2
4
-350
6
2
3
4
VIN (V)
LOAD (mA)
FIGURE 51. LOAD REGULATION
5
6
FIGURE 52. LINE REGULATION OVER-TEMPERATURE
2.8
0
2.7
-10
2.6
-20
+125°C
2.5
PSRR (dB)
DROPOUT VOLTAGE
NO LOAD
2.4
+25°C
2.3
1nF
-30
-40
-50
10nF
-60
2.2
-40°C
-70
2.1
2.0
-12
-10
-8
-6
-4
-2
0
LOAD CURRENT (mA)
-80
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 53. LOAD CURRENT vs DROPOUT
FIGURE 54. PSRR AT DIFFERENT CAPACITIVE LOADS
90
80
NO LOAD
70
ZOUT (Ω)
60
10nF
50
40
1nF
30
20
10
0
1
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 55. ZOUT vs FREQUENCY
16
FIGURE 56. TURN-ON TIME, NO LOAD
FN6706.4
September 30, 2009
ISL21060
Typical Performance Curves (ISL21060-20) (REXT = 100kΩ) (Continued)
FIGURE 57. TURN-ON TIME, 1kΩ
FIGURE 59. LOAD TRANSIENT RESPONSE, 100nF LOAD
CAPACITANCE
FIGURE 58. LOAD TRANSIENT RESPONSE, 1nF LOAD
CAPACITANCE
FIGURE 60. LINE TRANSIENT RESPONSE,1nF LOAD
2.5
2.0
-40°C
VOUT (V)
1.5
1.0
0.5
+125°C
0.0
-0.5
FIGURE 61. LINE TRANSIENT RESPONSE,100nF
17
+25°C
0
1
2
3
VENABLE (V)
4
5
6
FIGURE 62. VOUT vs VENABLE
FN6706.4
September 30, 2009
ISL21060
FGA Technology
Board Assembly Considerations
The ISL21060 voltage reference floating gate references
possess very low drift and supply current. The charge stored
on a floating gate cell is set precisely in manufacturing. The
reference voltage output itself is a buffered version of the
floating gate voltage. The resulting reference device has
excellent characteristics which are unique in the industry and
include very low temperature drift, high initial accuracy, and
almost zero supply current. Also, the reference voltage itself is
not limited by voltage bandgaps or zener settings, so a wide
range of reference voltages can be programmed (standard
voltage settings are provided, but customer-specific voltages
are available).
FGA references provide high accuracy and low temperature
drift but some PC board assembly precautions are
necessary. Normal Output voltage shifts of 100µV to 1mV
can be expected with Pb-free reflow profiles or wave solder
on multi-layer FR4 PC boards. Precautions should be taken
to avoid excessive heat or extended exposure to high reflow
or wave solder temperatures, this may reduce device initial
accuracy.
The process used for these reference devices is a floating
gate CMOS process, and the amplifier circuitry uses CMOS
transistors for amplifier and output drive. This circuitry
provides excellent accuracy with a trade-off in output noise
level and load regulation due to the MOS device
characteristics. These limitations are addressed with circuit
techniques discussed in other sections.
Micropower Supply Current and Output Enable
The ISL21060 consumes extremely low supply current due
to the proprietary FGA technology. Low noise performance is
achieved using optimized biasing techniques. Supply current
is typically 16µA and noise is 10µVP-P, benefitting precision,
low noise portable applications, such as handheld meters
and instruments.
The ISL21060 devices have the EN pin, which is used to
Enable/Disable the output of the device. When disabled, the
reference circuitry itself remains biased at a highly accurate
and reliable state. When enabled, the output is driven to the
reference voltage in a relatively short time (about 300µs).
This feature allows multiple references to be connected and
one of them selected. Another application is to disable any
loads that draw significant current, saving power in standby
or shutdown modes.
Board Mounting Considerations
For applications requiring the highest accuracy, board
mounting location should be reviewed. The device uses a
plastic SOIC package, which will subject the die to mild
stresses when the PC board is heated and cooled and
slightly changes shape. Placing the device in areas subject
to slight twisting can cause degradation of the accuracy of
the reference voltage due to these die stresses. It is normally
best to place the device near the edge of a board, or the
shortest side, as the axis of bending is most limited at that
location. Mounting the device in a cutout also minimizes flex.
Obviously, mounting the device on flexprint or extremely thin
PC material will likewise cause loss of reference accuracy.
18
Post-assembly x-ray inspection may also lead to permanent
changes in device output voltage and should be minimized
or avoided. If x-ray inspection is required, it is advisable to
monitor the reference output voltage to verify excessive shift
has not occurred. If large amounts of shift are observed, it is
best to add an X-ray shield consisting of thin zinc (300µm)
sheeting to allow clear imaging, yet block x-ray energy that
affects the FGA reference.
Special Applications Considerations
In addition to post-assembly examination, there are also
other X-ray sources that may affect the FGA reference long
term accuracy. Airport screening machines contain X-rays
and will have a cumulative effect on the voltage reference
output accuracy. Carry-on luggage screening uses low level
X-rays and is not a major source of output voltage shift,
although if a product is expected to pass through that type of
screening over 100 times it may need to consider shielding
with copper or aluminum. Checked luggage X-rays are
higher intensity and can cause output voltage shift in much
fewer passes, so devices expected to go through those
machines should definitely consider shielding. Note that just
two layers of 1/2 ounce copper planes will reduce the
received dose by over 90%. The leadframe for the device
which is on the bottom also provides similar shielding.
If a device is expected to pass through luggage X-ray
machines numerous times, it is advised to mount a 2-layer
(minimum) PC board on the top, and along with a ground
plane underneath will effectively shield it from from 50 to 100
passes through the machine. Since these machines vary in
X-ray dose delivered, it is difficult to produce an accurate
maximum pass recommendation.
Noise Performance and Reduction
The output noise voltage in a 0.1Hz to 10Hz bandwidth is
typically 10µVP-P. The noise measurement is made with a
bandpass filter made of a 1-pole high-pass filter with a corner
frequency at 0.1Hz and a 2-pole low-pass filter with a corner
frequency at 12.6Hz to create a filter with a 9.9Hz bandwidth.
Noise in the 10kHz to 1MHz bandwidth is approximately
100µVP-P with no capacitance on the output. This noise
measurement is made with a 2 decade bandpass filter made
of a 1-pole high-pass filter with a corner frequency at 1/10 of
the center frequency and 1-pole low-pass filter with a corner
frequency at 10x the center frequency. Load capacitance up
to 1µF can be added to improve transient response.
FN6706.4
September 30, 2009
ISL21060
multiplied by 106 to yield ppm/°C. This is the “Box” method for
specifying temperature coefficient.
Turn-On Time
The ISL21060 devices have low supply current and thus the
time to bias-up internal circuitry to final values will be longer
than with higher power references. Normal turn-on time is
typically 300µs. Circuit design must take this into account
when looking at power-up delays or sequencing.
VOUT Kelvin Sensing
The voltage output for the ISL21060 has both a force and a
sense output. This enables remote kevin sensing for highly
accurate voltage setting with long traces and higher current
loads. The VOUTF (force) can be routed to the load with the
shortest, widest trace possible. The VOUTS (sense) is routed
with a narrower trace to the point of the actual load where it is
connected to the VOUTF trace.
Temperature Coefficient
The limits stated for temperature coefficient (tempco) are
governed by the method of measurement. The overwhelming
standard for specifying the temperature drift of a reference is to
measure the reference voltage at two temperatures take the
total variation, (VHIGH – VLOW), and divide by the temperature
extremes of measurement (THIGH – TLOW). The result is
divided by the nominal reference voltage (at T = +25°C) and
The VOUTF and VOUTS traces must always be connected.
If there is only a short trace to the load or even a very light
load, then they can be connected at or near the ISL21060
device.
Typical Application Circuits
+2.7 TO 5.5V
10µF
0.1µF
LOGIC
ENABLE
VIN
EN
VOUTF
VOUTS
ISL21060-25
VOUT = 2.50V
GND
0.001µF
VCC
RH
VOUT
X9119
(UNBUFFERED)
+
SDA
2-WIRE BUS
EL8178
SCL
VSS
-
VOUT
(BUFFERED)
RL
FIGURE 63. 2.5V FULL SCALE LOW-DRIFT, 10-BIT ADJUSTABLE VOLTAGE SOURCE WITH LOW POWER DISABLE
+2.75V TO 5.5V
0.1µF
LOGIC
ENABLE
10µF
VIN
EN
VOUTF
VOUTS
ISL21060-25
VOUT = 2.50V
VOUT SENSE
SEPARATE COPPER TRACE FOR
SENSE INPUT
LOAD
GND
FIGURE 64. KELVIN SENSED LOAD
19
FN6706.4
September 30, 2009
ISL21060
SOT-23 Package Family
MDP0038
e1
D
SOT-23 PACKAGE FAMILY
A
MILLIMETERS
6
N
SYMBOL
4
E1
2
E
3
0.15 C D
1
2X
2
3
0.20 C
5
2X
e
0.20 M C A-B D
B
b
NX
0.15 C A-B
1
3
SOT23-5
SOT23-6
TOLERANCE
A
1.45
1.45
MAX
A1
0.10
0.10
±0.05
A2
1.14
1.14
±0.15
b
0.40
0.40
±0.05
c
0.14
0.14
±0.06
D
2.90
2.90
Basic
E
2.80
2.80
Basic
E1
1.60
1.60
Basic
e
0.95
0.95
Basic
e1
1.90
1.90
Basic
L
0.45
0.45
±0.10
L1
0.60
0.60
Reference
N
5
6
Reference
D
2X
Rev. F 2/07
NOTES:
C
A2
2. Plastic interlead protrusions of 0.25mm maximum per side are not
included.
SEATING
PLANE
A1
0.10 C
1. Plastic or metal protrusions of 0.25mm maximum per side are not
included.
3. This dimension is measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
NX
5. Index area - Pin #1 I.D. will be located within the indicated zone
(SOT23-6 only).
(L1)
6. SOT23-5 version has no center lead (shown as a dashed line).
H
A
GAUGE
PLANE
c
L
0.25
0¬×-0¬+3
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
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reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
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20
FN6706.4
September 30, 2009
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