FAIRCHILD FDMA1027PT

FDMA1027PT
tm
Dual P-Channel PowerTrench® MOSFET
–20 V, –3 A, 120 mΩ
Features
General Description
This device is designed specifically as a single package solution
for the battery charge switch in cellular handset and other
ultra-portable applications. It features two independent
P-Channel MOSFETs with low on-state resistance for minimum
conduction losses. When connected in the typical common
source configuration, bi-directional current flow is possible.
„ Max rDS(on) = 120 mΩ at VGS = -4.5 V, ID = -3.0 A
„ Max rDS(on) = 160 mΩ at VGS = -2.5 V, ID = -2.5 A
„ Max rDS(on) = 240 mΩ at VGS = -1.8 V, ID = -1.0 A
„ Low profile - 0.55 mm maximum - in the new package
MicroFET 2x2 Thin
The MicroFET 2x2 Thin package offers exceptional thermal
performance for it's physical size and is well suited to linear
mode applications.
„ RoHS Compliant
Applications
„ Battery management
„ Load switch
„ Battery protection
1
6
G1
2
5
G2
D2 3
3
G2
S1
4
S2
4
D1
D2
2
D1
D2
5
G1
1
S1
6
PIN 1
D1
S2
MicroFET 2X2 Thin
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
ID
Drain Current
-Continuous
TA = 25 °C
(Note 1a)
-Pulsed
PD
TJ, TSTG
Ratings
-20
Units
V
±8
V
-3
-6
Power Dissipation for Single Operation
TA = 25 °C
(Note 1a)
1.4
Power Dissipation for Single Operation
TA = 25 °C
(Note 1b)
0.7
Operating and Storage Junction Temperature Range
-55 to +150
A
W
°C
Thermal Characteristics
RθJA
Thermal Resistance, Junction to Ambient (Single Operation)
(Note 1a)
86
RθJA
Thermal Resistance, Junction to Ambient (Single Operation)
(Note 1b)
173
RθJA
Thermal Resistance, Junction to Ambient (Dual Operation)
69
RθJA
Thermal Resistance, Junction to Ambient (Dual Operation)
151
°C/W
Package Marking and Ordering Information
Device Marking
27
Device
FDMA1027PT
©2008 Fairchild Semiconductor Corporation
FDMA1027PT Rev.B1
Package
MicroFET 2x2 Thin
1
Reel Size
7 ’’
Tape Width
8 mm
Quantity
3000 units
www.fairchildsemi.com
FDMA1027PT Dual P-Channel PowerTrench® MOSFET
September 2008
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = -250 µA, VGS = 0 V
∆BVDSS
∆TJ
Breakdown Voltage Temperature
Coefficient
ID = -250 µA, referenced to 25 °C
IDSS
Zero Gate Voltage Drain Current
VDS = -16 V, VGS = 0 V
IGSS
Gate to Source Leakage Current
VGS = ±8 V, VDS = 0 V
-20
V
-12
mV/°C
-1
µA
±100
nA
-1.3
V
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = -250 µA
∆VGS(th)
∆TJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = -250 µA, referenced to 25 °C
rDS(on)
Drain to Source On Resistance
-0.4
-0.7
2
mV/°C
VGS = -4.5 V, ID = -3.0 A
90
120
VGS = -2.5 V, ID = -2.5 A
120
160
VGS = -1.8 V, ID = -1.0 A
172
240
VGS = -4.5 V, ID = -3.0 A ,
TJ = 125 °C
118
160
ID(on)
On to State Drain Current
VGS = -4.5 V, VDS = -5 V
gFS
Forward Transconductance
VDS = -5 V, ID = -3.0 A
-20
mΩ
A
7
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
VDS = -10 V, VGS = 0 V,
f = 1 MHz
435
pF
80
pF
45
pF
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
Qg
Total Gate Charge
Qgs
Gate to Source Gate Charge
Qgd
Gate to Drain “Miller” Charge
VDD = -10 V, ID = -1.0 A
VGS = -4.5 V, RGEN = 6 Ω
VDD = -10 V, ID = -3.0 A
VGS = -4.5 V
9
18
ns
11
19
ns
15
27
ns
6
12
ns
4
6
nC
0.8
nC
0.9
nC
Drain-Source Diode Characteristics
IS
Maximum continuous Drain-Source Diode Forward Current
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = -1.1 A
-1.1
(Note 2)
IF = -3.0 A, di/dt = 100 A/µs
-0.8
-1.2
A
V
17
ns
6
nC
Notes:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
a. 86 °C/W when mounted on
a 1 in2 pad of 2 oz copper.
b. 173 °C/W when mounted on a
minimum pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%.
©2008 Fairchild Semiconductor Corporation
FDMA1027PT Rev.B1
2
www.fairchildsemi.com
FDMA1027PT Dual P-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted
6
3.0
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
-ID, DRAIN CURRENT (A)
VGS = -4.5 V
5
VGS = -2 V
VGS = -3.5 V
4
3
VGS = -1.8 V
VGS = -3 V
VGS = -2.5 V
2
1
PULSE DURATION = 300 µs
DUTY CYCLE = 2% MAX
VGS = -1.5 V
0
0
0.5
1.0
1.5
2.0
2.5
PULSE DURATION = 300 µs
DUTY CYCLE = 2%MAX
2.5
VGS = -1.5 V
VGS = -1.8 V
2.0
VGS = -2.5 V
1.5
1.0
0
VGS = -4.5 V
1
2
3
4
5
6
-ID, DRAIN CURRENT (A)
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
Figure 1. On Region Characteristics
1.4
0.28
ID = -3 A
VGS = -4.5 V
rDS(on), DRAIN TO
1.3
1.2
1.1
1.0
0.9
SOURCE ON-RESISTANCE (Ω)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
VGS = -3.5 V
VGS = -3 V
0.5
-VDS, DRAIN TO SOURCE VOLTAGE (V)
PULSE DURATION = 300 µs
DUTY CYCLE = 2% MAX
0.24
ID = -1.5 A
0.20
0.16
TJ = 125 oC
0.12
0.08
TJ = 25 oC
0.8
-50
-25
0
25
50
75
100
125
0.04
150
0
TJ, JUNCTION TEMPERATURE (oC)
2
4
6
8
10
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 4. On-Resistance vs Gate to
Source Voltage
Figure 3. Normalized On Resistance
vs Junction Temperature
10
6
PULSE DURATION = 300 µs
DUTY CYCLE = 2% MAX
5
-IS, REVERSE DRAIN CURRENT (A)
-ID, DRAIN CURRENT (A)
VGS = -2 V
VDS = -5 V
4
3
2
TJ = 125 oC
TJ = 25 oC
1
TJ = -55 oC
0
VGS = 0 V
1
TJ = 125 oC
0.1
TJ = 25 oC
0.01
TJ = -55 oC
0.001
0.0001
0
0.5
1.0
1.5
2.0
2.5
0
Figure 5. Transfer Characteristics
©2008 Fairchild Semiconductor Corporation
FDMA1027PT Rev.B1
0.2
0.4
0.6
0.8
1.0
1.2
-VSD, BODY DIODE FORWARD VOLTAGE (V)
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
3
www.fairchildsemi.com
FDMA1027PT Dual P-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
-VGS, GATE TO SOURCE VOLTAGE (V)
5
700
ID = -3 A
600
4
CAPACITANCE (pF)
VDD = -5 V
3
VDD = -10 V
2
VDD = -15 V
1
500
Ciss
400
300
200
100
0
0
1
2
3
4
0
0
5
Crss
4
8
12
16
20
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs Drain
to Source Voltage
100
1000
P(PK), PEAK TRANSIENT POWER (W)
-ID, DRAIN CURRENT (A)
f = 1 MHz
VGS = 0 V
Coss
THIS AREA IS
LIMITED BY rDS(on)
10
100 us
1 ms
1
10 ms
SINGLE PULSE
TJ = MAX RATED
0.1
100 ms
1s
10 s
DC
RθJA = 173 oC/W
TA = 25 oC
0.01
0.1
1
10
100
100
VGS = -10 V
SINGLE PULSE
RθJA = 173 oC/W
10
TA = 25 oC
1
0.2
-4
10
-3
10
-VDS, DRAIN to SOURCE VOLTAGE (V)
-2
10
-1
10
1
10
100
1000
t, PULSE WIDTH (sec)
Figure 9. Forward Bias Safe
Operating Area
Figure 10. Single Pulse Maximum
Power Dissipation
2
NORMALIZED THERMAL
IMPEDANCE, ZθJA
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
SINGLE PULSE
o
RθJA = 173 C/W
0.01
-4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 11. Junction-to-Ambient Transient Thermal Response Curve
©2008 Fairchild Semiconductor Corporation
FDMA1027PT Rev.B1
4
www.fairchildsemi.com
FDMA1027PT Dual P-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
FDMA1027PT Dual P-Channel PowerTrench® MOSFET
Dimensional Outline and Pad Layout
©2008 Fairchild Semiconductor Corporation
FDMA1027PT Rev.B1
5
www.fairchildsemi.com
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Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications may
change in any manner without notice.
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make changes at any time without notice to
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Semiconductor. The datasheet is for reference information only.
Rev. I36
©2008 Fairchild Semiconductor Corporation
FDMA1027PT Rev.B1
6
www.fairchildsemi.com
FDMA1027PT Dual P-Channel PowerTrench® MOSFET
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