Holtek HT12D 212 series of decoder Datasheet

HT12D/HT12F
212 Series of Decoders
Features
· Operating voltage: 2.4V~12V
· Built-in oscillator needs only 5% resistor
· Low power and high noise immunity CMOS
· Valid transmission indicator
technology
· Easy interface with an RF or an infrared transmission
· Low standby current
medium
· Capable of decoding 12 bits of information
· Minimal external components
· Binary address setting
· Pair with Holtek¢s 212 series of encoders
· Received codes are checked 3 times
· 18-pin DIP, 20-pin SOP package
· Address/Data number combination
- HT12D: 8 address bits and 4 data bits
- HT12F: 12 address bits only
Applications
· Burglar alarm system
· Car alarm system
· Smoke and fire alarm system
· Security system
· Garage door controllers
· Cordless telephones
· Car door controllers
· Other remote control systems
General Description
The 212 decoders are a series of CMOS LSIs for remote
control system applications. They are paired with
Holtek¢s 212 series of encoders (refer to the encoder/decoder cross reference table). For proper operation, a
pair of encoder/decoder with the same number of addresses and data format should be chosen.
ously with their local addresses. If no error or unmatched codes are found, the input data codes are
decoded and then transferred to the output pins. The VT
pin also goes high to indicate a valid transmission.
The 212 series of decoders are capable of decoding
informations that consist of N bits of address and 12-N
bits of data. Of this series, the HT12D is arranged to provide 8 address bits and 4 data bits, and HT12F is used to
decode 12 bits of address information.
The decoders receive serial addresses and data from a
programmed 212 series of encoders that are transmitted
by a carrier using an RF or an IR transmission medium.
They compare the serial input data three times continu-
Selection Table
Function
Data
Address
No.
No.
Type
HT12D
8
4
HT12F
12
0
Part No.
VT
Oscillator
Trigger
Package
L
Ö
RC oscillator
DIN active ²Hi²
18DIP, 20SOP
¾
Ö
RC oscillator
DIN active ²Hi²
18DIP, 20SOP
Notes: Data type: L stands for latch type data output.
VT can be used as a momentary data output.
Rev. 1.10
1
November 18, 2002
HT12D/HT12F
Block Diagram
O S C 2
O S C 1
D iv id e r
O s c illa to r
B u ffe r
D IN
D a ta S h ift
R e g is te r
L a tc h C ir c u it
C o m p a ra to r
C o n tr o l L o g ic
D a ta
D a ta D e te c to r
S y n c . D e te c to r
C o m p a ra to r
T r a n s m is s io n G a te C ir c u it
B u ffe r
A d d re s s
V D D
V T
V S S
Note: The address/data pins are available in various combinations (see the address/data table).
Pin Assignment
8 -A d d re s s
4 -D a ta
8 -A d d re s s
4 -D a ta
1 2 -A d d re s s
0 -D a ta
1 2 -A d d re s s
0 -D a ta
N C
1
2 0
N C
N C
1
2 0
A 0
1
1 8
V D D
A 0
2
1 9
V D D
A 0
1
1 8
V D D
A 0
2
1 9
V D D
A 1
2
1 7
V T
A 1
3
1 8
V T
A 1
2
1 7
V T
A 1
3
1 8
V T
A 2
3
1 6
O S C 1
A 2
4
1 7
O S C 1
A 2
3
1 6
O S C 1
A 2
4
1 7
O S C 1
A 3
4
1 5
O S C 2
A 3
5
1 6
O S C 2
A 3
4
1 5
O S C 2
A 3
5
1 6
O S C 2
A 4
5
1 4
D IN
A 4
6
1 5
D IN
A 4
5
1 4
D IN
A 4
6
1 5
D IN
A 5
6
1 3
D 1 1
A 5
7
1 4
D 1 1
A 5
6
1 3
A 1 1
A 5
7
1 4
A 1 1
A 6
7
1 2
D 1 0
A 6
8
1 3
D 1 0
A 6
7
1 2
A 1 0
A 6
8
1 3
A 1 0
A 7
8
1 1
D 9
A 7
9
1 2
D 9
A 7
8
1 1
A 9
A 7
9
1 2
A 9
V S S
9
1 0
D 8
V S S
1 0
1 1
D 8
V S S
9
1 0
A 8
V S S
1 0
1 1
A 8
H T 1 2 D
2 0 S O P -A
H T 1 2 D
1 8 D IP -A
N C
H T 1 2 F
2 0 S O P -A
H T 1 2 F
1 8 D IP -A
Pin Description
Pin Name
I/O
Internal
Connection
I
NMOS
Transmission Gate
A0~A11 (HT12F)
A0~A7 (HT12D)
Description
Input pins for address A0~A11 setting
These pins can be externally set to VSS or left open.
Input pins for address A0~A7 setting
These pins can be externally set to VSS or left open.
D8~D11 (HT12D)
O
CMOS OUT
DIN
I
CMOS IN
VT
O
CMOS OUT
OSC1
I
Oscillator
Oscillator input pin
OSC2
O
Oscillator
Oscillator output pin
VSS
¾
¾
Negative power supply, ground
VDD
¾
¾
Positive power supply
Rev. 1.10
Output data pins, power-on state is low.
Serial data input pin
Valid transmission, active high
2
November 18, 2002
HT12D/HT12F
Approximate internal connection circuits
N M O S
T r a n s m is s io n G a te
C M O S O U T
C M O S IN
O s c illa to r
E N
O S C 1
O S C 2
Absolute Maximum Ratings
Supply Voltage ..........................................-0.3V to 13V
Storage Temperature ............................-50°C to 125°C
Input Voltage ................................VSS-0.3 to VDD+0.3V
Operating Temperature...........................-20°C to 75°C
Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those
listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.
Electrical Characteristics
Symbol
Parameter
VDD
Operating Voltage
ISTB
Standby Current
Ta=25°C
Test Conditions
VDD
Conditions
¾
¾
5V
Oscillator stops
12V
IDD
IO
IVT
Min.
Typ.
Max.
Unit
2.4
5
12
V
¾
0.1
1
mA
¾
2
4
mA
Operating Current
5V
No load, fOSC=150kHz
¾
200
400
mA
Data Output Source Current (D8~D11)
5V
VOH=4.5V
-1
-1.6
¾
mA
Data Output Sink Current (D8~D11)
5V
VOL=0.5V
1
1.6
¾
mA
VOH=4.5V
-1
-1.6
¾
mA
VOL=0.5V
1
1.6
¾
mA
VT Output Source Current
5V
VT Output Sink Current
VIH
²H² Input Voltage
5V
¾
3.5
¾
5
V
VIL
²L² Input Voltage
5V
¾
0
¾
1
V
fOSC
Oscillator Frequency
5V
ROSC=51kW
¾
150
¾
kHz
Rev. 1.10
3
November 18, 2002
HT12D/HT12F
Functional Description
Operation
Flowchart
12
The 2 series of decoders provides various combinations of addresses and data pins in different packages
so as to pair with the 212 series of encoders.
The oscillator is disabled in the standby state and activated when a logic ²high² signal applies to the DIN pin.
That is to say, the DIN should be kept low if there is no
signal input.
The decoders receive data that are transmitted by an
encoder and interpret the first N bits of code period as
addresses and the last 12-N bits as data, where N is the
address code number. A signal on the DIN pin activates
the oscillator which in turn decodes the incoming address and data. The decoders will then check the received address three times continuously. If the received
address codes all match the contents of the decoder¢s
local address, the 12-N bits of data are decoded to activate the output pins and the VT pin is set high to indicate
a valid transmission. This will last unless the address
code is incorrect or no signal is received.
P o w e r o n
S ta n d b y m o d e
N o
D is a b le V T &
ig n o r e th e r e s t o f
th is w o r d
C o d e in ?
Y e s
A d d r e s s b its
m a tc h e d ?
The output of the VT pin is high only when the transmission is valid. Otherwise it is always low.
N o
Y e s
S to re d a ta
Output type
12
Of the 2 series of decoders, the HT12F has no data
output pin but its VT pin can be used as a momentary
data output. The HT12D, on the other hand, provides 4
latch type data pins whose data remain unchanged until
new data are received.
M a tc h
p r e v io u s s to r e d
d a ta ?
N o
Y e s
N o
3 tim e s
o f c h e c k in g
c o m p le te d ?
Part
No.
Data
Pins
Address
Pins
Output
Type
Operating
Voltage
HT12D
4
8
Latch
2.4V~12V
Y e s
HT12F
0
12
¾
2.4V~12V
L a tc h d a ta
to o u tp u t &
a c tiv a te V T
N o
A d d re s s o r
d a ta e rro r ?
Y e s
Decoder timing
E n c o d e r
T r a n s m is s io n
E n a b le
< 1 w o rd
E n c o d e r
D O U T
4 w o rd s
2
1 4
T r a n s m itte d
C o n tin u o u s ly
c lo c k s
4 w o rd s
2
1 4
c lo c k s
D e c o d e r V T
c h e c k
c h e c k
L a tc h e d
D a ta O u t
Rev. 1.10
4
November 18, 2002
HT12D/HT12F
Encoder/Decoder cross reference table
Package
Decoders
Part No.
Data Pins
Address Pins
VT
Pair Encoder
Encoder
Decoder
DIP
SOP
DIP
SOP
HT12D
4
8
Ö
HT12A
HT12E
18
20
18
20
HT12F
0
12
Ö
HT12A
HT12E
18
20
18
20
Address/Data sequence
The following table provides address/data sequence for various models of the 212 series of decoders.
Address/Data Bits
Part No.
0
1
2
3
4
5
6
7
8
9
10
11
HT12D
A0
A1
A2
A3
A4
A5
A6
A7
D8
D9
D10
D11
HT12F
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
Oscillator frequency vs supply voltage
fo s c
(S c a le )
R o s c (9 )
4 .0 0
2 7 k 9
3 .5 0
3 0 k 9
3 3 k 9
3 .0 0
3 6 k 9
3 9 k 9
4 3 k 9
2 .5 0
4 7 k 9
5 1 k 9
5 6 k 9
2 .0 0
6 2 k 9
6 8 k 9
7 5 k 9
1 .5 0
8 2 k 9
1 0 0 k 9
1 2 0 k 9
(1 0 0 k H z )1 .0 0
1 5 0 k 9
1 8 0 k 9
2 2 0 k 9
0 .5 0
0 .2 5
2
Note:
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
V D D
(V D C )
The recommended oscillator frequency is fOSCD (decoder) @ 50 fOSCE (HT12E encoder)
1
@ fOSCE (HT12A encoder).
3
Rev. 1.10
5
November 18, 2002
HT12D/HT12F
Application Circuits
R e c e iv e r C ir c u it
1
2
3
4
5
6
7
8
9
A 0
V D D
A 1
V T
A 2
O S C 1
A 3
O S C 2
A 4
D IN
A 5
D 1 1
A 6
D 1 0
A 7
D 9
V S S
D 8
0 6 Rev. 1.10
R e c e iv e r C ir c u it
V
1 8
D D
1
2
1 7
3
1 6
1 5
R
O S C
4
1 4
5
1 3
6
1 2
7
1 1
8
1 0
9
,
V D D
A 1
V T
A 2
O S C 1
A 3
O S C 2
A 4
D IN
A 5
A 1 1
A 6
A 1 0
1 2
A 7
A 9
1 1
V S S
A 8
1 0
0 6 6
V
1 8
A 0
D D
1 7
1 6
1 5
R
O S C
1 4
1 3
.
November 18, 2002
HT12D/HT12F
Package Information
18-pin DIP (300mil) outline dimensions
A
B
1 8
1 0
1
9
H
C
D
E
=
G
I
F
Symbol
A
Rev. 1.10
Dimensions in mil
Min.
Nom.
Max.
895
¾
915
B
240
¾
260
C
125
¾
135
D
125
¾
145
E
16
¾
20
F
50
¾
70
G
¾
100
¾
H
295
¾
315
I
335
¾
375
a
0°
¾
15°
7
November 18, 2002
HT12D/HT12F
20-pin SOP (300mil) outline dimensions
1 1
2 0
A
B
1
1 0
C
C '
G
H
D
E
Symbol
Rev. 1.10
=
F
Dimensions in mil
Min.
Nom.
Max.
A
394
¾
419
B
290
¾
300
C
14
¾
20
C¢
490
¾
510
D
92
¾
104
E
¾
50
¾
F
4
¾
¾
G
32
¾
38
H
4
¾
12
a
0°
¾
10°
8
November 18, 2002
HT12D/HT12F
Product Tape and Reel Specifications
Reel dimensions
D
T 2
A
C
B
T 1
SOP 20W
Symbol
Description
Dimensions in mm
A
Reel Outer Diameter
330±1.0
B
Reel Inner Diameter
62±1.5
C
Spindle Hole Diameter
13.0+0.5
-0.2
D
Key Slit Width
2.0±0.5
T1
Space Between Flange
24.8+0.3
-0.2
T2
Reel Thickness
30.2±0.2
Rev. 1.10
9
November 18, 2002
HT12D/HT12F
Carrier tape dimensions
P 0
D
P 1
t
E
F
W
C
D 1
B 0
P
K 0
A 0
SOP 20W
Symbol
Description
Dimensions in mm
W
Carrier Tape Width
24.0+0.3
-0.1
P
Cavity Pitch
12.0±0.1
E
Perforation Position
1.75±0.1
F
Cavity to Perforation (Width Direction)
11.5±0.1
D
Perforation Diameter
1.5+0.1
D1
Cavity Hole Diameter
1.5+0.25
P0
Perforation Pitch
4.0±0.1
P1
Cavity to Perforation (Length Direction)
2.0±0.1
A0
Cavity Length
10.8±0.1
B0
Cavity Width
13.3±0.1
K0
Cavity Depth
3.2±0.1
t
Carrier Tape Thickness
0.3±0.05
C
Cover Tape Width
Rev. 1.10
21.3
10
November 18, 2002
HT12D/HT12F
Holtek Semiconductor Inc. (Headquarters)
No.3, Creation Rd. II, Science Park, Hsinchu, Taiwan
Tel: 886-3-563-1999
Fax: 886-3-563-1189
http://www.holtek.com.tw
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Tel: 886-2-2655-7070
Fax: 886-2-2655-7373
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Tel: 021-6485-5560
Fax: 021-6485-0313
http://www.holtek.com.cn
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5/F, Unit A, Productivity Building, Cross of Science M 3rd Road and Gaoxin M 2nd Road, Science Park, Nanshan District,
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Fax: 510-252-9885
http://www.holmate.com
Copyright Ó 2002 by HOLTEK SEMICONDUCTOR INC.
The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used
solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable
without further modification, nor recommends the use of its products for application that may present a risk to human life
due to malfunction or otherwise. Holtek¢s products are not authorized for use as critical components in life support devices
or systems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information,
please visit our web site at http://www.holtek.com.tw.
Rev. 1.10
11
November 18, 2002
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