® OPA2111 Dual Low Noise Precision Difet ® OPERATIONAL AMPLIFIER FEATURES APPLICATIONS ● LOW NOISE: 100% Tested, 8nV/√Hz max at 10kHz ● PRECISION INSTRUMENTATION ● DATA ACQUISITION ● TEST EQUIPMENT ● ● ● ● ● LOW BIAS CURRENT: 4pA max LOW OFFSET: 500µV max LOW DRIFT: 2.8µV/°C HIGH OPEN-LOOP GAIN: 114dB min HIGH COMMON-MODE REJECTION: 96dB min ● PROFESSIONAL AUDIO EQUIPMENT ● MEDICAL EQUIPMENT ● DETECTOR ARRAYS DESCRIPTION The OPA2111 is a high precision monolithic dielectrically isolated FET (Difet ) operational amplifier. Outstanding performance characteristics allow its use in the most critical instrumentation applications. Noise, bias current, voltage offset, drift, open-loop gain, common-mode rejection, and power supply rejection are superior to BIFET® amplifiers. Very low bias current is obtained by dielectric isolation with on-chip guarding. +VCC 8 –In +In Noise-Free Cascode* Laser trimming of thin-film resistors gives very low offset and drift. Extremely low noise is achieved with patented circuit design techniques. A cascode design allows high precision input specifications and reduced susceptibility to flicker noise. Standard dual op amp pin configuration allows upgrading of existing designs to higher performance levels. Output –VCC 4 *Patented OPA2111 Simplified Circuit (Each Amplifier) BIFET® National Semiconductor Corp., Difet ® Burr-Brown Corp. SBOS140 International Airport Industrial Park • Mailing Address: PO Box 11400 Tel: (520) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP • • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706 Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 © 1984 Burr-Brown Corporation PDS-540E Printed in U.S.A. October, 1993 SPECIFICATIONS ELECTRICAL At VCC = ±15VDC and TA = +25°C unless otherwise noted . OPA2111AM PARAMETER CONDITION INPUT NOISE Voltage, fO = 10Hz fO = 100Hz fO = 1kHz fO = 10kHz fB = 10Hz to 10kHz fB = 0.1Hz to 10Hz Current, fB = 0.1Hz to 10Hz fO = 0.1Hz to 20kHz OFFSET VOLTAGE(2) Input Offset Voltage Average Drift Match Supply Rejection MIN 100% Tested 100% Tested 100% Tested (1) (1) (1) (1) (1) VCM = 0VDC TA = TMIN to TMAX 90 OPA2111BM TYP MAX 40 15 8 6 0.7 1.6 15 0.8 MIN OPA2111SM TYP MAX 80 40 15 8 1.2 3.3 24 1.3 30 11 7 6 0.6 1.2 12 0.6 ±0.1 ±2 ±1 110 ±3 136 ±0.75 ±6 96 ±31 MIN OPA2111KM, KP TYP MAX 60 30 12 8 1 2.5 19 1 40 15 8 6 0.7 1.6 15 0.8 80 40 15 8 1.2 3.3 24 1 40 15 8 6 0.7 1.6 15 0.8 ±0.05 ±0.5 ±0.5 110 ±3 136 ±0.5 ±2.8 ±0.1 ±2 2 110 ±3 136 ±0.75 ±6 ±0.3 ±8 2 110 ±3 136 90 ±16 MIN 86 ±31 TYP MAX UNITS nV/√Hz nV/√Hz nV/√Hz nV/√Hz µVrms µVp-p fAp-p fA/√Hz ±2 ±15 ±50 mV µV/°C µV/°C dB µV/V dB Channel Separation 100Hz, R L = 2kΩ BIAS CURRENT(2) Input Bias Current Match VCM = 0VDC ±2 ±1 ±8 ±1.2 ±0.5 ±4 ±2 ±1 ±8 ±3 2 ±15 pA pA VCM = 0VDC ±1.2 ±6 ±0.6 ±3 ±1.2 ±6 ±3 ±12 pA OFFSET CURRENT(2) Input Offset Current IMPEDANCE Differential Common-Mode 1013 || 1 1014 || 3 VOLTAGE RANGE Common-Mode Input Range Common-Mode Rejection 1013 || 1 1014 || 3 1013 || 1 1014 || 3 1013 || 1 1014 || 3 Ω || pF Ω || pF VIN = ±10VDC ±10 90 ±11 110 ±10 96 ±11 110 ±10 90 ±11 110 ±10 82 ±11 110 V dB RL ≥ 2kΩ 110 125 3 114 125 2 110 125 3 106 125 3 dB dB FREQUENCY RESPONSE Unity Gain, Small Signal Full Power Response Slew Rate Settling Time, 0.1% 0.01% Overload Recovery, 50% Overdrive(3) 20Vp-p, RL = 2kΩ VO = ±10V, RL = 2kΩ Gain = –1, RL = 2kΩ 10V Step 16 1 2 32 2 6 10 2 32 2 6 10 MHz kHz V/µs µs µs 5 5 µs RATED OUTPUT Voltage Output Current Output Output Resistance Load Capacitance Stability Short Circuit Current RL = 2kΩ VO = ±10VDC DC, Open-Loop Gain = +1 ±11 ±10 100 1000 40 V mA Ω pF mA ±15 VDC OPEN-LOOP GAIN, DC Open-Loop Voltage Gain Match Gain = –1 POWER SUPPLY Rated Voltage Voltage Range, Derated Performance Current, Quiescent 2 32 2 6 10 16 1 5 ±10 ±5 10 ±11 ±10 100 1000 40 ±5 5 16 1 5 ±10 ±5 10 ±15 IO = 0mADC 2 32 2 6 10 ±11 ±10 100 1000 40 ±10 ±5 10 ±15 ±18 7 ±5 5 ±11 ±10 100 1000 40 ±10 ±5 10 ±15 ±18 7 ±5 5 ±18 7 ±5 0 –55 –40 –65 –40 5 ±18 9 VDC mA +70 +125 +85 +150 +85 °C °C °C °C °C °C/W TEMPERATURE RANGE Specification Operating “M” Package “P” Package Storage “M” Package “P” Package θ Junction-Ambient Ambient Temp. Ambient Temp. –25 –55 +85 +125 –25 –55 +85 +125 –55 –55 +125 +125 Ambient Temp. –65 +150 –65 +150 –65 +150 200 200 200 200(4) NOTES: (1) Sample tested—this parameter is guaranteed. (2) Offset voltage, offset current, and bias current are measured with the units fully warmed up. (3) Overload recovery is defined as the time required for the output to return from saturation to linear operation following the removal of a 50% input overdrive. (4) Typical θJ-A = 150°C/W for plastic DIP. ® OPA2111 2 ELECTRICAL (FULL TEMPERATURE RANGE SPECIFICATIONS) At VCC = ±15VDC and TA = TMIN to TMAX unless otherwise noted. OPA2111AM PARAMETER TEMPERATURE RANGE Specification Range CONDITION MIN Ambient Temp. –25 INPUT OFFSET VOLTAGE(1) Input Offset Voltage Average Drift Match Supply Rejection VOLTAGE RANGE Common-Mode Input Range Common-Mode Rejection +85 –25 TYP OPA2111SM MAX MIN +85 –55 VCM = 0VDC ±125 60 ±1nA ±75 30 ±500 VCM = 0VDC ±75 ±750 ±38 ±375 ±0.08 ±0.75 ±0.5 ±2.8 0.5 100 ±10 ±32 90 ±50 TYP ±0.3 ±2 2 100 ±10 86 OPA2111KM, KP MAX MIN +125 0 ±1.5 ±6 82 ±50 ±2nA ±16.3nA 1nA ±1.3nA ±12nA TYP MAX UNITS +70 °C ±5 ±15 mV µV/°C µV/°C dB µV/V ±0.9 ±8 2 100 ±10 ±80 ±125 ±500 pA pA ±75 ±375 pA VIN = ±10VDC ±10 86 ±11 100 ±10 90 ±11 100 ±10 86 ±11 100 ±10 80 ±11 100 V dB RL ≥ 2kΩ 106 120 5 110 120 3 106 120 5 100 120 5 dB dB RL = 2kΩ VO = ±10VDC VO = 0VDC ±10.5 ±5 10 ±11 ±10 40 ±10.5 ±5 10 ±11 ±10 40 ±10.5 ±5 10 ±11 ±10 40 ±10.5 ±5 10 ±11 ±10 40 V mA mA OPEN-LOOP GAIN, DC Open-Loop Voltage Gain Match RATED OUTPUT Voltage Output Current Output Short Circuit Current MIN ±1.2 ±6 86 OFFSET CURRENT(1) Input Offset Current OPA2111BM MAX ±0.22 ±2 1 100 ±10 VCM = 0VDC BIAS CURRENT(1) Input Bias Current Match TYP POWER SUPPLY Current, Quiescent IO = 0mADC 5 8 5 8 5 8 5 10 mA NOTES: (1) Offset voltage, offset current, and bias current are measured with the units fully warmed up. ABSOLUTE MAXIMUM RATINGS CONNECTION DIAGRAMS Top View Supply ........................................................................................... ±18VDC Internal Power Dissipation (TJ ≤ +175°C) .................................... 500mW Differential Input Voltage ............................................................ Total VCC Input Voltage Range .......................................................................... ±VCC Storage Temperature Range: “M” Package .................. –65°C to +150°C “P” Package .................... –40°C to +85°C Operating Temperature Range: “M” Package ............... –55°C to +125°C “P” Package ................. –40°C to +85°C Lead Temperature (soldering, 10s) ............................................... +300°C Output Short Circuit to Ground (+25°C) ................................. Continuous Junction Temperature .................................................................... +175°C DIP Out A 1 –In A 2 +In A 3 –VCC 4 A B 8 +VCC 7 Out B 6 –In B 5 +In B PACKAGE INFORMATION MODEL Top View OPA2111AM OPA2111BM OPA2111KM OPA2111SM OPA2111KP TO-99 +VCC and Case 8 Out A 1 7 Out B A +In A 6 –In B TO-99 TO-99 TO-99 TO-99 8-Pin Plastic DIP 001 001 001 001 006 ORDERING INFORMATION 5 +In B 3 PACKAGE DRAWING NUMBER(1) NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix D of Burr-Brown IC Data Book. B –In A 2 PACKAGE TEMPERATURE OFFSET VOLTAGE, RANGE max (mV) 1–24 ±0.75 ±0.5 ±2 ±0.75 ±2 $12.50 21.60 25.55 4 –VCC MODEL OPA2111AM OPA2111BM OPA2111KM OPA2111SM OPA2111KP PACKAGE TO-99 –25°C to +85°C TO-99 –25°C to +85°C TO-99 0°C to +70°C TO-99 –55°C to +125°C 8-Pin Plastic DIP 0°C to +70°C ® 3 OPA2111 DICE INFORMATION PAD FUNCTION 1 2 3 4 5 6 7 8 NC Out A –In A +In A –VS +In B –In B Out B +VS No Connection Substrate Bias: No Connection MECHANICAL INFORMATION Die Size Die Thickness Min. Pad Size OPA2111AD DIE TOPOGRAPHY MILS (0.001") MILLIMETERS 138 x 84 ±5 20 ±3 4x4 3.51 x 2.13 ±0.13 0.51 ±0.08 0.10 x 0.10 Backing Transistor Count None 102 TYPICAL PERFORMANCE CURVES TA = +25°C, and VCC = ±15VDC unless otherwise noted. VOLTAGE AND CURRENT NOISE SPECTRAL DENSITY vs TEMPERATURE INPUT CURRENT NOISE SPECTRAL DENSITY 100 100 12 10 1 BM 10 10 8 1 6 0.1 4 0.1 1 10 100 1k 10k 100k –75 1M Frequency (Hz) –25 0 25 50 Temperature (°C) ® OPA2111 –50 4 75 100 0.01 125 Current Noise (fA/ Hz) Voltage Noise (nV/ Hz) Current Noise (fA/ Hz) fO = 1kHz TYPICAL PERFORMANCE CURVES (CONT) TA = +25°C, and VCC = ±15VDC unless otherwise noted. TOTAL(1) INPUT VOLTAGE NOISE SPECTRAL DENSITY vs SOURCE RESISTANCE INPUT OFFSET VOLTAGE WARM-UP DRIFT 1k 40 Offset Voltage Change (µV) RS = 1MΩ 100 RS = 100kΩ BM 10 RS = 100Ω NOTE: (1) Includes contribution from source resistance. 1 1 10 100 1k 10k –20 0 100k 1 2 3 4 5 Frequency (Hz) Time From Power Turn-On (Minutes) INPUT VOLTAGE NOISE SPECTRAL DENSITY BIAS AND OFFSET CURRENT vs TEMPERATURE 1k Bias Current (pA) 1k Voltage Noise (nV/ Hz) 0 –40 0.1 100 AM, SM BM 10 100 100 10 10 1 1 0.1 0.01 1 10 100 1k 10k 100k 6 1k 0.1 1 0.01 –50 1M –25 0 25 50 75 Frequency (Hz) Ambient Temperature (°C) TOTAL(1) INPUT VOLTAGE NOISE (PEAK-TO-PEAK) vs SOURCE RESISTANCE POWER SUPPLY REJECTION vs FREQUENCY 100 125 1M 10M 140 Power Supply Rejection (dB) 1k Voltage Noise (µVp-p) 20 Offset Current (pA) Voltage Noise (nV/ Hz) RS = 10MΩ NOTE: (1) Includes contribution from source resistance. 100 BM fB = 0.1Hz to 10Hz 10 120 100 80 60 40 20 0 1 10 4 10 5 10 6 10 7 10 8 10 9 10 10 1 Source Resistance (Ω) 10 100 1k 10k 100k Frequency (Hz) ® 5 OPA2111 TYPICAL PERFORMANCE CURVES (CONT) TA = +25°C, and VCC = ±15VDC unless otherwise noted. COMMON-MODE REJECTION vs INPUT COMMON-MODE VOLTAGE TOTAL INPUT VOLTAGE NOISE SPECTRAL DENSITY AT 1kHz vs SOURCE RESISTANCE 120 EO RS 100 Common-Mode Rejection (dB) Voltage Noise, EO (nV/ Hz) 1k BM OPA2111 + Resistor 10 Resistor Noise Only 110 100 90 80 70 1 100 1k 10k 100k 1M 10M –15 100M –5 5 10 INPUT OFFSET VOLTAGE CHANGE DUE TO THERMAL SHOCK GAIN-BANDWIDTH AND SLEW RATE vs TEMPERATURE 15 4 4 3 3 2 2 1 1 BM 0 25°C 85°C TA = 25°C to TA = 85°C Air Environment –75 0 0 –1 0 1 2 3 4 5 –75 –50 –25 Time From Thermal Shock (Minutes) 0 25 50 75 100 125 100 125 Ambient Temperature (°C) BIAS AND OFFSET CURRENT vs INPUT COMMON-MODE VOLTAGE OPEN-LOOP GAIN vs TEMPERATURE 10 1 Offset Current 0.1 0.1 130 Voltage Gain (dB) Bias Current 1 140 Offset Current (pA) 10 120 110 0.01 0.01 –15 –10 –5 0 5 10 100 15 –75 ® OPA2111 –50 –25 0 25 50 Ambient Temperature (°C) Common-Mode Voltage (V) 6 75 Slew Rate (V/µs) Gain Bandwidth (MHz) AM 75 –150 Bias Current (pA) 0 Common-Mode Voltage (V) 150 Offset Voltage Change (µV) –10 Source Resistance (Ω) TYPICAL PERFORMANCE CURVES (CONT) TA = +25°C, VCC = ±15VDC unless otherwise noted. COMMON-MODE REJECTION vs FREQUENCY LARGE SIGNAL TRANSIENT RESPONSE 120 15 100 Output Voltage (V) Common-Mode Rejection (dB) 140 80 60 40 0 –15 20 0 1 10 100 1k 10k 100k 1M 25 0 10M OPEN-LOOP FREQUENCY RESPONSE SETTLING TIME vs CLOSED-LOOP GAIN 140 100 Gain φ 80 –90 Phase Margin ≈ 65° 60 40 –135 80 Settling Time (µs) 100 Phase Shift (Degrees) –45 60 0.01% 40 0.1% 20 20 0 –180 1 10 100 1k 10k 100k 1M 0 1 10M 10 GAIN-BANDWIDTH AND SLEW RATE vs SUPPLY VOLTAGE CHANNEL SEPARATION vs FREQUENCY 1 1 0 Channel Separation (dB) 2 2 10 15 RL = ∞ 140 RL = 2kΩ 130 RL = 560Ω 120 110 100 0 5 1k 150 3 3 0 100 Closed-Loop Gain (V/V) Frequency (Hz) Slew Rate (V/µs) Voltage Gain (dB) 120 Gain Bandwidth (MHz) 50 Time (µs) Frequency (Hz) 10 20 Supply Voltage (±VCC ) 100 1k 10k 100k Frequency (Hz) ® 7 OPA2111 TYPICAL PERFORMANCE CURVES (CONT) TA = +25°C, VCC = ±15VDC unless otherwise noted. MAXIMUM UNDISTORTED OUTPUT VOLTAGE vs FREQUENCY SUPPLY CURRENT vs TEMPERATURE 8 Supply Current (mA) Output Voltage (Vp-p) 30 20 10 0 6 4 2 0 1k 10k 100k 1M –75 –50 –25 0 25 50 75 Frequency (Hz) Ambient Temperature (°C) SMALL SIGNAL TRANSIENT RESPONSE TOTAL HARMONIC DISTORTION vs FREQUENCY 100 125 1 60 Total Harmonic Distortion (%) 10kΩ Output Voltage (mV) 40 20 0 –20 –40 10kΩ EO = 7V EO 0.1 2kΩ EO = 700mV 0.01 THD + Noise Residual Test Limit 0.001 –60 0 1 2 3 4 5 0.1 1 10 100 1K 10K 100K Frequency (Hz) Time (µs) APPLICATIONS INFORMATION OFFSET VOLTAGE ADJUSTMENT INPUT PROTECTION The OPA2111 offset voltage is laser-trimmed and will require no further trim for most applications. Conventional monolithic FET operational amplifiers require external current-limiting resistors to protect their inputs against destructive currents that can flow when input FET gate-to-substrate isolation diodes are forward-biased. Most BIFET amplifiers can be destroyed by the loss of –VCC. Offset voltage can be trimmed by summing (see Figure 1). With this trim method there will be no degradation of input offset drift. In Because of its dielectric isolation, no special protection is needed on the OPA2111. Of course, the differential and common-mode voltage limits should be observed. Static damage can cause subtle changes in amplifier input characteristics without necessarily destroying the device. In precision operational amplifiers (both bipolar and FET types), this may cause a noticeable degradation of offset voltage and drift. 1/2 OPA2111 Out 150kΩ –15V ±2mV OffsetTrim 100kΩ 20Ω Static protection is recommended when handling any precision IC operational amplifier. +15V FIGURE 1. Offset Voltage Trim. ® OPA2111 8 GUARDING AND SHIELDING APPLICATIONS CIRCUITS As in any situation where high impedances are involved, careful shielding is required to reduce “hum” pickup in input leads. If large feedback resistors are used, they should also be shielded along with the external input circuitry. Figures 5 through 13 are circuit diagrams of various applications for the OPA2111. Leakage currents across printed circuit boards can easily exceed the bias current of the OPA2111. To avoid leakage problems, it is recommended that the signal input lead of the OPA2111 be wired to a Teflon standoff. If the OPA2111 is to be soldered directly into a printed circuit board, utmost care must be used in planning the board layout. A “guard” pattern should completely surround the high impedance input leads and should be connected to a low impedance point which is at the signal input potential (see Figure 2). Voltage Noise Spectral Density (EO) Typical at 1kHz (nV/ Hz) 1k NOISE: FET vs BIPOLAR RS 100 EO = eN2 + (iNRS)2 + 4kTRS 10 OPA2111 + Resistor Resistor Noise Only OP-27 + Resistor 1 100 Low noise circuit design requires careful analysis of all noise sources. External noise sources can dominate in many cases, so consider the effect of source resistance on overall operational amplifier noise performance. At low source impedances, the low voltage noise of a bipolar operational amplifier is superior, but at higher impedances the high current noise of a bipolar amplifier becomes a serious liability. Above about 15kΩ the OPA2111 will have lower total noise than an OP-27 (see Figure 3). OP-27 + Resistor OPA2111 + Resistor Resistor Noise Only EO 1k 10k BM 100k 1M 10M Source Resistance, RS (Ω) FIGURE 3. Voltage Noise Spectral Density vs Source Resistance. Input Bias Current (pA) 80 BIAS CURRENT CHANGE vs COMMON-MODE VOLTAGE The input bias currents of most popular BIFET® operational amplifiers are affected by common-mode voltage (Figure 4). Higher input FET gate-to-drain voltage causes leakage and ionization (bias) currents to increase. Due to its cascode input stage, the extremely low bias current of the OPA2111 is not compromised by common-mode voltage. TA = 25°C; curves taken from manufacturers' published typical data 60 LF156/157 40 20 0 LF155 AD547 OPA2111 OP-15/16/17 “Perfect Bias Current Cancellation” –20 –15 –10 –5 0 5 10 15 Common-Mode Voltage (VDC) Non-Inverting Buffer 2 2 A In FIGURE 4. Input Bias Currrent vs Common-Mode Voltage. 1 Out 3 Out 1 A 1MΩ In Operate 10kΩ 3 In 1/2 OPA2111BM Zero Inverting 2 Out 1 3 TO-99 Bottom View 100kΩ 4 In 2 A 1 Gain = –100 3 Out 5 2 100Ω 6 100kΩ VOS ≤ 5µV Drift ≤ 0.028µV/°C Zero Droop ≤ 2µV/s Referred to Input Polypropylene 1µF 3 7 1 6 8 7 Board layout for input guarding: guard top and bottom of board. Alternate: use Teflon® standoff for sensitive input pins. 1/2 OPA2111BM 5 Teflon® E. I. Du Pont de Nemours & Co. FIGURE 2. Connection of Input Guard. FIGURE 5. Auto-Zero Amplifier. ® 9 OPA2111 <1pF to prevent gain peaking 100Ω 1000MΩ 10kΩ 2 1/2 OPA2111BM 1 +15V Pin Photodiode UDT Pin-040A 3 5.34MΩ(1) Guard 0.1µF 2 8 1/2 OPA2111 3 0.01µF 5 1000pF 7 4 0.1µF 1000MΩ 1/2 OPA2111BM In Output 1 Out 5.34MΩ(1) 5 x 108V/W 2.67MΩ(1) 500pF –15V Circuit must be well shielded. 2kΩ Q 6 500pF NOTE: (1) For 50Hz use 3.16MΩ and 6.37Ω. Gain = 101 FIGURE 6. Sensitive Photodiode Amplifier. FIGURE 7. High Impedance 60Hz Reject Filter with Gain. 10.5kΩ 0.03µF 0.01µF 73.2Ω 365Ω Right 2 1/2 OPA2111 1 365kΩ 1µF Output 3 L Input 0.01µF RT 100kΩ CT 10.5kΩ 0.03µF 0.01µF 73.2Ω 365Ω Left 6 1/2 OPA2111 7 365Ω 1µF Output 5 R Input 100kΩ RT 0.01µF CT G = 26dB Midband FIGURE 8. RIAA Equalized Stereo Preamplifier. ® OPA2111 10 3 IB = ±4pA max Gain = 100 CMRR ≈ 106dB RIN ≈ 1013Ω 1/2 OPA2111BM 1 –In 2 RF 5kΩ RG 101Ω 6 25kΩ 2 RF 5kΩ 25kΩ 5 6 25kΩ 3 Output 1/2 OPA2111BM 25kΩ 7 5 Burr-Brown INA105 Differential Amplifier 1 +In Differential Voltage Gain = 1 + 2RF /RG FIGURE 9. FET Input Instrumentation Amplifier. 10kΩ ≈10pF (1) 1MΩ 6 IN914 2 1/2 OPA2111AM 1/2 OPA2111AM (1) 1 3 Output 7 (1) IN914 Input 5 Droop ≈ 0.5mV/s 2N4117A 0.01µF Polystyrene NOTE: (1) Reverse polarity for negative peak detection. FIGURE 10. Low-Droop Positive Peak Detector. 6.3MΩ 944kΩ 6.3MΩ 2 1.6MΩ 1.6MΩ 1/2 OPA2111 6 1.6MΩ 1 1.6MΩ 3 7.8MΩ 1/2 OPA2111 5 7 Out In 0.01µF NPO 0.01µF NPO 0.01µF NPO NOTE: Lower value resistors will have lower thermal noise but capacitors must be scaled larger. 0.01µF NPO AV = 2.6 fO = 10Hz –24dB/Octave FIGURE 11. 10Hz Fourth-Order Butterworth Low-Pass Filter. ® 11 OPA2111 100Ω 10kΩ 2 Input 1/2OPA2111 1 10kΩ 3 100Ω 10kΩ Since signal voltage sums directly with N but amplifier noise voltage sums as N, signal-to-noise ratio improves by N. 6 1/2OPA2111 7 10kΩ 5 100Ω AV = –1010 en = 1.9nV/ Hz typ(1) at 10kHz BW = 30kHz typ GBW = 30.3 MHz typ VOS = ±16µV typ(1) ∆VOS/∆T = ±0.16µV/°C typ(1) IB = 40pA max ZIN = 1012Ω || 30pF 10kΩ 2 1/2OPA2111 1 10kΩ 3 100Ω 10kΩ 6 1/2OPA2111 7 NOTE: (1) Theoretical performance achievable from OPA2111BM with uncorrelated random distribution of parameters. 10kΩ 5 100Ω 10kΩ 2 1/2OPA2111 1 10kΩ 10kΩ 3 2 3 1/2OPA2111 N = 10 5 each OPA2111BM FIGURE 12. ‘N’ Stage Parallel-Input Amplifier. ® OPA2111 12 Output OPA37 6 1/2 OPA2111 E1 –In 1 A1 R2 10kΩ R1 202Ω R2 10kΩ 10kΩ 2 INA106 100kΩ 6 10kΩ 3 5 EO Output 1/2 OPA2111 100kΩ AV = 10 A2 1 E2 +In EO = 10(1 + 2 R2/R1)(E2 – E1) = 1000(E2 – E1) Using the INA106 for an output difference amplifier extends the input common-mode range of an instrumentation amplifier to ±10V. A conventional IA with a unity-gain difference amplifier has an input common-mode range limited to ±5V for an output swing of ±10V. This is because a unity-gain difference amp needs ±5V at the input for 10V at the output, allowing only 5V additional for common-mode. FIGURE 13. Precision Instrumentation Amplifier. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® 13 OPA2111 PACKAGE OPTION ADDENDUM www.ti.com 16-Apr-2009 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty OPA2111AM NRND TO-99 LMC 8 20 Green (RoHS & no Sb/Br) AU N / A for Pkg Type OPA2111BM NRND TO-99 LMC 8 20 Green (RoHS & no Sb/Br) AU N / A for Pkg Type OPA2111KM NRND TO-99 LMC 8 20 Green (RoHS & no Sb/Br) AU N / A for Pkg Type OPA2111KP ACTIVE PDIP P 8 50 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type OPA2111KPG4 ACTIVE PDIP P 8 50 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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