FAIRCHILD FAN6861TY

FAN6861
Low-Cost, Highly Integrated, Green-Mode PWM
Controller for Peak Power Management
Features
Description
ƒ
ƒ
Low Startup Current: 15µA Maximum
ƒ
ƒ
ƒ
Internal Soft Start: 10ms
Highly integrated PWM controller, FAN6861 is
optimized for applications with motor load; such as
printer and scanner, which inherently impose some kind
of overload condition on the power supply during
acceleration mode. The two-level OCP function allows
the SMPS to stably deliver peak power during the motor
acceleration mode without causing premature shutdown
and while protecting the SMPS from overload condition.
ƒ
ƒ
ƒ
Constant Output Power Limit (Full AC Input Range)
ƒ
ƒ
ƒ
Green-Mode and Burst-Mode Operation for Low
Standby Power Consumption
Frequency Hopping for EMI Reduction
Peak-Current Mode Control with Cycle-by-Cycle
Current Limiting
Built-in Slope Compensation
Two-Level Over-Current Protection (OCP) with
Delayed Shutdown (780ms) for Peak Power
Management
Open-Loop / Over-Load Protection (OLP)
VDD Over-Voltage Protection (OVP)
Programmable Over-Temperature Protection (OTP)
Applications
ƒ
Switched Mode Power Supply (SMPS) with Motor
Load; such as for printer, scanner, motor drivers,
etc.
ƒ
ƒ
AC/DC Adapters
The green-mode and burst-mode functions with a low
operating current (2.2mA maximum in green mode)
maximize the light load efficiency so that the power
supply can meet most stringent standby power
regulations.
The frequency-hopping function helps reduce electromagnetic interference (EMI) of a power supply by
spreading the energy over a wider frequency range.
The constant power limit function; minimizes the
components stress in abnormal condition and helps
designer to optimize the power stage more easily.
Many protection functions such; as OCP, OLP, OVP
and OTP, are fully integrated into FAN6861, which
improves the SMPS reliability without increasing the
system cost.
Open-Frame SMPS
Ordering Information
Part Number
Operating Temperature Range
FAN6861TY
-40 to +105°C
Eco Status
Green
Package
Packing Method
SSOT-6
Tape & Reel
For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
© 2009 Fairchild Semiconductor Corporation
FAN6861 • Rev. 1.0.1
www.fairchildsemi.com
FAN6861 — Low-Cost, Highly Integrated, Green-Mode PWM Controller for Peak Power Management
May 2009
Figure 1. Typical Application
Block Diagram
GND
1
OVP
25V
OLP
OCP
Auto
Recovery
Protection
OVP
OTP
Latch-off
Protection
VDD
Soft
Driver
S
Latch-Off release
R
4V
VDD
Blanking
Circuit
FB
UVLO
OCP
Slope
Compensation
3R
SENSE
OCP
Delay
0.5V
OTP1
Debounce
RT
OLP
OTP
2
FB
OLP
Delay
4.6V
1V
3
SENSE
5.2V
R
IRT
4
Vlimit ramp
(Include Soft-Start)
Green
Mode
Controller
17.5V/9.5V
GATE
OSC
Internal
BIAS
5
6
Q
FAN6861 — Low-Cost, Highly Integrated, Green-Mode PWM Controller for Peak Power Management
Typical Application
OTP2
Debounce
0.7V
Figure 2. Block Diagram
© 2009 Fairchild Semiconductor Corporation
FAN6861 • Rev. 1.0.1
www.fairchildsemi.com
2
AAR: FAN6861
TT: Wafer lot code
• • •: Year code
_ _ _: Week code
Figure 3. Top Mark
Pin Configuration
Figure 4. Pin Configuration
Pin Definitions
Pin #
Name Description
1
GND
Ground.
2
FB
This pin is internally connected to the inverting input of the PWM comparator. The collector of
an opto-coupler is typically tied to this pin. For stable operation, a capacitor should be placed
between this pin and GND. If the voltage of this pin is higher than 4.6V for longer than 780ms,
the overload protection is triggered and PWM output is disabled.
3
RT
This pin is for programmable over-temperature protection. An external NTC thermistor is
connected between this pin and GND pin. Once the voltage of this pin drops below a threshold
of 0.7V, PWM output is disabled.
4
SENSE
This pin is for current sense. This pin senses the voltage across a resistor. The voltage of this
pin is compared with the feedback information determining the PWM duty cycle.
5
VDD
This pin is the positive supply voltage input.
6
GATE
The totem-pole output driver to drive the gate of power MOSFET. Soft driving waveform is
implemented to reduce EMI.
© 2009 Fairchild Semiconductor Corporation
FAN6861 • Rev. 1.0.1
FAN6861 — Low-Cost, Highly Integrated, Green-Mode PWM Controller for Peak Power Management
Marking Information
www.fairchildsemi.com
3
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device
reliability. The absolute maximum ratings are stress ratings only. All voltage values, except differential voltages, are
given with respect to GND pin.
Symbol
Parameter
VDD
Supply Voltage
VL
Input Voltage to FB, SENSE, VIN, RT,RI Pin
PD
Power Dissipation at TA<50°C
ΘJC
Thermal Resistance (Junction-to-Case)
TJ
TSTG
TL
ESD
Min.
Max.
Unit
30
V
-0.3
7.0
V
300
mW
208.4
°C/W
Operating Junction Temperature
-40
+150
°C
Storage Temperature Range
-55
+150
°C
+260
°C
Lead Temperature, Wave Soldering, 10 Seconds
Electrostatic Discharge Capability
Human Body Model, JESD22-A114
4.5
Charge Device Model, JESD22-C101
1.0
kV
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
TA
Parameter
Operating Ambient Temperature
© 2009 Fairchild Semiconductor Corporation
FAN6861 • Rev. 1.0.1
Min.
Max.
Unit
-40
+105
°C
FAN6861 — Low-Cost, Highly Integrated, Green-Mode PWM Controller for Peak Power Management
Absolute Maximum Ratings
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4
VDD = 15V and TA = 25°C, unless otherwise noted.
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
VDD Section
VDD-OP
Continuously Operating Voltage
24
V
VDD-ON
Turn-On Threshold Voltage
16.5
17.5
18.5
V
VDD-OFF
Turn-Off Voltage
8.5
9.5
10.5
V
VDD-SCP
Threshold Voltage for Output Short-Circuit
Protection (SCP)
VDD-OVP
VDD Over-Voltage Protection (Latch-Off)
VDD-LH
Threshold Voltage for Latch-Off Release
IDD-ST
Startup Current
VTH-ON – 0.16V
IDD-OP
Normal Operating Supply Current
With 1nF Load on
Gate, VFB ≥ VFB-N
IDD-BM
Green-Mode Operating Supply Current
GATE Open,
VFB = VFB-G
VDD-OFF VDD-OFF VDD-OFF
+0.5
+1.0
+1.5
26
V
24
25
V
3
4
5
V
8
15
µA
3
4
mA
2.2
mA
VDD-OVP
VDD Over-Voltage Protection (Latch-Off)
24
25
26
V
tD-VDDOVP
VDD OVP Debounce Time
100
170
240
µs
IDD-LH
Latch-Off Holding Current
25
40
55
µA
1/4.5
1/4.0
1/3.5
V/V
14
16
18
kΩ
VDD = 5V
Feedback Input Section
AV
Input Voltage to Current Sense Attenuation
ZFB
Input Impedance
VFBO
FB Pin Open Voltage
5.0
5.2
5.4
V
Threshold Voltage for Open-loop Protection
4.3
4.6
4.9
V
tD-OLP
Open-Loop Protection Delay Time
700
780
860
ms
tD-SCP
Short-Circuit Protection Delay Time
20
25
30
ms
100
250
270
360
VFB-OLP
At Green Mode
Current Sense Section
tPD
Delay to Output
tLEB
Leading-Edge Blanking Time
ns
ns
VSTHFL
Flat Threshold Voltage for Current Limit
Duty > 51%
0.85
0.89
0.93
V
VSTHVA
Valley Threshold Voltage for Current Limit
Duty = 0%
0.65
0.70
0.75
V
0.47
0.50
0.53
V
0.30
0.33
0.36
V
Soft-Start Time
7.5
10.0
12.5
ms
FB Pin Protection Delay Time for Peak
Loading
700
780
860
ms
VOCP
VSLOPE
tSS
tD-OCP
OCP Trigger Level
Slope Compensation
Duty = DCYMAX
Continued on following page…
© 2009 Fairchild Semiconductor Corporation
FAN6861 • Rev. 1.0.1
FAN6861 — Low-Cost, Highly Integrated, Green-Mode PWM Controller for Peak Power Management
Electrical Characteristics
www.fairchildsemi.com
5
VDD = 15V and TA = 25°C, unless otherwise noted.
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
VFB > VFB-N
60
65
70
VFB ≥ VFB-N
±3.7
±4.2
±4.7
VFB = VFB-G
±1.27
±1.45
±1.63
Unit
Oscillator Section
fOSC
Normal PWM Frequency
Center
Frequency
Jitter Range
kHz
thop-1
Jitter Period 1
VFB ≥ VFB-N
3.9
4.4
4.9
ms
thop-3
Jitter Period 3
VFB = VFB-G
10.2
11.5
12.8
ms
fOSC-G
Green-Mode Minimum Frequency
18.0
22.5
25.0
kHz
VFB-N
Beginning of Green-On
Mode at FB Level
Pin, FB Voltage
2.60
2.85
3.10
V
VFB-G
Beginning of Green-Off
Mode at FB Level
Pin, FB Voltage
2.0
2.2
2.4
V
SG
VFB-ZDC
Slope for Green-Mode Modulation
65
FB Threshold Voltage for Zero-duty
fDV
Frequency Variation vs. VDD Deviation
VDD = 11.5V to 20V
fDT
Frequency Variation vs. Temperature
Deviation
TA = -30 to 85°C
Hz/mV
1.7
1.9
2.1
V
0
0.02
2.00
%
2
%
75
%
1.5
V
PWM Output Section
DCYMAX
Maximum Duty Cycle
VOL
Output Voltage LOW
VDD = 15V, IO =
50mA
VOH
Output Voltage HIGH
VDD = 12V, IO =
50mA
tR
Rising Time
GATE = 1nF
230
ns
tF
Falling Time
GATE = 1nF
30
ns
Gate Output Clamping Voltage
VDD = 20V
VCLAMP
65
70
8
V
15.00
16.75
18.50
V
90
99
108
μA
Over-Temperature Protection (OTP) Section
IRT
Output Current of RT Pin
VRTO
RT Pin Open Voltage
VOTP1
Threshold Voltage for Over-Temperature
Protection
tDOTP-LATCH
3.7
0.92
Over-Temperature Latch-Off Debounce
1.00
V
1.08
V
ms
VFB = VFB-N
15
17
19
VFB = VFB-G
40
51
62
VOTP2
Second Threshold Voltage for OverTemperature Protection
0.65
0.70
0.75
V
tDOTP2-LATCH
Second Over-Temperature Latch-Off
Debounce
50
100
150
μs
© 2009 Fairchild Semiconductor Corporation
FAN6861 • Rev. 1.0.1
FAN6861 — Low-Cost, Highly Integrated, Green-Mode PWM Controller for Peak Power Management
Electrical Characteristics (Continued)
www.fairchildsemi.com
6
VDD = 15V and TA = 25°C, unless otherwise noted.
Symbol
Parameter
Test Condition
Min.
Typ.
65
70
Max.
Unit
75
%
1.5
V
PWM Output Section
DCYMAX
Maximum Duty Cycle
VOL
Output Voltage LOW
VDD = 15V, IO = 50mA
VOH
Output Voltage HIGH
VDD = 12V, IO = 50mA
tR
Rising Time
GATE = 1nF
230
ns
tF
Falling Time
GATE = 1nF
30
ns
Gate Output Clamping Voltage
VDD = 20V
VCLAMP
8
V
15.00
16.75
18.50
V
90
99
108
μA
Over-Temperature Protection (OTP) Section
IRT
Output Current of RT Pin
VRTO
RT Pin Open Voltage
VOTP1
Threshold Voltage for Over-Temperature
Protection
tDOTP-LATCH
VOTP2
tDOTP2-LATCH
3.7
V
0.92
1.00
1.08
VFB = VFB-N
15
17
19
VFB = VFB-G
40
51
62
Second Threshold Voltage for OverTemperature Protection
0.65
0.70
0.75
V
Second Over-Temperature Latch-Off
Debounce
50
100
150
μs
Over-Temperature Latch-Off Debounce
© 2009 Fairchild Semiconductor Corporation
FAN6861 • Rev. 1.0.1
V
ms
FAN6861 — Low-Cost, Highly Integrated, Green-Mode PWM Controller for Peak Power Management
Electrical Characteristics (Continued)
www.fairchildsemi.com
7
VDD-ON vs Temperature (℃)
VDD-OFF vs Temperature (℃)
18
10
17.8
9.8
17.6
VDD-OFF (V)
VDD-ON (V)
9.6
17.4
17.2
9.4
9.2
17
9
16.8
16.6
8.8
-40℃
-30℃
-15℃
0℃
25℃
50℃
75℃
85℃
100℃
-40℃
125℃
-30℃
-15℃
0℃
Temperature (℃)
25℃
50℃
75℃
85℃
100℃
125℃
Temperature (℃)
Figure 5. Turn-On Threshold Voltage (VDD-ON)
vs. Temperature
Figure 6. Turn-Off Threshold Voltage (VDD-OFF)
vs. Temperature
IDD-OP vs Temperature (℃)
FOSC vs Temperature (℃)
66
3.2
65.5
3.15
65
3.1
3.05
FOSC (kHz)
IDD-OP (mA)
64.5
3
2.95
64
63.5
63
62.5
2.9
62
2.85
61.5
2.8
61
-40℃
-30℃
-15℃
0℃
25℃
50℃
75℃
85℃
100℃
125℃
-40℃
-30℃
-15℃
0℃
Temperature (℃)
25℃
50℃
75℃
85℃
100℃
125℃
Temperature (℃)
Figure 7. Operating Current (IDD-OP) vs. Temperature
Figure 8. Normal PWM Frequency (fOSC)
vs. Temperature
VOCP vs Temperature (℃)
DCYMAX vs Temperature (℃)
0.535
70
0.525
69.9
0.515
69.8
DCYMAX (%)
VOCP (V)
0.505
0.495
0.485
69.7
FAN6861 — Low-Cost, Highly Integrated, Green-Mode PWM Controller for Peak Power Management
Typical Performance Characteristics
69.6
0.475
69.5
0.465
0.455
-40℃
69.4
-30℃
-15℃
0℃
25℃
50℃
75℃
85℃
100℃
125℃
-40℃
Temperature (℃)
-15℃
0℃
25℃
50℃
75℃
85℃
100℃
125℃
Temperature (℃)
Figure 9. OCP Trigger Level (VOCP) vs. Temperature
© 2009 Fairchild Semiconductor Corporation
FAN6861 • Rev. 1.0.1
-30℃
Figure 10. Maximum Duty Cycle (DCYMAX)
vs. Temperature
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8
VFB-G vs Temperature (℃)
2.92
2.3
2.91
2.25
2.9
2.2
VFB-G (V)
VFB-N (V)
VFB-N vs Temperature (℃)
2.89
2.15
2.88
2.1
2.87
2.05
2
2.86
-40℃
-30℃
-15℃
0℃
25℃
50℃
75℃
85℃
100℃
-40℃
125℃
-30℃
-15℃
0℃
25℃
50℃
75℃
85℃
100℃
125℃
Temperature (℃)
Temperature (℃)
Figure 12. FB Voltage at fOSC-G (VFB-N) vs. Temperature
Figure 11. FB Threshold Voltage For Frequency
Reduction (VFB-N) vs. Temperature
VZDC vs Temperature (℃)
VOTP1 vs Temperature (℃)
2
1.1
1.95
1.05
VOTP1 (V)
VZDC (V)
1.9
1.85
1
0.95
1.8
0.9
1.75
1.7
0.85
-40℃
-30℃
-15℃
0℃
25℃
50℃
75℃
85℃
100℃
-40℃
125℃
-30℃
-15℃
0℃
Temperature (℃)
25℃
50℃
75℃
85℃
100℃
125℃
Temperature (℃)
Figure 14. Threshold Voltage for Over-Temperature
Protection (VOTP1) vs. Temperature
Figure 13. FB Threshold Voltage for Zero Duty
(VFB-ZDC) vs. Temperature
VOTP2 vs Temperature (℃)
IRT vs Temperature (℃)
104
0.72
102
0.715
100
98
IRT (µA)
VOTP2 (V)
0.71
0.705
0.7
96
94
92
FAN6861 — Low-Cost, Highly Integrated, Green-Mode PWM Controller for Peak Power Management
Typical Performance Characteristics
90
88
0.695
86
84
0.69
-40℃
-30℃
-15℃
0℃
25℃
50℃
75℃
85℃
100℃
-40℃
125℃
-15℃
0℃
25℃
50℃
75℃
85℃
100℃
125℃
Figure 16. Output Current of RT Pin (IRT)
vs. Temperature
Figure 15. Second Threshold Voltage for OverTemperature Protection (VOPT2) vs. Temperature
© 2009 Fairchild Semiconductor Corporation
FAN6861 • Rev. 1.0.1
-30℃
Temperature (℃)
Temperature (℃)
www.fairchildsemi.com
9
Startup Operation
Figure 17 shows the typical startup circuit and
transformer auxiliary winding for FAN6861 application.
Before FAN6861 begins switching operation, it
consumes only startup current (typically 8μA) and the
current supplied through the startup resistor charges
the VDD capacitor (CDD). When VDD reaches turn-on
voltage of 17.5V (VDD-ON), FAN6861 begins switching
and the current consumed increases to 3mA. Then, the
power required is supplied from the transformer
auxiliary winding. The large hysteresis of VDD (8V)
provides more holdup time, which allows using small
capacitor for VDD. The startup resistor is typically
connected to AC line for a fast reset of latch protection.
Figure 18. PWM Frequency
Figure 17. Startup Circuit
Figure 19. Burst Mode Operation
Frequency Hopping
Green-Mode Operation
EMI reduction is accomplished by frequency hopping,
which spreads the energy over a wider frequency range
than the bandwidth measured by the EMI test
equipment. An internal frequency hopping circuit
changes the switching frequency between 60.8kHz and
69.2kHz with a period of 4.4ms, as shown in Figure 20.
The FAN6861 uses feedback voltage (VFB) as an
indicator of the output load and modulates the PWM
frequency, as shown in Figure 18, such that the
switching frequency decreases as load decreases. In
heavy load conditions, the switching frequency is
65KHz. Once VFB decreases below VFB-N (2.85V), the
PWM frequency starts to linearly decrease from 65KHz
to 22kHz to reduce the switching losses. As VFB
decreases below VFB-G (2.2V), the switching frequency
is fixed at 22.5kHz and FAN6861 enters into deep
green mode, where the operating current reduces to
2.2mA (maximum), further reducing the standby power
consumption. As VFB decreases below VFB-ZDC (1.9V),
FAN6861 enters into burst-mode operation. When VFB
drops below VFB-ZDC, FAN6861 stops switching and the
output voltage starts to drop, which causes the
feedback voltage to rise. Once VFB rises above VFB-ZDC,
switching resumes. Burst mode alternately enables and
disables switching, thereby reducing switching loss in
standby mode, as shown in Figure 19.
© 2009 Fairchild Semiconductor Corporation
FAN6861 • Rev. 1.0.1
FAN6861 — Low-Cost, Highly Integrated, Green-Mode PWM Controller for Peak Power Management
Operation Description
Figure 20. Frequency Hopping
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10
Self-protective functions include VDD Over-Voltage
Protection (OVP), Open-Loop/Overload Protection
(OLP),
Over-Current
Protection
(OCP),
OverTemperature Protection (OTP). Among them, OLP,
OCP, and SCP are auto-restart mode protections; while
OVP and OTP are latch-mode protections.
Auto-Restart Mode Protection: Once a fault condition
is detected, switching is terminated and the MOSFET
remains off. This causes VDD to fall because no more
power is delivered from auxiliary winding. When VDD
falls to VDD-OFF (9.5V), the protection is reset and the
operating current reduces to startup current, which
causes VDD to rise. FAN6861 resumes normal operation
when VDD reaches VDD-ON (17.5V). In this manner, the
auto-restart can alternately enable and disable the
switching of the MOSFET until the fault condition is
eliminated (see Figure 21).
Latch-Mode Protection: Once this protection is
triggered, switching is terminated and the MOSFET
remains off. The latch is reset only when VDD is
discharged below 4V by unplugging AC power line.
Vds
Protection Triggers
Power
On
Fault Removed
Figure 22. Two-Level OCP Operation
Open-Loop / Over-Load Protection (OLP)
When the upper branch of the voltage divider for the
shunt regulator (KA431 shown) is broken, as shown in
Figure 23, there is no current flowing through the optocoupler transistor, which pulls up the feedback voltage
to 5.2V.
VDD
17.5V
When the feedback voltage is above 4.6V longer than
780ms, OLP is triggered. This protection is also
triggered when the SMPS output drops below the
nominal value longer than 780ms due to the overload
condition.
9.5V
Operating Current
3mA
8uA
Normal
Operation
Fault
Situation
Normal
Operation
Figure 21. Auto Restart Operation
Two-Level Over-Current Protection (OCP)
FAN6861 has two levels of over-current protection
thresholds. One is for pulse-by-pulse current limit,
which turns off MOSFET for the remainder of the
switching cycle when the sensing voltage of MOSFET
drain current reaches the threshold. The other threshold
is for the over-current protection, which shuts down the
MOSFET gate when the sensing voltage of MOSFET
drain current is above the threshold longer than the
shutdown delay time (780ms).
VFB
5.2V
VFB-OLP (4.6V)
This two-level OCP protection is designed for
applications with peak load characteristics, such as
printers and scanners.
OLP Shutdown Delay Time
These applications have motor load and inherently
impose over-load condition on the power supply during
© 2009 Fairchild Semiconductor Corporation
FAN6861 • Rev. 1.0.1
FAN6861 — Low-Cost, Highly Integrated, Green-Mode PWM Controller for Peak Power Management
acceleration mode. Therefore, the protection circuit
should be triggered after a specified time to determine
whether it is a transient situation or an abnormal
situation.
Protections
OLP Triggers
Figure 23. OLP Operation
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11
Leading-Edge Blanking (LEB)
VDD over-voltage protection prevents IC damage caused
by over voltage on the VDD pin. The OVP is triggered
when VDD voltage reaches 25V. It has a debounce time
(typically 250µs) to prevent false trigger by switching
noise.
Each time the power MOSFET is switched on, a turn-on
spike occurs across the sense-resistor caused by
primary-side capacitance and secondary-side rectifier
reverse recovery. To avoid premature termination of the
switching pulse, a leading-edge blanking time is built in.
During this blanking period (360ns), the PWM
comparator is disabled and cannot switch off the gate
driver. Thus, RC filter with a small RC time constant is
enough for current sensing.
Over-Temperature Protection (OTP)
The OTP circuit is composed of current source and
voltage comparators. Typically NTC thermistor is
connected between the RT pin and the GND pin. Once
the voltage of this pin drops below a threshold of 0.7V,
PWM output is disabled. Another comparator with 1V
threshold is used to introduce hysteresis of OTP.
Constant Output Power Limit
FAN6861 has saw-limiter for pulse-by-pulse current
limit, which guarantees almost constant power limit over
different line voltages of universal input range.
The conventional pulse-by-pulse current limiting
scheme has a constant threshold for current limit
comparator, which results in higher power limit for high
line voltage. FAN6861 has a sawtooth current limit
threshold that increases progressively within a switching
cycle, which provides lower current limit for high line
and makes the actual power limit level almost constant
over different line voltages of universal input range, as
shown in Figure 24.
Figure 25. Current Sense R-C Filter
Soft-Start
The FAN6861 has an internal soft-start circuit that
increases pulse-by-pulse current-limit comparator
inverting input voltage slowly after it starts. The typical
soft-start time is 10ms. The pulsewidth to the power
MOSFET is progressively increased to establish the
correct working conditions for transformers, rectifier
diodes, and capacitors. The voltage on the output
capacitors is progressively increased with the intention
of smoothly establishing the required output voltage. It
also helps to prevent transformer saturation and reduce
the stress on the secondary diode during startup.
Figure 24. Sawtooth Current Limiter
© 2009 Fairchild Semiconductor Corporation
FAN6861 • Rev. 1.0.1
FAN6861 — Low-Cost, Highly Integrated, Green-Mode PWM Controller for Peak Power Management
VDD Over-Voltage Protection (OVP)
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12
Application
Fairchild Devices
Input Voltage Range
SMPS for Printer
FAN6861
90~264VAC
Figure 26.
Output
32V/0.6254A Nominal (20W)
32V/1.56A Peak (50W)
Schematic of Application Circuit
Transformer
ƒ
ƒ
Core: EF-25/13/11
Primary-Side Inductance: 500µH
Figure 27.
© 2009 Fairchild Semiconductor Corporation
FAN6861 • Rev. 1.0.1
Transformer Structure
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FAN6861 — Highly Integrated Green-Mode PWM Controller
Typical Application Circuit (Flyback Converter for Printer Application)
FAN6861 — Low-Cost, Highly Integrated, Green-Mode PWM Controller for Peak Power Management
Physical Dimensions
Figure 28. 6-Pin SSOT-6 Package
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2009 Fairchild Semiconductor Corporation
FAN6861 • Rev. 1.0.1
www.fairchildsemi.com
14
FAN6861 — Low-Cost, Highly Integrated, Green-Mode PWM Controller for Peak Power Management
15
www.fairchildsemi.com
© 2009 Fairchild Semiconductor Corporation
FAN6861 • Rev. 1.0.1