IDT IDT54FCT521CTL Fast cmos 8-bit identity comparator Datasheet

IDT54/74FCT521T
IDT54/74FCT521AT
IDT54/74FCT521BT
IDT54/74FCT521CT
FAST CMOS 8-BIT
IDENTITY COMPARATOR
Integrated Device Technology, Inc.
FEATURES:
DESCRIPTION:
•
•
•
•
The IDT54/74FCT521T/AT/BT/CT are 8-bit identity comparators built using an advanced dual metal CMOS technology. These devices compare two words of up to eight bits each
and provide a LOW output when the two words match bit for
bit. The expansion input IA = B also serves as an active LOW
enable input.
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATIONS
A0
B0
1
20
VCC
A0
2
3
19
OA=B
18
B7
17
A7
16
B6
15
14
A6
B5
B0
A1
A1
B1
A2
B2
A3
B3
4
P20-1
D20-1
SO20-2
SO20-7
SO20-8
&
E20-1
B1
A2
5
B2
A3
7
13
A5
B3
GND
9
12
B4
10
11
A4
6
8
OA=B
2572 drw 02
DIP/SOIC/SSOP/QSOP/CERPACK
TOP VIEW
A5
B5
INDEX
A6
B6
3 2
A7
B7
IA=B
2572 drw 01
A1
4
B1
5
A2
6
B2
A3
7
1
OA=B
A4
B4
IA=B
I A=B
VCC
•
A0
•
B0
•
•
•
Std., A, B and C speed grades
Low input and output leakage ≤1µA (max.)
CMOS power levels
True TTL input and output compatibility
– VOH = 3.3V (typ.)
– VOL = 0.3V (typ.)
High drive outputs (-15mA IOH, 48mA IOL)
Meets or exceeds JEDEC standard 18 specifications
Product available in Radiation Tolerant and Radiation
Enhanced versions
Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
Available in DIP, SOIC, SSOP, QSOP, CERPACK and
LCC packages
20 19
18
L20-2
8
17
B7
A7
16
B6
15
A6
14
B5
A5
B4
B3
GND
A4
9 10 11 12 13
2572 drw 03
LCC
TOP VIEW
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
1995 Integrated Device Technology, Inc.
6.16
APRIL 1995
DSC-4210/4
1
IDT54/74FCT521T/AT/BT/CT
FAST CMOS 8-BIT IDENTITY COMPARATOR
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ABSOLUTE MAXIMUM RATINGS(1)
PIN DESCRIPTION
Pin Names
Description
A0 - A 7
Word A Inputs
B0 - B 7
Word B Inputs
IA
OA
=B
Expansion or Enable Input (Active LOW)
=B
Identity Output (Active LOW)
Symbol
Rating
Commercial
VTERM(2) Terminal Voltage
–0.5 to +7.0
with Respect to
GND
VTERM(3) Terminal Voltage
–0.5 to
with Respect to
VCC +0.5
GND
TA
Operating
0 to +70
Temperature
TBIAS
Temperature
–55 to +125
Under Bias
TSTG
Storage
–55 to +125
Temperature
PT
Power Dissipation
0.5
2572 tbl 01
FUNCTION TABLE(1)
Inputs
Output
IA=B
A, B
OA=B
L
L
H
H
A = B*
A≠B
A = B*
A≠B
L
H
H
H
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
*A0 = B0, A1 = B1, A2 = B2, etc.
I OUT
2572 tbl 02
Conditions
VIN = 0V
Typ.
6
VOUT = 0V
8
Max. Unit
10
pF
12
–60 to +120
Unit
V
–0.5 to
VCC +0.5
V
–55 to +125
°C
–65 to +135
°C
–65 to +150
°C
0.5
W
–60 to +120
mA
2572 lnk 03
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability. No terminal voltage may exceed
VCC by +0.5V unless otherwise noted.
2. Input and VCC terminals only.
3. Outputs and I/O terminals only.
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol
Parameter(1)
CIN
Input
Capacitance
COUT
Output
Capacitance
DC Output
Current
Military
–0.5 to +7.0
pF
2572 lnk 04
NOTE:
1. This parameter is measured at characterization but not tested.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol
Test Conditions(1)
Parameter
Min.
Typ.(2)
Max.
Unit
VIH
Input HIGH Level
Guaranteed Logic HIGH Level
2.0
—
—
V
VIL
Input LOW Level
Guaranteed Logic LOW Level
—
—
0.8
V
II H
Input HIGH
Current (4)
VCC = Max.
VI = 2.7V
—
—
±1
µA
II L
Input LOW Current (4)
VCC = Max.
VI = 0.5V
—
—
±1
µA
—
—
±1
µA
Current (4)
II
Input HIGH
VIK
Clamp Diode Voltage
VCC = Min., IN = –18mA
IOS
Short Circuit Current
VCC = Max.(3) , VO = GND
VOH
Output HIGH Voltage
VCC = Min.
VIN = VIH or VIL
VOL
Output LOW Voltage
VH
Input Hysteresis
ICC
Quiescent Power Supply Current
VCC = Max., VI = VCC (Max.)
IOH = –6mA MIL.
IOH = –8mA COM'L.
IOH = –12mA MIL.
IOH = –15mA COM'L.
IOL = 32mA MIL.
IOL = 48mA COM'L.
VCC = Min.
VIN = VIH or VIL
—
VCC = Max.
VIN = GND or VCC
—
–0.7
–1.2
V
–60
–120
–225
mA
2.4
3.3
—
V
2.0
3.0
—
V
—
0.3
0.5
V
—
200
—
mV
—
0.01
1
mA
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. The test limit for this parameter is ±5µA at TA = -55°C.
6.16
2572 tbl 05
2
IDT54/74FCT521T/AT/BT/CT
FAST CMOS 8-BIT IDENTITY COMPARATOR
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Test Conditions(1)
Symbol
Parameter
∆ICC
ICCD
Quiescent Power Supply
Current TTL
Inputs HIGH
Dynamic Power Supply Current (4)
IC
Total Power Supply Current (5)
Min.
Typ.(2)
Max.
Unit
—
0.5
2.0
mA
VIN = VCC
VIN = GND
—
0.15
0.25
mA/
MHz
VIN
VIN
VIN
VIN
—
1.5
3.5
mA
—
1.8
4.5
VCC = Max.
VIN = 3.4V(3)
VCC = Max.
Outputs Open
One Input Toggling
50% Duty Cycle
VCC = Max.
Outputs Open
fi = 10MHz
One Bit Toggling
50% Duty Cycle
= VCC
= GND
= 3.4V
= GND
2572 tbl 06
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fiNi)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Input Frequency
Ni = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
Symbol
tPLH
tPHL
tPLH
tPHL
Parameter
Propagation
Delay
An or Bn to
OA = B
Propagation
Delay
IA = B to
OA = B
Condition(1)
CL = 50pF
RL = 500Ω
IDT54/74FCT521T
IDT54/74FCT521AT
IDT54/74FCT521BT
IDT54/74FCT521CT
Com'l.
Com'l.
Com'l.
Com'l.
Mil.
Mil.
Mil.
Mil.
Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max.
Unit
1.5 11.0 1.5 15.0 1.5
7.2
1.5
9.5
1.5
5.5
1.5
7.3
1.5
4.5
1.5
5.1
ns
1.5 10.0 1.5
6.0
1.5
7.8
1.5
4.6
1.5
6.0
1.5
4.1
1.5
4.5
ns
9.0
1.5
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
2572 tbl 07
6.16
3
IDT54/74FCT521T/AT/BT/CT
FAST CMOS 8-BIT IDENTITY COMPARATOR
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
SWITCH POSITION
TEST CIRCUITS FOR ALL OUTPUTS
V CC
7.0V
500Ω
VIN
Open Drain
Disable Low
Closed
Open
All Other Tests
2572 lnk 08
DEFINITIONS:
CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
D.U.T.
50pF
RT
Switch
Enable Low
V OUT
Pulse
Generator
Test
500Ω
CL
2572 drw 04
SET-UP, HOLD AND RELEASE TIMES
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
tH
tSU
tREM
tSU
PULSE WIDTH
3V
1.5V
0V
3V
1.5V
0V
LOW-HIGH-LOW
PULSE
1.5V
tW
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
2572 drw 06
3V
1.5V
0V
tH
2572 drw 05
PROPAGATION DELAY
ENABLE AND DISABLE TIMES
ENABLE
SAME PHASE
INPUT TRANSITION
tPLH
tPHL
OUTPUT
tPLH
OPPOSITE PHASE
INPUT TRANSITION
tPHL
3V
1.5V
0V
DISABLE
3V
CONTROL
INPUT
1.5V
tPZL
VOH
1.5V
VOL
OUTPUT
NORMALLY
LOW
3V
1.5V
0V
SWITCH
CLOSED
3.5V
1.5V
tPZH
OUTPUT
NORMALLY
HIGH
2572 drw 07
SWITCH
OPEN
0V
tPLZ
3.5V
0.3V
VOL
tPHZ
0.3V
1.5V
0V
VOH
0V
2572 drw 08
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control DisableHIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
6.16
4
IDT54/74FCT521T/AT/BT/CT
FAST CMOS 8-BIT IDENTITY COMPARATOR
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT
XX
Temp. Range
FCT
X
Family
XXXX
X
X
Device Type
Package
Process
Blank
B
Commercial
MIL-STD-883, Class B
P
D
E
L
SO
P
Q
Plastic DIP
CERDIP
CERPACK
Leadless Chip Carrier
Small Outline IC
Shrink Small Outline Package
Quarter-size Small Outline Package
521T
521AT
521BT
521CT
8-Bit Comparator
Blank
High Drive
54
74
–55°C to +125°C
0°C to +70°C
2572 drw 09
6.16
5
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