AD AD8021 Low power, 1 nv/â hz, g â ¥ 10 stable, rail-to-rail output amplifier Datasheet

Low Power, 1 nV/√Hz, G ≥ 10 Stable,
Rail-to-Rail Output Amplifier
ADA4895-2
Data Sheet
FUNCTIONAL BLOCK DIAGRAM
Low wideband noise
1 nV/√Hz
2.6 pA/√Hz
Low 1/f noise: 2 nV/√Hz at 10 Hz
Low distortion (SFDR): −96 dBc at 100 kHz, VOUT = 2 V p-p
Low power: 3 mA per amplifier
Low input offset voltage: 350 µV maximum
High speed
236 MHz, −3 dB bandwidth (G = +10)
943 V/µs slew rate
22 ns settling time to 0.1%
Rail-to-rail output
Wide supply range: 3 V to 10 V
Disable feature
OUT1 1
10
+VS
–IN1 2
9
OUT2
+IN1 3
8
–IN2
–VS 4
7
+IN2
6
DISABLE2
ADA4895-2
DISABLE1 5
10186-001
FEATURES
APPLICATIONS
Low noise preamplifier
Ultrasound amplifiers
PLL loop filters
High performance ADC drivers
DAC buffers
5
40
4
32
3
24
2
16
VOLTAGE
8
1
INPUT CURRENT NOISE (pA/√Hz)
INPUT VOLTAGE NOISE (nV/√Hz)
Figure 1. 10-Lead MSOP
0
1
10
100
1k
10k
100k
0
1M
FREQUENCY (Hz)
10186-002
CURRENT
Figure 2. Input Voltage and Current Noise vs. Frequency
GENERAL DESCRIPTION
The ADA4895-2 is a dual, high speed voltage feedback amplifier
that is gain ≥ 10 stable with low input noise, rail-to-rail output,
and quiescent current of 3 mA per amplifier. With a 1/f noise of
2 nV/√Hz at 10 Hz and a spurious-free dynamic range of −72 dBc
at 2 MHz, the ADA4895-2 is an ideal solution in a variety of
applications, including ultrasound, low noise preamplifiers, and
drivers of high performance ADCs. The Analog Devices, Inc.,
proprietary next generation SiGe bipolar process and innovative
architecture enable this high performance amplifier.
The ADA4895-2 has a large signal bandwidth of 146 MHz at a gain
of +10 with a slew rate of 943 V/µs, and settles to 0.1% in 22 ns.
The wide supply voltage range (3 V to 10 V) of the ADA4895-2
makes this amplifier an ideal candidate for systems that require
high dynamic range, high gain, precision, and high speed.
The ADA4895-2 is available in a 10-lead MSOP package and
operates over the extended industrial temperature range of
−40°C to +125°C.
Rev. 0
Table 1. Other Low Noise Amplifiers1
Part No.
AD8021
AD8045
AD8099
ADA4841-1/
ADA4841-2
ADA4896-2
ADA4897-1/
ADA4897-2
ADA4898-1/
ADA4898-2
ADA4899-1
1
VN @ 1 kHz
(nV/√Hz)
4.2
6
7
2.2
VN @ 100 kHz
(nV/√Hz)
2.1
3
0.95
2.1
BW (MHz)
490
1000
510
80
Supply
Voltage (V)
5 to 24
3.3 to 12
5 to 12
2.7 to 12
1
1
1
1
230
230
3 to 10
3 to 10
0.9
0.9
65
10 to 32
1.4
1
600
5 to 12
See www.analog.com for the latest selection of low noise amplifiers.
COMPANION PRODUCTS
ADCs: AD7944 (14-bit), AD7985 (16-bit), AD7986 (18-bit)
Additional companion products on the ADA4895-2 product page
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Tel: 781.329.4700
©2012 Analog Devices, Inc. All rights reserved.
Technical Support
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ADA4895-2
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ........................................... 11
Applications ....................................................................................... 1
Theory of Operation ...................................................................... 17
General Description ......................................................................... 1
Amplifier Description................................................................ 17
Functional Block Diagram .............................................................. 1
Input Protection ......................................................................... 17
Companion Products ....................................................................... 1
Disable Operation ...................................................................... 17
Revision History ............................................................................... 2
DC Errors .................................................................................... 18
Specifications..................................................................................... 3
Bias Current Cancellation ......................................................... 18
±5 V (or +10 V) Supply ............................................................... 3
Noise Considerations ................................................................. 19
±2.5 V (or +5 V) Supply .............................................................. 5
Applications Information .............................................................. 20
±1.5 V (or +3 V) Supply .............................................................. 7
Using the ADA4895-2 at a Gain < +10.................................... 20
Absolute Maximum Ratings ............................................................ 9
High Gain Bandwidth Application .......................................... 21
Thermal Resistance ...................................................................... 9
Wideband Photomultiplier Preamplifier ................................ 22
Maximum Power Dissipation ..................................................... 9
Layout Considerations ............................................................... 23
ESD Caution .................................................................................. 9
Outline Dimensions ....................................................................... 24
Pin Configuration and Function Descriptions ........................... 10
Ordering Guide .......................................................................... 24
REVISION HISTORY
9/12—Revision 0: Initial Version
Rev. 0 | Page 2 of 24
Data Sheet
ADA4895-2
SPECIFICATIONS
±5 V (OR +10 V) SUPPLY
TA = 25°C, G = +10, RF = 249 Ω, RL = 1 kΩ to midsupply, unless otherwise noted.
Table 2.
Parameter
DYNAMIC PERFORMANCE
−3 dB Bandwidth
Bandwidth for 0.1 dB Flatness
Slew Rate
Settling Time to 0.1%
NOISE/HARMONIC PERFORMANCE
Harmonic Distortion (SFDR)
Input Voltage Noise
Input Current Noise
0.1 Hz to 10 Hz Noise
DC PERFORMANCE
Input Offset Voltage
Input Offset Voltage Drift
Input Bias Current
Input Bias Current Drift
Input Bias Offset Current
Open-Loop Gain
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
Input Common-Mode Voltage Range
Common-Mode Rejection
OUTPUT CHARACTERISTICS
Output Overdrive Recovery Time
Positive Output Voltage Swing
Negative Output Voltage Swing
Linear Output Current
Short-Circuit Current
Capacitive Load Drive
POWER SUPPLY
Operating Range
Quiescent Current per Amplifier
Positive Power Supply Rejection
Negative Power Supply Rejection
Test Conditions/Comments
Min
Typ
Max
Unit
VOUT = 0.2 V p-p
VOUT = 2 V p-p
VOUT = 0.2 V p-p, G = +20, RF = 1 kΩ
VOUT = 2 V p-p, RL = 100 Ω
VOUT = 6 V step
VOUT = 2 V step
236
146
115
8.9
943
22
MHz
MHz
MHz
MHz
V/µs
ns
fC = 100 kHz, VOUT = 2 V p-p
fC = 1 MHz, VOUT = 2 V p-p
fC = 2 MHz, VOUT = 2 V p-p
fC = 5 MHz, VOUT = 2 V p-p
f = 10 Hz, G = +25.9
f = 100 kHz, G = +25.9
f = 10 Hz
f = 100 kHz
G = +101, RF = 1 kΩ, RG = 10 Ω
−96
−78
−72
−64
2
1
14
2.6
99
dBc
dBc
dBc
dBc
nV/√Hz
nV/√Hz
pA/√Hz
pA/√Hz
nV p-p
−350
−0.6
100
+53
0.15
−11
1.2
−0.02
110
−92
10 M/10 k
3/11
−4.9 to +4.1
−109
Ω
pF
V
dB
80
4.96
4.77
−4.97
−4.85
72
116/108
6
ns
V
V
V
V
mA rms
mA
pF
−16
VOUT = −4 V to +4 V
Common mode/differential
Common mode/differential
VCM = −2 V to +2 V
VIN = −0.55 V to +0.55 V
RL = 1 kΩ
RL = 100 Ω
RL = 1 kΩ
RL = 100 Ω
SFDR = −45 dBc
Sinking/sourcing
30% overshoot
4.85
4.5
−4.85
−4.5
2.8
DISABLEx = −5 V
+VS = 4 V to 6 V, −VS = −5 V
+VS = 5 V, −VS = −4 V to −6 V
Rev. 0 | Page 3 of 24
−96
−96
3 to 10
3
0.1
−136
−135
+350
−6
+0.6
3.2
µV
µV/°C
µA
nA/°C
µA
dB
V
mA
mA
dB
dB
ADA4895-2
Parameter
DISABLEx PIN
DISABLEx Voltage
Input Current per Amplifier
Part Enabled
Part Disabled
Switching Speed
Part Enabled
Part Disabled
Data Sheet
Test Conditions/Comments
Min
Typ
Max
Unit
Part enabled
Part disabled
>+VS − 0.5
<+VS − 2
V
V
DISABLEx = +5 V
DISABLEx = −5 V
−1.1
−40
µA
µA
0.25
6
µs
µs
Rev. 0 | Page 4 of 24
Data Sheet
ADA4895-2
±2.5 V (OR +5 V) SUPPLY
TA = 25°C, G = +10, RF = 249 Ω, RL = 1 kΩ to midsupply, unless otherwise noted.
Table 3.
Parameter
DYNAMIC PERFORMANCE
−3 dB Bandwidth
Bandwidth for 0.1 dB Flatness
Slew Rate
Settling Time to 0.1%
NOISE/HARMONIC PERFORMANCE
Harmonic Distortion (SFDR)
Input Voltage Noise
Input Current Noise
0.1 Hz to 10 Hz Noise
DC PERFORMANCE
Input Offset Voltage
Input Offset Voltage Drift
Input Bias Current
Input Bias Current Drift
Input Bias Offset Current
Open-Loop Gain
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
Input Common-Mode Voltage Range
Common-Mode Rejection
OUTPUT CHARACTERISTICS
Output Overdrive Recovery Time
Positive Output Voltage Swing
Negative Output Voltage Swing
Linear Output Current
Short-Circuit Current
Capacitive Load Drive
POWER SUPPLY
Operating Range
Quiescent Current per Amplifier
Positive Power Supply Rejection
Negative Power Supply Rejection
Test Conditions/Comments
Min
Typ
Max
Unit
VOUT = 0.2 V p-p
VOUT = 2 V p-p
VOUT = 0.2 V p-p, G = +20, RF = 1 kΩ
VOUT = 2 V p-p, RL = 100 Ω
VOUT = 3 V step
VOUT = 2 V step
216
131
113
7.9
706
21
MHz
MHz
MHz
MHz
V/µs
ns
fC = 100 kHz, VOUT = 2 V p-p
fC = 1 MHz, VOUT = 2 V p-p
fC = 2 MHz, VOUT = 2 V p-p
fC = 5 MHz, VOUT = 2 V p-p
f = 10 Hz, G = +25.9
f = 100 kHz, G = +25.9
f = 10 Hz
f = 100 kHz
G = +101, RF = 1 kΩ, RG = 10 Ω
−94
−75
−69
−61
1.8
1
14
2.7
99
dBc
dBc
dBc
dBc
nV/√Hz
nV/√Hz
pA/√Hz
pA/√Hz
nV p-p
−350
−0.6
97
+53
0.15
−11
1.2
−0.02
108
−91
10 M/10 k
3/11
−2.4 to +1.6
−110
Ω
pF
V
dB
90
2.48
2.38
−2.48
−2.38
60
113/95
6
ns
V
V
V
V
mA rms
mA
pF
−16
VOUT = −2 V to +2 V
Common mode/differential
Common mode/differential
VCM = −1.5 V to +1.5 V
VIN = −0.275 V to +0.275 V
RL = 1 kΩ
RL = 100 Ω
RL = 1 kΩ
RL = 100 Ω
SFDR = −45 dBc
Sinking/sourcing
30% overshoot
2.35
2.3
−2.35
−2.3
2.6
DISABLEx = −2.5 V
+VS = 2 V to 3 V, −VS = −2.5 V
+VS = 2.5 V, −VS = −3 V to −2 V
Rev. 0 | Page 5 of 24
−96
−96
3 to 10
2.8
0.05
−137
−141
+350
−6
+0.6
3
µV
µV/°C
µA
nA/°C
µA
dB
V
mA
mA
dB
dB
ADA4895-2
Parameter
DISABLEx PIN
DISABLEx Voltage
Input Current per Amplifier
Part Enabled
Part Disabled
Switching Speed
Part Enabled
Part Disabled
Data Sheet
Test Conditions/Comments
Min
Typ
Max
Unit
Part enabled
Part disabled
>+VS − 0.5
<+VS − 2
V
V
DISABLEx = +2.5 V
DISABLEx = −2.5 V
−1.1
−20
µA
µA
0.25
6
µs
µs
Rev. 0 | Page 6 of 24
Data Sheet
ADA4895-2
±1.5 V (OR +3 V) SUPPLY
TA = 25°C, G = +10, RF = 249 Ω, RL = 1 kΩ to midsupply, unless otherwise noted.
Table 4.
Parameter
DYNAMIC PERFORMANCE
−3 dB Bandwidth
Bandwidth for 0.1 dB Flatness
Slew Rate
Settling Time to 0.1%
NOISE/HARMONIC PERFORMANCE
Harmonic Distortion (SFDR)
Input Voltage Noise
Input Current Noise
0.1 Hz to 10 Hz Noise
DC PERFORMANCE
Input Offset Voltage
Input Offset Voltage Drift
Input Bias Current
Input Bias Current Drift
Input Bias Offset Current
Open-Loop Gain
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
Input Common-Mode Voltage Range
Common-Mode Rejection
OUTPUT CHARACTERISTICS
Output Overdrive Recovery Time
Positive Output Voltage Swing
Negative Output Voltage Swing
Linear Output Current
Short-Circuit Current
Capacitive Load Drive
POWER SUPPLY
Operating Range
Quiescent Current per Amplifier
Positive Power Supply Rejection
Negative Power Supply Rejection
Test Conditions/Comments
Min
Typ
Max
Unit
VOUT = 0.2 V p-p
VOUT = 1 V p-p
VOUT = 0.2 V p-p, G = +20, RF = 1 kΩ
VOUT = 2 V p-p, RL = 100 Ω
VOUT = 1 V step
VOUT = 2 V step
205
131
111
7.5
384
20
MHz
MHz
MHz
MHz
V/µs
ns
fC = 100 kHz, VOUT = 2 V p-p
fC = 1 MHz, VOUT = 2 V p-p
fC = 2 MHz, VOUT = 2 V p-p
fC = 5 MHz, VOUT = 2 V p-p
f = 10 Hz, G = +25.9
f = 100 kHz, G = +25.9
f = 10 Hz
f = 100 kHz
G = +101, RF = 1 kΩ, RG = 10 Ω
−92
−73
−67
−59
1.9
1
14
2.7
99
dBc
dBc
dBc
dBc
nV/√Hz
nV/√Hz
pA/√Hz
pA/√Hz
nV p-p
−350
−0.6
95
+55
0.15
−11
1.2
−0.02
106
−90
10 M/10 k
3/11
−1.4 to +0.6
−110
Ω
pF
V
dB
80
1.48
1.43
−1.49
−1.45
43
102/80
6
ns
V
V
V
V
mA rms
mA
pF
−16
VOUT = −1 V to +1 V
Common mode/differential
Common mode/differential
VCM = −0.4 V to +0.4 V
VIN = −0.165 V to +0.165 V
RL = 1 kΩ
RL = 100 Ω
RL = 1 kΩ
RL = 100 Ω
SFDR = −45 dBc
Sinking/sourcing
30% overshoot
1.35
1.3
−1.35
−1.3
2.5
DISABLEx = −1.5 V
+VS = 1.2 V to 2.2 V, −VS = −1.5 V
+VS = 1.5 V, −VS = −2.2 V to −1.2 V
Rev. 0 | Page 7 of 24
−96
−96
3 to 10
2.7
0.03
−133
−146
+350
−6
+0.6
2.9
µV
µV/°C
µA
nA/°C
µA
dB
V
mA
mA
dB
dB
ADA4895-2
Parameter
DISABLEx PIN
DISABLEx Voltage
Input Current per Amplifier
Part Enabled
Part Disabled
Switching Speed
Part Enabled
Part Disabled
Data Sheet
Test Conditions/Comments
Min
Typ
Max
Unit
Part enabled
Part disabled
>+VS − 0.5
<+VS − 2
V
V
DISABLEx = +1.5 V
DISABLEx = −1.5 V
−1.2
−10
µA
µA
0.25
6
µs
µs
Rev. 0 | Page 8 of 24
Data Sheet
ADA4895-2
ABSOLUTE MAXIMUM RATINGS
Rating
11 V
See Figure 3
−VS − 0.7 V to +VS + 0.7 V
±0.7 V
−65°C to +125°C
−40°C to +125°C
300°C
150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
If the rms signal levels are indeterminate, consider the worst case,
when VOUT = VS/4 with RL referenced to midsupply.
PD = (VS × I S ) +
RL
1.0
TJ = 150°C
0.9
Table 6. Thermal Resistance
Unit
°C/W
0.8
0.7
ADA4895-2
10-LEAD MSOP
0.6
0.5
0.4
0.3
0.2
0.1
0
MAXIMUM POWER DISSIPATION
–40 –30 –20 –10
The maximum safe power dissipation for the ADA4895-2 is
limited by the associated rise in junction temperature (TJ) on
the die. At approximately 150°C, which is the glass transition
temperature, the properties of the plastic change. Even temporarily exceeding this temperature limit can change the stresses
that the package exerts on the die, permanently shifting the
parametric performance of the ADA4895-2. Exceeding a junction
temperature of 175°C for an extended period of time can result
in changes in silicon devices, potentially causing degradation or
loss of functionality.
0
10
20
30
40
50
60
70
80
AMBIENT TEMPERATURE (°C)
90 100 110 120
Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
ESD CAUTION
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
die due to the ADA4895-2 drive at the output.
PD = Quiescent Power + (Total Drive Power − Load Power)
The quiescent power dissipation is the voltage between the supply
pins (±VS) multiplied by the quiescent current (IS).
V
V
PD = (VS × I S ) +  S × OUT
RL
 2
2
Figure 3 shows the maximum safe power dissipation in the
package vs. the ambient temperature on a JEDEC standard,
4-layer board. θJA values are approximations.
θJA is specified for the worst-case conditions, that is, θJA is
specified for a device soldered in a circuit board for surfacemount packages. Table 6 lists the θJA for the ADA4895-2.
θJA
210
S
Airflow increases heat dissipation, effectively reducing θJA. Also,
more metal directly in contact with the package leads reduces θJA.
THERMAL RESISTANCE
Package Type
10-Lead Dual MSOP
(V / 4 )
10186-003
Parameter
Supply Voltage
Power Dissipation
Common-Mode Input Voltage
Differential Input Voltage
Storage Temperature Range
Operating Temperature Range
Lead Temperature (Soldering 10 sec)
Junction Temperature
RMS output voltages should be considered. If RL is referenced
to −VS, as in single-supply operation, the total drive power is
VS × IOUT. In single-supply operation with RL referenced to −VS,
the worst case is VOUT = VS/2.
MAXIMUM POWER DISSIPATION (W)
Table 5.
 VOUT 2
 −

RL

Rev. 0 | Page 9 of 24
ADA4895-2
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
OUT1 1
9
OUT2
+IN1 3
8
–IN2
–VS 4
DISABLE1 5
ADA4895-2
7
+IN2
6
DISABLE2
Figure 4. Pin Configuration
Table 7. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
Mnemonic
OUT1
−IN1
+IN1
−VS
DISABLE1
DISABLE2
+IN2
−IN2
OUT2
+VS
Description
Output 1.
Inverting Input 1.
Noninverting Input 1.
Negative Supply.
Disable 1.
Disable 2.
Noninverting Input 2.
Inverting Input 2.
Output 2.
Positive Supply.
Rev. 0 | Page 10 of 24
10186-004
10 +VS
–IN1 2
Data Sheet
ADA4895-2
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, VS = ±2.5 V, G = +10, RF = 249 Ω, RL = 1 kΩ to midsupply, unless otherwise noted.
2
VS = ±5.0V
1
0
–1
–2
–3
–4
VOUT = 200mV p-p
0.1
1
10
100
1000
FREQUENCY (MHz)
1
0
–1
VS = ±5.0V
–2
–3
–4
VOUT = 2V p-p
–5
0.1
1
10186-006
Figure 5. Small Signal Frequency Response vs. Supply Voltage
NORMALIZED CLOSED-LOOP GAIN (dB)
6
4
G = +10
2
G = –20
0
–2
–4
–6
RF = 1kΩ
VOUT = 200mV p-p
–10
0.1
1
10
100
1000
FREQUENCY (MHz)
G = +10
2
1
G = –10
0
–1
–2
G = –20
–3
–4
RF = 1kΩ
VOUT = 2V p-p
–5
0.1
10186-005
NORMALIZED CLOSED-LOOP GAIN (dB)
1000
3
G = –10
10
100
1000
Figure 9. Large Signal Frequency Response vs. Gain
3
4
NORMALIZED CLOSED-LOOP GAIN (dB)
–40°C
3
+25°C
2
+125°C
1
0
–1
–2
–3
10
100
1000
FREQUENCY (MHz)
10186-007
–4
VOUT = 200mV p-p
–5
0.1
1
1
FREQUENCY (MHz)
Figure 6. Small Signal Frequency Response vs. Gain
NORMALIZED CLOSED-LOOP GAIN (dB)
100
Figure 8. Large Signal Frequency Response vs. Supply Voltage
8
–8
10
FREQUENCY (MHz)
10186-009
–5
VS = ±1.5V
VS = ±2.5V
Figure 7. Small Signal Frequency Response vs. Temperature
VOUT = 100mV p-p
2
VOUT = 400mV p-p
1
0
–1
VOUT = 2V p-p
–2
–3
VOUT = 1V p-p
–4
–5
0.1
1
10
100
1000
FREQUENCY (MHz)
Figure 10. Frequency Response for Various Output Voltages
Rev. 0 | Page 11 of 24
10186-008
NORMALIZED CLOSED-LOOP GAIN (dB)
2
NORMALIZED CLOSED-LOOP GAIN (dB)
VS = ±1.5V
VS = ±2.5V
10186-010
3
ADA4895-2
Data Sheet
120
0
110
–20
4
CL = 0pF
GAIN (dB)
0
–60
–80
80
–2
PHASE
70
–100
60
–120
50
–140
40
–160
30
–180
20
–200
10
–220
–4
–6
–8
10
100
1000
FREQUENCY (MHz)
100k
1M
10M
100M
1G
FREQUENCY (Hz)
Figure 14. Open-Loop Gain and Phase vs. Frequency
–40
VOUT = 2V p-p
VOUT = 2V p-p
–50
–50
HD2, RL = 100Ω
–60
–60
DISTORTION (dBc)
HD2, RL = 1kΩ
–70
–80
HD3, RL = 1kΩ
–90
HD3, RL = 100Ω
–100
–70
–80
HD2
VS = ±5V
VS = ±2.5V
VS = ±1.5V
–90
HD3
–100
VS = ±5V
VS = ±2.5V
VS = ±1.5V
–110
–110
–120
1
10
FREQUENCY (MHz)
–130
0.1
10186-012
–120
0.1
1
10
FREQUENCY (MHz)
Figure 12. Harmonic Distortion vs. Frequency for Various Loads
Figure 15. Harmonic Distortion vs. Frequency for Various Supplies
–20
VOUT = 2V p-p
G = +20
VS = ±5.0V
RG = 27.4Ω
8V p-p
4V p-p
–40
–40
RL = 100Ω
HD2
DISTORTION (dBc)
–20
10k
RL = 1kΩ
–60
–80
HD3
–60
2V p-p
HD2
HD3
–80
8V p-p
–100
4V p-p
RL = 100Ω
–100
10186-016
–40
–240
0
1k
Figure 11. Small Signal Frequency Response vs. Capacitive Load
–120
2V p-p
RL = 1kΩ
1
FREQUENCY (MHz)
Figure 13. Harmonic Distortion vs. Frequency, G = +20
10
–140
0.1
10186-013
–120
0.1
1
FREQUENCY (MHz)
10
10186-015
DISTORTION (dBc)
GAIN
90
PHASE (Degrees)
CL = 3pF
2
VOUT = 200mV p-p
–10
0.1
1
DISTORTION (dBc)
–40
100
10186-011
NORMALIZED CLOSED-LOOP GAIN (dB)
CL = 6pF
10186-017
6
Figure 16. Harmonic Distortion vs. Frequency for Various Output Voltages
Rev. 0 | Page 12 of 24
Data Sheet
ADA4895-2
100
4
3
2
1
10
100
1k
10k
100k
1M
10M
100M
1
FREQUENCY (Hz)
1
0.15
0.20
0.15
OUTPUT VOLTAGE (V)
0
–0.05
100k
1M
VOUT = 200mV p-p
CL = 5.6pF
CL = 3.3pF
CL = 0pF
0.05
0
–0.05
–0.10
–0.10
–0.15
–0.15
10186-021
OUTPUT VOLTAGE (V)
0.05
–0.20
TIME (5ns/DIV)
Figure 18. Small Signal Transient Response for Various Supplies
–0.20
TIME (5ns/DIV)
Figure 21. Small Signal Transient Response for Various Capacitive Loads
1.5
AVERAGE = 154nV/°C
STANDARD DEVIATION = 184nV /°C
G = +10
9 –40°C TO +125°C
G = +20
VOUT = 2V p-p
1.0
OUTPUT VOLTAGE (V)
8
7
6
5
4
3
2
0.5
0
–0.5
–1.0
1
0
–0.4 –0.3 –0.2 –0.1
0
0.1
0.2
0.3
0.4
0.5
VDRIFT (µV/°C)
0.6
10186-020
NUMBER OF SAMPLES
10k
0.10
0.10
10
1k
Figure 20. Input Current Noise vs. Frequency
VOUT = 200mV p-p
VS = ±1.5V
VS = ±2.5V
VS = ±5.0V
100
FREQUENCY (Hz)
Figure 17. Input Voltage Noise vs. Frequency
0.20
10
10186-023
1
10
–1.5
TIME (5ns/DIV)
Figure 22. Large Signal Transient Response for Various Gains
Figure 19. Input Offset Voltage Drift Distribution
Rev. 0 | Page 13 of 24
10186-024
0
RF = 10kΩ
RG = 1.1kΩ
10186-019
5
INPUT CURRENT NOISE (pA/√Hz)
VS = ±5V
G = +25.9
RF = 249Ω
RG = 10Ω
10186-018
INPUT VOLTAGE NOISE (nV/√Hz)
6
ADA4895-2
Data Sheet
3
VOUT = 2V STEP
2
0.1
SETTLING TIME (%)
10 × VIN
1
0
–1
ERROR
0
–0.1
–3
TIME (100ns/DIV)
–0.2
TIME (10ns/DIV)
Figure 26. Settling Time to 0.1%
Figure 23. Output Overdrive Recovery Time
0
0
–10
–20
–30
–40
–50
–60
–20
CMRR (dB)
–40
–VS = –2.5V ± 1V p-p
–70
–80
–90
+VS = 2.5V ± 1V p-p
–100
–110
–120
–130
–140
–60
–80
–150
–160
0.001
0.01
0.1
1
10
100
FREQUENCY (MHz)
–120
0.001
0.01
Figure 24. PSRR vs. Frequency
800
0.1
1
10
100
FREQUENCY (MHz)
10186-030
–100
10186-031
PSRR (dB)
10186-029
–2
10186-026
INPUT AND OUTPUT VOLTAGE (V)
0.2
90ns RECOVERY TIME
VOUT
Figure 27. CMRR vs. Frequency
160
VOUT = 3V p-p
POSITIVE SLOPE
140
750
RECOVERY TIME (ns)
700
RISE
650
FALL
NEGATIVE SLOPE
100
80
60
40
600
550
–40
–20
0
20
40
60
80
TEMPERATURE (˚C)
100
120
Figure 25. Slew Rate vs. Temperature
0
0
100
200
300
400
500
600
700
800
OVERLOAD DURATION (ns)
Figure 28. Output Overload Recovery Time vs. Overload Duration
Rev. 0 | Page 14 of 24
10186-027
20
10186-028
SLEW RATE (V/µs)
120
Data Sheet
ADA4895-2
–10.8
3.2
VS = ±5.0V
VS = ±5.0V
–11.0
INPUT BIAS CURRENT (µA)
3.0
2.9
VS = ±2.5V
2.8
2.7
VS = ±1.5V
VS = ±2.5V
–11.4
VS = ±1.5V
–11.6
–11.8
2.6
–20
0
20
40
60
80
100
120
TEMPERATURE (°C)
–12.0
–40
10186-034
2.5
–40
–11.2
–20
0
20
40
60
80
100
120
TEMPERATURE (°C)
Figure 29. Supply Current vs. Temperature for Various Supplies
10186-035
SUPPLY CURRENT (mA)
3.1
Figure 32. Input Bias Current vs. Temperature for Various Supplies
0
0.05
–20
0.04
VS = ±5.0V
CROSSTALK (dB)
0.02
VS = ±1.5V
0.01
–60
–80
–100
–25
–10
5
20
35
50
65
80
95
110
125
TEMPERATURE (°C)
–120
0.01
10186-033
0
–40
–40
0.1
1
10
100
FREQUENCY (MHz)
10186-036
VOS (mV)
VS = ±2.5V
0.03
Figure 33. Crosstalk, OUT1 to OUT2
Figure 30. Input Offset Voltage vs. Temperature for Various Supplies
0
1M
–20
100k
–40
ISOLATION (dB)
10k
1k
100
10
1
–60
–80
–100
–120
–140
ENABLED
0.1
0.1
1
10
100
FREQUENCY (MHz)
1000
Figure 31. Output Impedance vs. Frequency
–180
0.01
0.1
1
10
FREQUENCY (MHz)
Figure 34. Forward Isolation vs. Frequency
Rev. 0 | Page 15 of 24
100
10186-039
0.01
0.01
–160
10186-032
OUTPUT IMPEDANCE (Ω)
DISABLED
ADA4895-2
Data Sheet
3.0
DISABLE
VOLTAGE (V)
2.0
1.5
OUTPUT
–40°C
+25°C
0.5
–40°C
1.5
+25°C
+125°C
1.0
0.5
+125°C
0
0
–0.5
TIME (1µs/DIV)
10186-038
VOLTAGE (V)
2.0
1.0
DISABLE
2.5
Figure 35. Output Turn-Off Time vs. Temperature
OUTPUT
–0.5
TIME (40ns/DIV)
Figure 36. Output Turn-On Time vs. Temperature
Rev. 0 | Page 16 of 24
10186-037
2.5
3.0
Data Sheet
ADA4895-2
THEORY OF OPERATION
The ADA4895-2 amplifier has an input noise of 1 nV/√Hz and
consumes 2.8 mA from supply voltages of 3 V to 10 V. Using the
Analog Devices XFCB3 process, the ADA4895-2 has a gain bandwidth product in excess of 1.5 GHz and is gain ≥ 10 stable, with
an input structure that results in an extremely low input 1/f noise
for a relatively high speed amplifier.
The rail-to-rail output stage is designed to drive the heavy feedback load required to achieve an overall low output referred noise.
The low input noise and high bandwidth of the ADA4895-2 are
achieved with minimal power penalty. For this reason, the maximum offset voltage of 350 µV and voltage drift of 0.15 µV/°C
make the ADA4895-2 an excellent choice, even when the low
noise performance of the amplifier is not needed.
For any gain greater than 10, the closed-loop frequency response
of a basic noninverting configuration can be approximated by
Closed-Loop −3 dB Frequency = (GBP) ×
RG
(RF + RG )
For inverting gain configurations, the source impedance must
be considered when sizing RG to maintain the minimum stable
gain. For gains lower than 10, see the Using the ADA4895-2 at a
Gain < +10 section, or use the ADA4897-2, which is a unity-gain
stable amplifier with 230 MHz bandwidth.
At differential voltages above approximately 0.7 V, the diode
clamps begin to conduct. Too much current can cause damage
due to excessive heating. If large differential voltages must be
sustained across the input terminals, it is recommended that the
current through the input clamps be limited to less than 10 mA.
Series input resistors that are sized appropriately for the expected
differential overvoltage provide the needed protection.
The ESD clamps begin to conduct at input voltages that are more
than 0.7 V above the positive supply or more than 0.7 V below
the negative supply. If an overvoltage condition is expected, it is
recommended that the fault current be limited to less than 10 mA.
DISABLE OPERATION
Figure 38 shows the ADA4895-2 power-down circuitry. If the
DISABLEx pin is left unconnected, the base of the input PNP
transistor is pulled high through the internal pull-up resistor
to the positive supply and the part is turned on. Pulling the
DISABLEx pin more than 2 V below the positive supply turns
the part off, reducing the supply current to approximately 50 µA
for a 5 V voltage supply.
+VS
IBIAS
ESD
DISABLEx
ESD
INPUT PROTECTION
TO
AMPLIFIER
BIAS
The ADA4895-2 is fully protected from ESD events and can withstand human body model ESD events of 2.5 kV and charged-device
model events of 1 kV with no measured performance degradation.
The precision input is protected with an ESD network between the
power supplies and diode clamps across the input device pair, as
shown in Figure 37.
BIAS
ESD
ESD
–VS
Figure 38. DISABLEx Circuit
The DISABLEx pin is protected by ESD clamps, as shown in
Figure 38. Voltages beyond the power supplies cause these diodes
to conduct. For protection of the DISABLEx pins, the voltage to
these pins should not exceed 0.7 V beyond the supply voltage, or
the input current should be restricted to less than 10 mA with a
series resistor.
+VS
ESD
+IN
–IN
ESD
10186-040
–VS
TO THE REST OF THE AMPLIFIER
10186-041
AMPLIFIER DESCRIPTION
Figure 37. Input Stage and Protection Diodes
Rev. 0 | Page 17 of 24
ADA4895-2
Data Sheet
DC ERRORS
The output error due to the input currents can be estimated
as follows:
Figure 39 shows a typical connection diagram and the major
dc error sources.


R 
R 
VOUTERROR = (RF|| RG ) × 1 + F  × I B − − RS × 1 + F  × I B +
RG 
RG 


RF
+ VOS –
RG
IB–
– VIP +
RS
IB+
BIAS CURRENT CANCELLATION
+ VOUT –
To cancel the output voltage error due to unmatched bias currents
at the inputs, Resistors RBP and RBN can be used (see Figure 40).
10186-042
– VIN +
RG
RF
Figure 39. Typical Connection Diagram and DC Error Sources
The ideal transfer function (all error sources set to 0 and
infinite dc gain) can be expressed as follows:
RS
Figure 40. Using RBP and RBN to Cancel Bias Current Error
This equation reduces to the familiar forms for noninverting
and inverting op amp gain expressions, as follows:
To compensate for the unmatched bias currents at the two
inputs, set Resistors RBP and RBN as shown in Table 8.
For noninverting gain (VIN = 0 V),
Table 8. Setting RBP and RBN to Cancel Bias Current Error

R 
= 1 + F  × VIP
R
G 

(2)
For inverting gain (VIP = 0 V),
 − RF
VOUT = 
 RG
RBP
(1)
10186-043
RBN

R 
R 
VOUT = 1 + F  × V IP −  F  × V IN
R
G 

 RG 
VOUT
(5)

 × VIN


Value of RF||RG
Greater Than RS
Less Than RS
(3)
The total output voltage error is the sum of the errors due to the
amplifier offset voltage and input currents. The output error due
to the offset voltage can be estimated as follows:
VOUTERROR =
(4)

V
VCM
V − VPNOM
R 
V
+ P
+ OUT  × 1 + F 
 OFFSETNOM +
CMRR
PSRR
A  
RG 

where:
VOFFSETNOM is the offset voltage at the specified supply voltage,
which is measured with the input and output at midsupply.
VCM is the common-mode voltage.
CMRR is the common-mode rejection ratio.
VP is the power supply voltage.
VPNOM is the specified power supply voltage.
PSRR is the power supply rejection ratio.
A is the dc open-loop gain.
Rev. 0 | Page 18 of 24
Value of RBP (Ω)
RF||RG − RS
0
Value of RBN (Ω)
0
RS − RF||RG
Data Sheet
ADA4895-2
Source resistance noise, amplifier voltage noise (ven), and the
voltage noise from the amplifier current noise (iep × RS) are all
subject to the noise gain term (1 + RF/RG). Note that with a
1 nV/√Hz input voltage noise and a 2.7 pA/√Hz input current
noise, the noise contributions of the amplifier are relatively
small for source resistances from approximately 50 Ω to 700 Ω.
NOISE CONSIDERATIONS
Figure 41 illustrates the primary noise contributors for the
typical gain configurations. The total rms output noise is
the root mean square of all the contributions.
RF
vn _ RG = 4kT × RG
vn _ RF = 4kT × RF
ven
RG
+ vout_en –
ien
RS
10186-044
vn _ RS = 4kT × RS
iep
Figure 42 shows the total RTI noise due to the amplifier vs. the
source resistance. In addition, the value of the feedback resistors
used affects the noise. It is recommended that the value of the
feedback resistors be maintained between 250 Ω and 1 kΩ to
keep the total noise low.
Figure 41. Noise Sources in Typical Gain Configurations
500
The output noise spectral density can be calculated as follows:
vout_en =
]

R 
2
2
 4kTRS + iep RS 2 + ven2 +  F  4kTRG + ien RF 2

R 

 G
where:
k is Boltzmann’s constant.
T is the absolute temperature (degrees Kelvin).
RF and RG are the feedback network resistances, as shown in
Figure 41.
RS is the source resistance, as shown in Figure 41.
iep and ien represent the amplifier input current noise spectral
density (pA/√Hz).
ven is the amplifier input voltage noise spectral density (nV/√Hz).
Rev. 0 | Page 19 of 24
50
AMPLIFIER AND
RESISTOR NOISE
5
SOURCE
RESISTANCE NOISE
AMPLIFIER NOISE
0.5
50
500
5k
SOURCE RESISTANCE (Ω)
Figure 42. RTI Noise vs. Source Resistance
50k
10186-045
[
2
NOISE (nV/√Hz)
 R
4kTRF + 1 + F
 RG
(6)
2
ADA4895-2
Data Sheet
APPLICATIONS INFORMATION
USING THE ADA4895-2 AT A GAIN < +10
Figure 44 shows the small and large signal frequency response of
the circuit shown in Figure 43 into a 50 Ω analyzer (G = +5 V/V
or 14 dB). As shown in Figure 44, the circuit is very stable, and
the peaking is a little over 2 dB. This configuration is scalable to
accommodate any gain from 5 to 10, as shown in Table 9.
The ADA4895-2 is minimum gain 10 stable when used in normal
gain configurations. However, the ADA4895-2 can be configured
to work at lower gains down to a gain of +5. Figure 43 shows how
to add a simple RC circuit (R1 = 49.9 Ω and C1 = 60 pF) to allow
the ADA4895-2 to operate at a gain of +5.
C1
60pF
RG
50Ω
Figure 43. Configuring the ADA4895-2 for a Gain of +5 Stable
This circuit has a gain of 9 at high frequency and a gain of 5
at frequencies lower than the resonance frequency of 53 MHz
(1/2πR1C1). With a noise gain of approximately 9 at high frequency,
the total output noise increases unless an antialiasing filter is used
to block the high frequency content.
VOUT = 2V p-p
11
8
5
2
VS = ±5V
G = +5
–1
0.1
1
10
100
1000
FREQUENCY (MHz)
Figure 44. Frequency Response for G = +5
Table 9. Component Values Used with the ADA4895-2 for Gain < +10
Gain
+5
+6
+7
+8
+9
RT (Ω)
49.9
49.9
49.9
49.9
49.9
R1 (Ω)
49.9
66.5
110
205
NA
C1 (pF)
60
45
27
15
NA
RG (Ω)
49.9
40.2
37.4
32.4
30.9
Rev. 0 | Page 20 of 24
RF (Ω)
200
200
226
226
249
RO (Ω)
49.9
49.9
49.9
49.9
49.9
CL (pF)
150
150
150
120
100
10186-047
RF
200Ω
R1
50Ω
VOUT = 30mV p-p
VOUT = 250mV p-p
14
VOUT
CL
150pF
CLOSED-LOOP GAIN (dB)
RT
50Ω
10186-046
VIN
RO
50Ω
17
Data Sheet
ADA4895-2
HIGH GAIN BANDWIDTH APPLICATION
44
The circuit in Figure 45 shows cascaded dual amplifier stages
using the ADA4895-2. Each stage has a gain of +10 (+20 dB),
making the output 100 times (+40 dB) the input. The total gain
bandwidth product is approximately 9 GHz with the part
operating on 6 mA of quiescent current (3 mA per amplifier).
40
RF
226Ω
RG
25.5Ω
CF
2pF
C1
5pF
RG
25.5Ω
24
20
16
RF
226Ω
CF
2pF
RL
1kΩ
VOUT
12
8
4 VOUT = 2V p-p
G = +100
0
0.1
1
Figure 45. Cascaded Amplifier Stages for High Gain Applications (G = +100)
Figure 46 shows the large signal frequency response for two cases.
The first case is with installed feedback capacitors (CF = 2 pF), and
the second case is without these capacitors. Removing the 2 pF
feedback capacitors from this circuit increases the bandwidth,
but adds about 0.5 dB of peaking.
10
100
1000
FREQUENCY (MHz)
10186-049
RT
50Ω
CF = 2pF
28
GAIN (dB)
R1
249Ω
32
10186-048
VIN
NO CF
36
Figure 46. Large Signal Frequency Response, G = +100, VS = ±5 V
To better balance the second stage and remove the current offset
contribution, an R1C1 circuit can be sized to correct for any mismatch between the source impedance and the feedback network
impedance on the input amplifier. (In the example shown in
Figure 45, R1 = 249 Ω and C1 = 5 pF.) The offset of each amplifier
is within the same statistical range. As configured, the offset of
the output amplifier is not statistically significant to the overall
offset of the system.
Figure 46 was captured using a ±5 V supply; however, this circuit
will also operate with supplies from ±1.5 V to ±5 V as long as the
input and output headroom values are not violated.
Rev. 0 | Page 21 of 24
ADA4895-2
Data Sheet
WIDEBAND PHOTOMULTIPLIER PREAMPLIFIER
A decompensated amplifier can provide significantly greater
speed in transimpedance applications than a unity-gain stable
amplifier. The speed increases by the square root of the ratio
of the two amplifiers’ bandwidth; that is, a 1 GHz GBP amplifier
is 10 times faster than a 10 MHz amplifier in the same transimpedance application if all other parameters are kept constant.
Additionally, the input voltage noise normally dominates the
total output rms noise because it is multiplied by the capacitive
noise gain network.
C
S
 C M  CF  CD 
CF
In the case of the ADA4895-2, the input noise is low, but the
capacitive noise gain network must be kept greater than 10 for
stability reasons.
RF and the total capacitance produce a pole in the loop transmission of the amplifier that can result in peaking and instability.
Adding CF creates a zero in the loop transmission that compensates
for the pole effect and reduces the signal bandwidth. It can be
shown that the signal bandwidth resulting in a 45° phase margin
(f(45)) is defined as follows:
GBP
2π  RF  CS
f  45  
where:
GBP is the gain bandwidth product.
RF is the feedback resistance.
CS is the total capacitance at the amplifier summing junction
(amplifier + photomultiplier + board parasitics).
The value of CF that produces f(45) is
One disadvantage of using the ADA4895-2 in transimpedance
applications is that the input current and input current noise
can create large offsets and output voltage noise when coupled
with an excessively high feedback resistance. Despite these two
issues, the ADA4895-2 noise and gain bandwidth can provide a
significant increase in performance within certain transimpedance
ranges.
Figure 47 shows an I/V converter with an electrical model of a
photomultiplier.
CF 
CS
2π  RF  GBP
The frequency response in this case shows approximately 2 dB
of peaking and 15% overshoot. Doubling CF and reducing the
bandwidth by half results in a flat frequency response with
approximately 5% transient overshoot.
The output noise over frequency for the preamplifier is shown
in Figure 48.
CF
f1 = 2 π R
RF
1
F (CS + CM + CF + CD)
1
VOUT
CD
RSH
+
CM
CF + CS
RF
10186-050
VB
RF NOISE
f2
ven (CS + CM + CF + CD)/CF
f3
f1
Figure 47. Wideband Photomultiplier Preamplifier
ven
The basic transfer function is
VOUT 
GBP
f3 = (C + C + C + C )/C
S
M
F
D
F
NOISE DUE TO AMPLIFIER
I PHOTO  RF
10186-051
CM
CS
IPHOTO
VOLTAGE NOISE(nV/ Hz)
–
f2 = 2 π R C
F F
FREQUENCY (Hz)
1  sCF RF
Figure 48. Photomultiplier Voltage Noise Contributions
where IPHOTO is the output current of the photomultiplier, and
the parallel combination of RF and CF sets the signal bandwidth.
Table 10. RMS Noise Contributions of Photomultiplier
Preamplifier
The stable bandwidth attainable with this preamplifier is a function
of RF, the gain bandwidth product of the amplifier, and the total
capacitance at the summing junction of the amplifier, including CS
and the amplifier input capacitance.
Contributor
RF
Amplifier ven
Amplifier ien
Rev. 0 | Page 22 of 24
Expression
4 kT  R F  f2  1.57
ven 
C S  C M  C F  C D  
CF
ien  R F  f 2  1.57
f 3  1.57
Data Sheet
ADA4895-2
LAYOUT CONSIDERATIONS
To ensure optimal performance, careful and deliberate attention
must be paid to the board layout, signal routing, power supply
bypassing, and grounding.
Ground Plane
It is important to avoid ground in the areas under and around the
input and output of the ADA4895-2. Stray capacitance created
between the ground plane and the input and output pads of a
device is detrimental to high speed amplifier performance. Stray
capacitance at the inverting input, along with the amplifier input
capacitance, lowers the phase margin and can cause instability.
Stray capacitance at the output creates a pole in the feedback
loop, which can reduce phase margin and can cause the circuit
to become unstable.
Power Supply Bypassing
Power supply bypassing is a critical aspect in the performance
of the ADA4895-2. A parallel connection of capacitors from each
power supply pin to ground works best. Smaller value capacitor
electrolytics offer better high frequency response, whereas larger
value capacitor electrolytics offer better low frequency
performance.
Paralleling different values and sizes of capacitors helps to ensure
that the power supply pins are provided with low ac impedance
across a wide band of frequencies. This is important for minimizing the coupling of noise into the amplifier—especially when the
amplifier PSRR begins to roll off—because the bypass capacitors
can help lessen the degradation in PSRR performance.
Place the smallest value capacitor on the same side of the board
as the amplifier and as close as possible to the amplifier power
supply pins. Connect the ground end of the capacitor directly to
the ground plane.
It is recommended that a 0.1 µF ceramic capacitor with a 0508
case size be used. The 0508 case size offers low series inductance
and excellent high frequency performance. Place a 10 µF electrolytic capacitor in parallel with the 0.1 µF capacitor. Depending
on the circuit parameters, some enhancement to performance
can be realized by adding additional capacitors. Each circuit
is different and should be analyzed individually for optimal
performance.
Rev. 0 | Page 23 of 24
ADA4895-2
Data Sheet
OUTLINE DIMENSIONS
3.10
3.00
2.90
10
3.10
3.00
2.90
5.15
4.90
4.65
6
1
5
PIN 1
IDENTIFIER
0.50 BSC
0.95
0.85
0.75
15° MAX
1.10 MAX
0.30
0.15
6°
0°
0.23
0.13
0.70
0.55
0.40
COMPLIANT TO JEDEC STANDARDS MO-187-BA
091709-A
0.15
0.05
COPLANARITY
0.10
Figure 49. 10-Lead Mini Small Outline Package [MSOP]
(RM-10)
Dimensions shown in millimeters
ORDERING GUIDE
Model 1
ADA4895-2ARMZ
ADA4895-2ARMZ-R7
ADA4895-2ARMZ-RL
ADA4895-2ARM-EBZ
1
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Package Description
10-Lead Mini Small Outline Package [MSOP]
10-Lead Mini Small Outline Package [MSOP]
10-Lead Mini Small Outline Package [MSOP]
Evaluation Board
Z = RoHS Compliant Part.
©2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D10186-0-9/12(0)
Rev. 0 | Page 24 of 24
Package
Option
RM-10
RM-10
RM-10
Ordering
Quantity
50
1,000
3,000
Branding
H35
H35
H35
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