FUJITSU MB3759C

FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-27200-6E
ASSP For Power Management Applications
BIPOLAR
Switching Regulator Controller
(Switchable between push-pull and single-end functions)
MB3759
■ DESCRIPTION
The MB3759 is a control IC for constant-frequency pulse width modulated switching regulators.
The IC contains most of the functions required for switching regulator control circuits. This reduces both the
component count and assembly work.
■ FEATURES
•
•
•
•
•
•
•
Drives a 200 mA load
Can be set to push-pull or single-end operation
Prevents double pulses
Adjustable dead-time
Error amplifier has wide common phase input range
Built in a circuit to prevent misoperation due to low power supply voltage.
Built in an internal 5 V reference voltage with superior voltage reduction characteristics
■ PACKAGES
16-pin plastic DIP
(DIP-16P-M04)
16-pin ceramic DIP
(DIP-16C-C01)
16-pin plastic SOP
(FPT-16P-M06)
MB3759
■ PIN ASSIGNMENT
(TOP VIEW)
+IN1 1
16 +IN2
−IN1 2
15 −IN2
FB 3
14 VREF
DT 4
13 OC
CT 5
12 VCC
RT 6
11 C2
GND 7
10 E2
C1 8
9 E1
(DIP-16P-M04)
(DIP-16C-C01)
(FPT-16P-M06)
■ BLOCK DIAGRAM
Output
control
OC
13
RT 6
CT 5
Dead time
control
DT
Q
8
C1
9
E1
= 0.2 V
11 C2
10 E2
Error amp.1
−IN1 2
2
T
4
+IN1 1
Feed back
Q
OSC
+
A1
−
+IN2 16
+
−IN2 15
−
FB
3
A2
Error amp.2
PMW comparator
Reference
regurator
12
VCC
14
VREF
7
GND
MB3759
■ ABSOLUTE MAXIMUM RATINGS
Unit
Rating
Parameter
Symbol
Condition
Min
Max
Power supply voltage
VCC
—
—
41
V
Collector output voltage
VCE
—
—
41
V
Collector output current
ICE
—
—
250
mA
Amplifier input voltage
VI
—
—
VCC + 0.3
V
Ta ≤ +25 °C
—
1000
Ta ≤ +60 °C
—
800
Ta ≤ +25 °C
—
620
Plastic DIP
Power dissipation
Ceramic DIP
PD
SOP *
mW
Operating temperature
Top
—
−30
+85
°C
Storage temperature
Tstg
—
−55
+125
°C
*: When mounted on a 4 cm square double-sided epoxy circuit board (1.5 mm thickness)
The ceramic circuit board is 3 cm x 4 cm (0.5 mm thickness)
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■ RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Value
Min
Typ
Max
Unit
Power supply voltage
VCC
7
15
32
V
Collector output voltage
VCE
—
—
40
V
Collector output current
ICE
5
—
200
mA
Amplifier input voltage
VIN
−0.3
0 to VR
VCC − 2
V
FB sink current
ISINK
—
—
0.3
mA
ISOURCE
—
—
2
mA
Reference section output current
IREF
—
5
10
mA
Timing resistor
RT
1.8
30
500
kΩ
6
FB source current
Timing capacitor
CT
470
1000
10
pF
Oscillator frequency
fosc
1
40
300
kHz
Operating temperature
Top
−30
+25
+85
°C
Note: Values are for standard derating conditions. Give consideration to the ambient temperature and power consumption if using a high supply voltage.
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
3
MB3759
■ ELECTRICAL CHARACTERISTICS
(VCC = 15 V, Ta = +25 °C)
Parameter
Reference
section
Oscillator
section
Symbol
IO = 1 mA
Value
Unit
Min
Typ
Max
4.75
5.0
5.25
V
Output voltage
VREF
Input regulation
∆VR(IN)
7 V ≤ VCC ≤ 40 V,
Ta = +25 °C
—
2
25
mV
Load regulation
∆VR(LD)
1 mA ≤ IO ≤ 10 mA,
Ta = +25 °C
—
−1
−15
mV
Temperature stability
∆VR/∆T
−20 °C ≤ Ta ≤
+ 85 °C
—
±200
±750
µV/°C
Short circuit output
current
ISC
—
15
40
—
mA
Reference lockout
voltage
—
—
—
4.3
—
V
Reference hysteresis
voltage
—
—
—
0.3
—
V
Oscillator frequency
fosc
RT = 30 kΩ,
CT = 1000 pF
36
40
44
kHz
Standard deviation
of frequency
—
RT = 30 kΩ,
CT = 1000 pF
—
±3
—
%
Frequency change
with voltage
—
7 V ≤ VCC ≤ 40 V,
Ta = +25 °C
—
±0.1
—
%
∆fosc/∆T
−20 °C ≤ Ta ≤
+85 °C
—
±0.01
±0.03
%/°C
Input bias current
ID
0 ≤ VI ≤ 5.25 V
—
−2
−10
µA
Maximum duty cycle (Each
output)
—
VI = 0
40
45
—
%
Frequency change with
temperature
Dead-time
control section
Condition
Input
threshold
voltage
0% duty
cycle
VDO
—
—
3.0
3.3
V
Max. duty
cycle
VDM
—
0
—
—
V
(Continued)
4
MB3759
(Continued)
(VCC = 15 V, Ta = +25 °C)
Parameter
Error
amplifier
section
Symbol
Value
Min
Typ
Max
Unit
Input offset voltage
VIO
VO (pin3) = 2.5 V
—
±2
±10
mV
Input offset current
IIO
VO (pin3) = 2.5 V
—
±25
±250
nA
Input bias current
II
VO (pin3) = 2.5 V
—
−0.2
−1.0
µA
−0.3
—
VCC − 2
V
Common-mode input
voltage
VCM
7 V ≤ VCC ≤ 40 V
Open-loop voltage
amplification
AV
0.5 V ≤ VO ≤ 3.5 V
70
95
—
dB
Unity-gain bandwidth
BW
AV = 1
—
800
—
kHz
VCC = 40 V
65
80
—
dB
ISINK
-5 V ≤ VID ≤ -15 mV,
VO = 0.7 V
0.3
0.7
—
mA
ISOURCE
15 mV ≤ VID ≤ 5V,
VO = 3.5 V
−2
−10
—
mA
Common-mode
rejection ratio
Output sink ISINK
current
(pin 3)
ISOURCE
Output
section
Condition
CMR
Collector leakage current
ICO
VCE = 40 V,
VCC = 40 V
—
—
100
µA
Emitter leakage current
IEO
VCC = VC = 40 V,
VE = 0
—
—
−100
µA
Collector
emitter
saturation
voltage
Emitter
grounded
VSAT(C)
VE = 0, IC = 200 mA
—
1.1
1.3
V
Emitter
follower
VSAT(E)
VC = 15 V,
IE = −200 mA
—
1.5
2.5
V
Output control input
current
IOPC
VI = VREF
—
1.3
3.5
mA
Input threshold voltage
VTH
0% Duty
—
4
4.5
V
Input sink current (pin 3)
ISINK
VO (pin3) = 0.7 V
0.3
0.7
—
mA
Power supply current
ICC
V(pin4) = 2 V,
See Fig-2
—
8
—
mA
Standby current
ICCQ
V(pin6) = VREF,
I/O open
—
7
12
mA
PWM
comparator
section
Rise time
Switching
characteristics
Fall time
Rise time
Fall time
Emitter
grounded
tR
RL = 68 Ω
—
100
200
ns
tF
RL = 68 Ω
—
25
100
ns
Emitter
follower
tR
RL = 68 Ω
—
100
200
ns
tF
RL = 68 Ω
—
40
100
ns
5
MB3759
■ TEST CIRCUIT
VCC = 15V
150 Ω /2 W
150 Ω /2 W
VD
TEST
INPUT
DT
VC
30 kΩ
1000 pF
VCC
C1
FB
E1
RT
C2
OUTPUT 1
OUTPUT 2
CT
E2
−IN1
+IN1
−IN2
+IN2 VREF
OC
GND
50 kΩ
■ OPERATING TIMING
= 3.0 V
Voltage at CT
VC
VD
=0 V
OUTPUT 1
ON
ON
ON
ON
OUTPUT 2
ON
6
ON
ON
MB3759
■ OSCILLATION FREQUENCY
f OSC =
1.2
RT · C T
RT : kΩ
CT : µF
fosc : kHZ
■ OUTPUT LOGIC TABLE
Input (Output Control)
Output State
GND
Single-ended or parallel output
VREF
Push-pull
7
MB3759
■ TYPICAL CHARACTERISTICS
Reference voltage vs.
power supply voltage
Reference voltages. temperature
10
5
VREF
4
5
∆VREF
3
0
2
−5
1
0
0
10
20
30
40
Reference voltage change
∆VREF (mV)
IO = 1 mA
Reference voltage change
∆VREF (mV)
Reference voltage VREF (V)
6
VCC = 15 V
IO = 1 mA
0
−10
−20
−30
−25
0
25
50
75
100
Temperature Ta (°C)
Power supply voltage VCC (V)
Duty ratio vs. dead time control voltage
Oscillator vs. RT, CT
1M
VCC =15 V
200 k
100 k
CT = 470 pF
50 k
1000 pF
20 k
10 k
0.01µF
5k
0.1µF
Duty radio TON / T (%)
Oscillator frequency fOSC (HZ)
500 k
0
VCC = 15 V
Ta = 0°C
CT = 1000 pF
RT = 30 kΩ
Ta = +25°C
10
Ta = +70°C
20
30
40
2k
50
1k
2k
5 k 10 k 20 k
100 k 200 k 500 k
RT (Ω)
0
1
2
3
Dead time control voltage VD (V)
(Continued)
8
MB3759
Open loop voltage amplification vs. frequency
80
0.8
Low - level output voltage VOL (V)
Open loop voltage amplification AV (dB)
VCC = 15 V
∆VO = 3 V
90
70
60
50
40
30
20
10
0
10
5
Ta = 0°C
Ta = +70˚C
0.6
Ta = +70°C
0.4
3
Ta = 0°C
Ta = +25°C
VOL
0.2
1k
10 k
100 k
2
1
0
0
1M
0.5
5
Ta = 0°C
0.8
Ta = +70°C
0.6
0.4
50
100
150
Collector output current IC (mA)
200
Emitter saturation voltage VSAT (E) (V)
VCC = 15 V
Ta = +25°C
1.5
15
IOL
IOH
Emitter saturation voltage vs.
emitter output current
1.2
1.0
1.0
10
Output current IOL, IOH (mA)
Collector saturation voltage vs.
collector output current
Collector saturation voltage VSAT ( C ) (V)
4
VOH
Frequency f (Hz)
0
VCC = 15 V
Ta = +25°C
0
100
High - level output voltage VOH (V)
Output voltage vs. output current
(feed back terminal)
100
1.8
VCC = 15 V
Ta = 0°C
1.6
Ta = +25°C
1.4
Ta = +70°C
1.2
1.0
0
50
100
150
200
Emitter output current IE (mA)
(Continued)
9
MB3759
Output voltage vs. reference voltage
Power supply current vs. power supply voltage
6
10
Power supply current ICC ,ICCQ (mA)
Output voltage VOUT (V)
(Continued)
5
5V
4
400 Ω
3
VOUT
8
2
1
0
0
1
2
3
4
5
ICC
7.5
ICCQ
5
2.5
0
6
0
Reference voltage VREF (V)
Power dissipation PD (mW)
(200, 10)
800
(100, 10)
(200, 5)
(100, 5)
600
(100, 0)
400
(0, 0)
200
40
1000
ceramic DIP
800
plastic DIP
600
SOP
400
200
0
0
0
10
20
30
40
Power supply voltage VCC (V)
10
30
Power dissipation vs. ambient temperature
Power dissipation PD (mW)
(IO, IR)
(mA)
Ta = +25°C
20
Power supply voltage VCC (V)
Power dissipation vs. power supply voltage
1000
10
0
20
40
60
80
Temperature Ta (°C)
100
MB3759
■ BASIC OPERATION
Switching regulators can achieve a high level of efficiency. This section describes the basic principles of operation
using a chopper regulator as an example.
As shown in the diagram, diode D provides a current path for the current through inductance L when Q is off.
Transistor Q performs switching and is operated at a frequency that provides a stable output. As the switching
element is saturated when Q is on and cutoff when Q is off, the losses in the switching element are much less
than for a series regulator in which the pass transistor is always in the active state.
While Q is conducting, the input voltage VIN is supplied to the LC circuit and when Q is off, the energy stored in
L is supplied to the load via diode D. The LC circuit smooths the input to supply the output voltage.
The output voltage VO is given by the following equation.
VO =
Ton
Ton
VIN =
VIN
Ton + Toff
T
Q : ON
L
Q
VIN
D
Q : OFF
C
VO
RL
Q: Switching element
D: Flywheel diode
As indicated by the equation, variation in the input voltage is compensated for by controlling the duty cycle (Ton/
T). If VIN drops, the control circuit operates to increase the duty cycle so as to keep the output voltage constant.
The current through L flows from the input to the output when Q is on and through D when Q is off. Accordingly,
the average input current IIN is the product of the output current and the duty cycle for Q.
IIN =
Ton
IO
T
The theoretical conversion efficiency if the switching loss in Q and loss in D are ignored is as follows.
PO
× 100 (%)
PIN
VO · IO
=
× 100
VIN · IIN
VIN · IO · Ton / T
=
× 100
VIN · IO · Ton / T
= 100 (%)
η=
The theoretical conversion efficiency is 100%. In practice, losses occur in the switching element and elsewhere,
and design decisions to minimize these losses include making the switching frequency as low as practical and
setting an optimum ratio of input to output voltage.
11
MB3759
■ SWITCHING ELEMENT
1. Selection of the Switching Transistor
It can be said that the success or otherwise of a switching regulator is determined by the choice of switching
transistor. Typically, the following parameters are considered in selecting a transistor.
• Withstand voltage
• Current
• Power
• Speed
For the withstand voltage, current, and power, it is necessary to determine that the area of safe operation (ASO)
of the intended transistor covers the intended range for these parameters.
The speed (switching speed: rise time tr, storage time tstg, and fall time tf) is related to the efficiency and also
influences the power.
The figures show the transistor load curve and VCE - IC waveforms for chopper and inverter-type regulators.
The chopper regulator is a relatively easy circuit to deal with as the diode clamps the collector. A peak can be
seen immediately after turn-on. However, this is due to the diode and is explained later.
In an inverter regulator, the diodes on the secondary side act as a clamp. Viewed from the primary side, however,
a leakage inductance is present. This results in an inductive spike which must be taken account of as it is added
to double the VIN voltage.
chopper regulator
IN VCE
IC
inverter regulator
IN
L
VO
D1 L
Q
VO
C
D
C
D2
IC
IC
on
on
off
VCE
off
VCE
VIN
VIN 2 VIN
VCE
Ton
VCE
Ton
2 VIN
VIN
t
t
IC
IC
Ton
t
12
Ton
t
MB3759
The figure below shows an example of the ASO characteristics for a forward-biased power transistor (2SC3058A)
suitable for switching.
Check that the ASO characteristics for the transistor you intend to use fully covers the load curve. Next, check
whether the following conditions are satisfied. If so, the transistor can be expected to perform the switching
operation safely.
• The intended ON time does not exceed the ON-time specified for the ASO characteristic.
• The OFF-time ASO characteristic satisfies the intended operation conditions.
• Derating for the junction temperature has been taken into account.
For a switching transistor, the junction temperature is closely related to the switching speed. This is because the
switching speed becomes slower as the temperature increases and this affects the switching losses.
Forward-biased area of safe operation single pulse
2SC3058A (450 V, 30 A)
50
TC = +25˚C
Single pulse
IC (Pulse) max.
IC max.
Pw
µs
10
5
s
1m
ms
Collector current IC (A)
.
10
0
.C
50
D
=
20
2
1
0.5
0.2
0.1
0.05
5
10
20
50 100 200
500 1000
Collector - emitter voltage VCE (V)
2. Selecting the Diode
Consideration must be given to the switching speed when selecting the diode. For chopper regulators in particular,
the diode affects the efficiency and noise characteristics and has a big influence on the performance of the
switching regulator.
If the reverse recovery time of the diode is slower than the turn-on time of the transistor, an in-rush current of
more than twice the load current occurs resulting in noise (spikes) and reduced efficiency.
As a rule for diode selection, use a diode with a reverse recovery time trr that is sufficiently faster than the transistor
tr.
13
MB3759
■ APPLICATION IN PRACTICAL CIRCUITS
1. Error Amplifier Gain Adjustment
Take care that the bias current does not become large when connecting an external circuit to the FB pin (pin 3)
for adjusting the amplifier gain. As the FB pin is biased to the low level by a sink current, the duty cycle of the
output signal will be affected if the current from the external circuit is greater than the amplifier can sink.
The figure below shows a suitable circuit for adjusting the gain.
It is very important that you avoid having a capacitive load connected to the output stage as this will affect the
response time.
OUT
R1
+
Vo
VREF
−
RIN
R2
RF
2. Synchronized Oscillator Operation
The oscillator can be halted by connecting the CT pin to the GND pin. If supplying the signal externally, halt the
internal oscillator and input to the CT pin.
Using this method, multiple ICs can be used together in synchronized operation. For synchronized operation,
set one IC as the master and connect the other ICs as shown in the diagram.
Slave
Master
RT
14
CT
VREF RT
CT
MB3759
3. Soft Start
A soft start function can be incorporated by using the dead-time control element.
VREF
VREF
R2 VR
VD =
R1+R2
R1
Cd
DT
DT
R2
Rd
Setting the dead-time
Incorporating soft start
When the power is turned on, Cd is not yet charged and the DT input is pulled to the VREF pin causing the output
transistor to turn off. Next, the input voltage to the DT pin drops in accordance with the Cd, Rd constant causing
the output pulse width to increase steadily, providing stable control circuit operation.
If you wish to use both dead-time and softstart, combine these in an OR configuration.
VREF
Cd
R1
DT
Rd
R2
4. Output Current Limiting (Fallback system using a detection resistor inserted on the output side)
(1) Typical example
VREF
RS
VO
IO
VO
R3
VO1
R1
+
VIO
D
−
R4
R5
R2
0
GND
0
IL3 IL2
IL1
IO
15
MB3759
• Initial limit current IL1
VO >
R4
VREF
R3 + R4
The condition for VO is:
As the diode is reverse biased
R1
VO – VIO
R1 + R2
VIO
VO
R1
∴IL1 =
–
RS
R1 + R2 RS
RS IL1 =
Eq. (1) (where R2 >> R1)
VIO is the input offset voltage to the op-amp (-10 mV ≤ VIO ≤ +10 mV) and this causes the variation in IL. Accordingly,
if for example the variation in IL is to be limited to ±10 %, using equation (1) and only considering the variation
in the offset voltage gives the following:
IO
=
1
VIO
R1
( R2 >> R1 )
( VO + VEE ) −
RS R1 + R2
RS
This indicates a setting of 100 mV or more is required.
• Polarity change point IL2
As this is the point where the diode becomes forward biased, it can be calculated by substituting [R4/(R3+R4)
VREF - VD] for VO in equation (where VD is the forward voltage of the diode).
IL2 =
VIO
R1 R4 / (R3 + R4) · VREF – VD
–
R1 + R2
RS
RS
• Final limit current IL3
The limit current for VO = 0 when R2 >> R1 is the point where the voltages on either side of RS and on either
side of R5 are biased.
R4R5 VREF − R3R5 VD − R4R5 VD
− VIO
R3R4 + R3R5 + R4R5
VIO
1
1
R4
(2) Eq.
(
VREF − VD ) −
∴IL3 =
RS
RS 1 + (R 3 // R 4) / R5 R3 + R4
RS IL3 =
R3//R4 is the resistance formed by R3 and R4 in parallel (R3R4/(R3 + R4)). When R3//R4 << R5, equation (2)
becomes:
IL3 C =
VIO
1
R4
(
VREF – VD ) –
RS
RS R3 + R4
In addition to determining the limit current IL3 for VO = 0, R3, R4, R5, and diode D also operate as a starter when
the power is turned on.
• Starter circuit
The figure below shows the case when the starter circuit formed by R3, R4, R5, and D is not present. The output
current IO after the operation of the current limiting circuit is:
IO =
VIO
VO
R1
−
RS
R1 + R2 RS
When VO = 0 such as when the power is turned on, the output current IO = -VI O / RS and, if the offset voltage VIO
is positive, the output current is limited to being negative and therefore the output voltage does not rise.
Accordingly, if using a fallback system with a detection resistor inserted in the output, always include a starter
circuit, expect in the cases described later.
16
MB3759
VO
IO
RS
VO
VIO > 0
R1
VIO < 0
VO
+
VIO
−
R2
GND
0
IO
IL1
(2) Example that does not use a diode
VREF
VO
IO
RS
VO
R3
R1
R4
>
R1+R2
R3+R4
VO
R1
+
VIO
−
R1
R4
<
R1+R2
R3+R4
R4
R2
0
GND
0
IL1
IO
The output current IO after current limiting is:
IO =
1
R1
R4
R4
[(
–
VREF – VIO ] (R2 >> R1)
) VO +
RS R1 + R2 R3 + R4
R3 + R4
In this case, a current flows into the reference voltage source via R3 and R4 if VO > VREF. To maintain the stability
of the reference voltage, design the circuit such that this does not exceed 200 µA.
17
MB3759
(3) When an external stabilized negative power supply is present
RS
IO
VO
VO
VO
R1
+
VIO
VO*
−
R2
−VEE
0
0
I L5
I L1
IO
The output current IO after current limiting is:
IO =
1
VIO
R1
(VO + VEE) –
(R2 >>R1)
RS R1 + R2
RS
If the output is momentarily shorted, VO* goes briefly negative. In this case, set the voltage across R1 to
300 mV or less to ensure that a voltage of less than -0.3 V is not applied to the op-amp input.
18
MB3759
5. Example Power Supply Voltage Supply Circuit
(1) Supplied via a Zener diode
VIN
VIN
VZ
R
VCC
C
VZ
VCC
MB3759
MB3759
VCC = VIN − VZ
VCC = VZ
(2) Supplied via a three-terminal regulator
Three-terminal
regulator
AC
VCC
MB3759
6. Example Protection Circuit for Output Transistor
Due to its monolithic IC characteristics, applying a negative voltage greater than the diode voltage ( =: 0.5 V) to
the substrate (pin 7) of the MB3759 causes a parasitic effect in the IC which can result in misoperation.
Accordingly, the following measures are required if driving a transformer or similar directly from the output
transistor of the IC.
(1) Protect the output transistor from the parasitic effect by using a Schottky barrier diode.
8
9
11
SBD
10
19
MB3759
(2) Provide a bias at the anode-side of the diode to clamp the low level side of the transistor.
8
14
11
7.5 kΩ
= 0.7 V
1.2 kΩ
(3) Drive the transformer via a buffer transistor.
VCC
8
9
20
0.1 µF
MB3759
7. Typical Application
(1)Chopper regulator
1Ω
AC 100 V
+
15 V
+
+
24 V
2.5 A
1 mH
50 Ω
2 kΩ
10 kΩ
16 kΩ
VCC
10 kΩ
100 kΩ
0.22 µF
2.2 kΩ
10 µF
+
47 kΩ
5.6 kΩ
5.1 kΩ
300 Ω
5.1 kΩ
FB
E1
−IN1
C1
+IN1
C2
VREF
E2
−IN2
RT
+
+IN2
CT
DT
OC
GND
2200 µF
20 kΩ
2200 pF
5 kΩ
0.1 Ω
21
MB3759
(2) Inverter regulator
AC 100 V
+
15 V
+
+
A
24 V
2.5 A
33 Ω
+
100Ω
0.1 Ω
100Ω
33 Ω
B
A
10 kΩ
VCC
10 kΩ
16 kΩ
100 kΩ
0.22 µF
2.2 kΩ
5.6 kΩ
+ 10 µF
47 kΩ
FB
E1
−IN1
C1
+IN1
C2
VREF
E2
−IN2
RT
+IN2
CT
5.1 kΩ
OC
DT
20 kΩ
GND
300 Ω
5.1 kΩ
5 kΩ
B
22
REF
2200 pF
2200 µF
MB3759
■ ORDERING INFORMATION
Part number
Package
MB3759P
16-pin plastic DIP
(DIP-16P-M04)
MB3759C
16-pin ceramic DIP
(DIP-16C-C01)
MB3759PF
16-pin plastic SOP
(FPT-16P-M06)
Remarks
23
MB3759
■ PACKAGE DIMENSIONS
16-pin plastic DIP
(DIP-16P-M04)
+0.20
19.55 –0.30
.770
+.008
–.012
INDEX-1
6.20±0.25
(.244±.010)
INDEX-2
0.51(.020)MIN
4.36(.172)MAX
0.25±0.05
(.010±.002)
3.00(.118)MIN
0.46±0.08
(.018±.003)
+0.30
0.99 –0
+.012
.039 –0
1.27(.050)
MAX
C
+0.30
1.52 –0
+.012
.060 –0
7.62(.300)
TYP
15°MAX
2.54(.100)
TYP
1994 FUJITSU LIMITED D16033S-2C-3
Dimensions in mm (inches)
(Continued)
24
MB3759
(Continued)
16-pin ceramic DIP
(DIP-16C-C01)
+0.71
19.30 –0.15
.760
+.028
–.006
R0.64(.025)
REF
+0.30
6.30 –0.10
+.012
.248 –.004
+0.36
7.90 –0.15
+.014
.311 –.006
5.08(.200)MAX
0.81±0.30
(.032±.012)
+0.10
0.25 –0.05
+.004
.010 –.002
3.40±0.36
(.134±.014)
+0.05
1.52 –0.10
+.002
.060 –.004
2.54±0.25
(.100±.010)
1.27(.050)
MAX
C
0.81(.032)
TYP
+0.13
0.46 –0.08
7.62(.300)
TYP
0°
15°
+.005
.018 –.003
17.78(.700)REF
1994 FUJITSU LIMITED D16011SC-2-3
Dimensions in mm (inches)
(Continued)
25
MB3759
(Continued)
16-pin plastic SOP
(FPT-16P-M06)
+0.25
2.25(.089)MAX
(Mounting height)
+.010
10.15 –0.20 .400 –.008
INDEX
0.05(.002)MIN
(STAND OFF)
5.30±0.30
(.209±.012)
+0.40
6.80 –0.20
7.80±0.40
(.307±.016)
+.016
.268 –.008
"B"
1.27(.050)
TYP
0.45±0.10
(.018±.004)
+0.05
Ø0.13(.005)
0.15 –0.02
M
+.002
.006 –.001
Details of "A" part
Details of "B" part
0.40(.016)
0.15(.006)
0.20(.008)
"A"
0.10(.004)
8.89(.350)REF
C
0.50±0.20
(.020±.008)
0.20(.008)
0.18(.007)MAX
0.18(.007)MAX
0.68(.027)MAX
0.68(.027)MAX
2000 FUJITSU LIMITED F16015S-2C-5
Dimensions in mm (inches)
26
MB3759
FUJITSU LIMITED
For further information please contact:
Japan
FUJITSU LIMITED
Corporate Global Business Support Division
Electronic Devices
KAWASAKI PLANT, 4-1-1, Kamikodanaka,
Nakahara-ku, Kawasaki-shi,
Kanagawa 211-8588, Japan
Tel: +81-44-754-3763
Fax: +81-44-754-3329
http://www.fujitsu.co.jp/
North and South America
FUJITSU MICROELECTRONICS, INC.
3545 North First Street,
San Jose, CA 95134-1804, U.S.A.
Tel: +1-408-922-9000
Fax: +1-408-922-9179
Customer Response Center
Mon. - Fri.: 7 am - 5 pm (PST)
Tel: +1-800-866-8608
Fax: +1-408-922-9179
http://www.fujitsumicro.com/
Europe
FUJITSU MICROELECTRONICS EUROPE GmbH
Am Siebenstein 6-10,
D-63303 Dreieich-Buchschlag,
Germany
Tel: +49-6103-690-0
Fax: +49-6103-690-122
http://www.fujitsu-fme.com/
Asia Pacific
FUJITSU MICROELECTRONICS ASIA PTE. LTD.
#05-08, 151 Lorong Chuan,
New Tech Park,
Singapore 556741
Tel: +65-281-0770
Fax: +65-281-0220
http://www.fmap.com.sg/
Korea
FUJITSU MICROELECTRONICS KOREA LTD.
1702 KOSMO TOWER, 1002 Daechi-Dong,
Kangnam-Gu,Seoul 135-280
Korea
Tel: +82-2-3484-7100
Fax: +82-2-3484-7111
F0006
 FUJITSU LIMITED Printed in Japan
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with FUJITSU sales
representatives before ordering.
The information and circuit diagrams in this document are
presented as examples of semiconductor device applications, and
are not intended to be incorporated in devices for actual use. Also,
FUJITSU is unable to assume responsibility for infringement of
any patent rights or other rights of third parties arising from the use
of this information or circuit diagrams.
The contents of this document may not be reproduced or copied
without the permission of FUJITSU LIMITED.
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applications (computers, office automation and other office
equipments, industrial, communications, and measurement
equipments, personal or household devices, etc.).
CAUTION:
Customers considering the use of our products in special
applications where failure or abnormal operation may directly
affect human lives or cause physical injury or property damage, or
where extremely high levels of reliability are demanded (such as
aerospace systems, atomic energy controls, sea floor repeaters,
vehicle operating controls, medical devices for life support, etc.)
are requested to consult with FUJITSU sales representatives before
such use. The company will not be responsible for damages arising
from such use without prior approval.
Any semiconductor devices have inherently a certain rate of failure.
You must protect against injury, damage or loss from such failures
by incorporating safety design measures into your facility and
equipment such as redundancy, fire protection, and prevention of
over-current levels and other abnormal operating conditions.
If any products described in this document represent goods or
technologies subject to certain restrictions on export under the
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prior authorization by Japanese government should be required for
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