FUJITSU MB3885PFV

FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-27227-1E
ASSP For Power Management Applications
1-channel DC/DC Converter IC
with Synchronous Rectifier
MB3885
■ DESCRIPTION
The MB3885 is a 1-channel DC/DC converter IC using pulse width modulation (PWM) and synchronous rectification, designed for down conversion applications.
This device is a power supply with high output drive capacity. Synchronous rectification also provides for high
efficiency.
In addition, a 5 V regulator is built in to reduce the number of system components. The result is an ideal built-in
power supply for driving products with high speed CPU’s such as home TV game devices and notebook PC’s.
■ FEATURES
•
•
•
•
•
•
•
Synchronous rectification for high efficiency
Supply voltage range : 5.5 V to 18 V
Built-in high-precision reference voltage circuit : 2.5 V ± 1%
Error Amp. threshold voltage : 1.25 V ± 1% (0 °C to 85 °C)
Oscillator frequency range : 10 kHz to 500 kHz
Built-in soft start circuit with error Amp. input control
Totem pole type output for N-ch MOSFET
■ PACKAGE
20-pin Plastic SSOP
(FPT-20P-M03)
MB3885
■ PIN ASSIGNMENTS
(TOP VIEW)
N.C. : 1
20 : N.C.
N.C. : 2
19 : N.C.
CSCP : 3
18 : VREF
CT : 4
17 : SGND
RT : 5
16 : PGND
CS : 6
15 : OUT2
FB : 7
14 : VS
−INE : 8
13 : OUT1
+INE : 9
12 : CB
VCC : 10
11 : VB
(FPT-20P-M03)
2
MB3885
■ PIN DESCRIPTIONS
Pin No.
Symbol
I/O
Description
1
N.C.

No connection
2
N.C.

No connection
3
CSCP

Timer latch short protection capacitor connection terminal
4
CT

Triangular wave oscillator frequency setting capacitor connection terminal
5
RT

Triangular wave oscillator frequency setting resistor connection terminal
6
CS

Soft start capacitor connection terminal (Also used as output control)
7
FB
O
Error Amp. output terminal
8
−INE
I
Error Amp. inverted input terminal
9
+INC
I
Overvoltage comparator non-inverted input terminal
10
VCC

Reference voltage, control circuit power supply terminal
11
VB
O
Output circuit bias output terminal
12
CB

Output bootstrap terminal
Insert a capacitor between the CB and VS terminals, to bootstrap the IC internal output transistor.
13
OUT1
O
Totem pole output terminal (External main side FET gate drive)
14
VS

External main side FET source connection terminal
15
OUT2
O
Totem pole output terminal. (External synchronous rectifier side FET gate
drive)
16
PGND

Ground terminal
17
SGND

Ground terminal
18
VREF
O
Reference voltage output terminal
19
N.C.

No connection
20
N.C.

No connection
3
MB3885
■ BLOCK DIAGRAM
VCC
10
5 V Reg.
FB 7
11 VB
10 µA
12 CB
Error Amp.
−INE 8
PWM Comp.1
−
+
+
CS 6
+
+
−
DTC
1.25 V
OVP Comp.
13 OUT1
PWM Comp.2
+
+INC 9
Drive1
14 VS
+
−
VCC
1.47 V
−
Latch
R
Drive2
15 OUT2
16 PGND
SQ
SCP Comp.
1 µA
CSCP 3
1.9 V
−
+
1.3 V
2.1 V
bias
S
R
Latch
UVLO
OSC
4
CT
4
5
RT
bias
VCC
Ref
(2.5 V)
Power
18
VREF
17
SGND
MB3885
■ ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Conditions
Supply voltage
VCC

Boot voltage
VCB
Rating
Unit
Min.
Max.

20
V

25
V

120
mA
CB terminal

Output current
IO
Peak output current
IOP
Duty ≤ 5%
(t = 1 / fOSC × Duty)

800
mA
Power dissipation
PD
Ta ≤ +25 °C

555*
mW
−55
+125
°C
Storage temperature
Tstg

* : The package is mounted on the dual-sided epoxy board (10cm × 10cm).
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
5
MB3885
■ RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Conditions
Supply voltage
VCC
Boot voltage
Value
Unit
Min.
Typ.
Max.

5.5
12
18
V
VCB
CB terminal


23
V
Reference voltage output current
IOR
VREF terminal
−1

0
mA
Bias output current
IOB
VB terminal
−1

0
mA
VIN
−INE terminal
0

VCC − 1.8
V
VINC
+INC terminal
0

VCC
V
−100

100
mA
−700

700
mA
Input voltage

Output current
IO
Peak output current
IOP
Oscillator frequency
fOSC

10
200
500
kHz
Timing resistor
RT

6.8
10
12
kΩ
Timing capacitor
CT

150
470
15000
pF
Boot capacitor
CB


0.1
1.0
µF
Duty ≤ 5%
(t = 1 / fosc × Duty)
Reference voltage
output capacitor
CREF
VREF terminal

0.1
1.0
µF
Bias output capacitor
CVB
VB terminal
1.0
4.7
10
µF
Soft start capacitor
CS


0.1
1
µF
CSCP


0.01
0.1
µF
Ta

−30
+25
+85
°C
Short detection capacitor
Operating ambient temperature
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
6
MB3885
■ ELECTRICAL CHARACTERISTICS
(VCC = 12 V, VB = 0 mA, VREF = 0 mA, Ta = +25 °C)
Parameter
4.
Soft Start
Block
[CS]
5.
Short
Detection
Comparator
Block
[SCP]
6.
Triangular
Wave
Oscillator
Block
[OSC]
7.
Error Amp
Block
[Error Amp.]
Value
Unit
Min.
Typ.
Max.
2.475
2.500
2.525
V
18
Ta = +25 °C
∆VREF/
VREF
18
Ta = 0 °C to +85 °C

0.5*

%
Line
18
VCC = 5.5 V to 18 V

1
10
mV
Load
18
VREF = 0 mA to −1 mA

3
10
mV
Short output
current
Ios
18
VREF = 2 V
−28
−14
−7
mA
Output voltage
VB
11
4.95
5.05
5.15
V
Threshold
voltage
VTH
10
2.6
2.9
3.2
V
Hysteresis
width
VH
10


0.2*

V
VRST
10

1.7
2.1
2.5
V
Charge
current
ICS
6

−14
−10
−6
µA
Threshold
voltage
VTH
3

0.63
0.68
0.73
V
Input source
current
ICSCP
3

−1.4
−1.0
−0.6
µA
Short
detection time
tSCP
3
CSCP = 0.01 µF
4.5
6.8
12.2
ms
Oscillator
frequency
fOSC
4
RT = 10 kΩ, CT = 470 pF
170
190
210
kHz
∆fOSC/
fOSC
4
Ta = 0 °C to +85 °C

1*

%
VTH1
8
FB = 1.6 V,
Ta = +25 °C
1.241
1.2500
1.259
V
VTH2
8
FB = 1.6 V,
Ta = 0 °C to +85 °C
1.2375
1.2500
1.2625
V
Input bias
current
IB
8
−INE = 0 V
−200
−20

nA
Voltage gain
AV
7
DC
60
100

dB
1.
Reference
Input stability
Voltage Block
Load stability
[Ref]
3.
Undervoltage
Lockout
Circuit Block
[UVLO]
Conditions
VREF
Output voltage
2.
Bias Voltage
Block
[VB]
Symbol Pin No.
Reset voltage
Frequency
temperature
variation rate
Threshold
voltage

VCC =
* : Standard design value
(Continued)
7
MB3885
(VCC = 12 V, VB = 0 mA, VREF = 0 mA, Ta = +25 °C)
Parameter
Frequency
band width
7.
Error Amp
Block
[Error Amp.]
AV = 0 dB
Value
Unit
Min.
Typ.
Max.

800*

kHz
7
VFBH
7

2.2
2.5

V
VFBL
7


0.8
1.0
V
ISOURCE
7
FB = 1.6 V

−100
−45
µA
ISINK
7
FB = 1.6 V
1.5
9.0

mA
VTL
7
Duty cycle = 0%
1.2
1.3

V
VTH
7
Duty cycle = Dtr

1.81
2.0
V
Dtr
13
RT = 10 kΩ,
CT = 470 pF
85
90
95
%
ISOURCE1
13
Duty ≤ 5%
(t = 1 / fOSC × Duty)

−700*

mA
ISINK1
13
Duty ≤ 5%
(t = 1 / fOSC × Duty)

900*

mA
VOH1
13
OUT1 = −100 mA,
CB = 17 V, VS = 12 V
CB −
2.5
CB −
0.9

V
VOL1
13
OUT1 = 100 mA,
CB = 17 V, VS = 12 V

VS +
0.9
VS +
1.4
V
Output current ISOURCE2
(synchronous
rectifier side)
ISINK2
15
Duty ≤ 5%
(t = 1 / fOSC × Duty)

−750*

mA
15
Duty ≤ 5%
(t = 1 / fOSC × Duty)

900*

mA
Output voltage
(synchronous
rectifier side)
VOH2
15
OUT2 = −100 mA
2.5
4.1

V
VOL2
15
OUT2 = 100 mA

1.0
1.4
V
Diode voltage
VD
12
VB = 10 mA

0.9
1.1
V
Output voltage
Output source
current
8.
PWM
Comparator
Threshold
Block
voltage
[PWM Comp.1,
PWM Comp.2]
Maximum
duty cycle
Output current
(main side)
Output voltage
(main side)
10. Output
Block
[Drive]
Conditions
BW
Output sink
current
9.
Dead time
Adjustment
Block
[DTC]
Symbol Pin No.
* : Standard design value
(Continued)
8
MB3885
(Continued)
(VCC = 12 V, VB = 0 mA, VREF = 0 mA, Ta = +25 °C)
Parameter
Symbol Pin No.
tD1
10. Output
Block
[Drive]
13, 15
Dead time
tD2
11.
Overvoltage
Detection
Comparator
Block
[OVP]
12.
General
Conditions
Value
Unit
Min.
Typ.
Max.
RT = 10 kΩ, CT = 470 pF
OUT1 = OUT2 = OPEN,
VS = 0 V
OUT2 :
− OUT1 :
100
200

ns
RT = 10 kΩ, CT = 470 pF
OUT1 = OUT2 = OPEN,
VS = 0 V
OUT1 :
− OUT2 :
100
250

ns
Threshold
voltage
VTH
9
+INC =
1.44
1.47
1.50
V
Input bias
current
IB
9
+INC = 0 V
−200
−30

nA
Power supply
current
ICC
10

6.5
9.8
mA

9
MB3885
■ TYPICAL CHARACTERISTICS
Reference Voltage vs. Supply Voltage
Supply Current vs. Supply Voltage
5
10
Reference voltage VREF (V)
Supply current ICC (mA)
Ta = +25 °C
8
6
4
2
Ta = +25 °C
VREF = 0 mA
4
3
2
1
0
0
0
5
10
15
Supply voltage VCC (V)
0
20
5
10
15
Supply voltage VCC (V)
20
Reference Voltage vs. Ambient Temperature
Reference voltage ∆VREF (%)
2.0
VCC = 12 V
VREF = 0 mA
1.5
1.0
0.5
0.0
−0.5
−1.0
−1.5
−2.0
−40
−20
0
20
40
60
80
100
Triangular Wave Upper/Lower Limit Voltage vs.
Triangular Wave Oscillator Frequency
2.5
Ta = +25 °C
VCC = 12 V
CTL = 5 V
2.0
Upper
limit
1.5
1.0
0.5
1k
Lower
limit
10 k
100 k
1M
Triangular wave oscillator frequency fosc (Hz)
Triangular wave upper/lower limit voltage VCT (V)
Triangular wave upper/lower limit voltage VCT (V)
Ambient temperature Ta (°C)
Triangular Wave Upper/Lower Limit Voltage vs.
Ambient Temperature
2.5
VCC = 12 V
RT = 10 kΩ
CT = 470 pF
2.0
Upper
limit
1.5
Lower
limit
1.0
0.5
−40
−20
0
20
40
60
80
100
Ambient temperature Ta (°C)
(Continued)
10
MB3885
Triangular Wave Oscillator Frequency vs.
Timing Resistor
Triangular wave frequency fOSC (Hz)
10 M
Ta = +25 °C
VCC = 12 V
CTL = 5 V
RT = 10 kΩ
1M
100 k
10 k
1k
10
100
1000
10000
10 M
Ta = +25 °C
VCC = 12 V
CTL = 5 V
1M
CTL = 150 pF
100 k
CTL = 470 pF
10 k
CTL = 15000 pF
1k
100
1k
100000
10 k
Timing resistor RT (Ω)
Triangular Wave Oscillator Frequency vs.
Supply Voltage
Triangular Wave Oscillator Frequency vs.
Ambient Temperature
Triangular wave frequency fOSC (Hz)
Timing capacitor CT (pF)
250
Ta = +25 °C
RT = 10 kΩ
CT = 470 pF
240
230
220
210
200
190
180
170
160
150
0
5
10
15
Supply voltage VCC (V)
250
VCC = 12 V
RT = 10 kΩ
CT = 470 pF
240
230
220
210
200
190
180
170
160
150
−40
20
100 k
−20
0
20
40
60
Ambient temperature Ta (°C)
80
100
Error Amp Gain, Phase vs. Frequency
φ
20
0
AV
−20
180
90
0
−90
VCC = 12 V
Phase φ (deg.)
Ta = +25 °C
40
Gain AV (dB)
Triangular wave frequency fOSC (Hz)
Triangular wave frequency fOSC (Hz)
Triangular Wave Oscillator Frequency vs.
Timing Capacitor
240 kΩ
4.7 kΩ
−
+
2.4 kΩ
8
6
IN 10 µF
4.7 kΩ
1.5 V
−40
1k
−
+
+
1.25 V
7
OUT
Error Amp.
−180
10 k
100 k
1M
Frequency f (Hz)
10 M
(Continued)
11
MB3885
(Continued)
Power dissipation PD (mW)
Power Dissipation vs. Ambient Temperature
600
555
500
400
300
200
100
0
−40
12
−20
0
20
40
60
80
Ambient temperature Ta (°C)
100
MB3885
■ FUNCTION DESCRIPTION
1. DC/DC Converter Function
(1) Reference Voltage Block
The reference voltage circuit takes the voltage feed from the power supply terminal (pin 10) and generates a
temperature compensated reference voltage (2.5 V typ.) , for use as the reference voltage for the power supply
control unit.
Also, an external load current can be obtained from the power supply at the VREF terminal (pin 18) , up to a
maximum of 1 mA.
(2) Triangular Wave Oscillator Block
A triangular waveform with amplitude 1.3 V to 1.9 V can be generated by connecting a timing capacitor and
resistor to the CT terminal (pin 4) and RT terminal (pin 5) , respectively.
The triangular oscillator waveform can be input to the IC’s internal PWM comparator, as well as supplied externally
from the CT terminal.
(3) Error Amp Block (Error Amp.)
The error Amp. is an amplifier that detects the output voltage from the DC/DC converter and outputs a PWM
control signal. The error Amp. has a broad in-phase input voltage range of 0 to Vcc−1.8 V that can be easily set
by the external power supply.
In addition, an arbitrary loop gain can be set up by connecting a feedback resistor and capacitor between the
error Amp. output pin and inverter input pin, providing stable phase compensation to the system.
Also, power-on rush current can be prevented by connecting a soft start capacitor between the error Amp. noninverted input pins CS terminal (pin 6) . The soft start function operates with a stable soft start time that is not
dependent on the output load of the DC/DC converter.
(4) PWM Comparator Block (PWM Comp.)
This is a voltage - pulse width modulator that controls the output duty according to the input voltage.
Main side :
Turns the output FET on in the intervals in which the error Amp. output voltage
is higher than the triangular wave voltage.
Synchronous rectifier side : Turns the output FET on in the intervals in which the triangular wave voltage
the is lower than error Amp. voltage.
(5) Output Block
The output block has totem pole configuration on both the main side and synchronous rectifier side, and can
drive an external N-ch MOSFET.
Also, the high output drive capability (700 mA Max. : duty ≤ 5%) provides high gate-source capacitor, enabling
the use of low on-resistor FET devices.
13
MB3885
2. Control Functions
Output ON/OFF control is provided by using the CS terminal (pin 6) setting functions.
Output On/Off Setting Functions
CS terminal voltage level
Output state
GND
OFF
Hi-Z
ON
3. Protective Functions
(1) Timer Latch Short Circuit Protection (SCP)
The short circuit protection comparators read the output voltage levels. If the output voltage falls below the short
detection voltage, the timer circuit is activated to start charging the external capacitor Cscp connected to the
CSCP terminal (pin 3) .
When capacitor voltage reaches approximately 0.68 V the output FET turns off, setting the idle interval to 100%.
Once the protection circuit is activated, it can be reset by turning the power supply off and on again. (See “Setting
the Timer Latch Short Circuit Protector Time Constant.”)
(2) Undervoltage Lockout Circuit Block (UVLO)
Transient status during normal power-on or momentary drops in supply voltage can cause abnormal operation
in an control IC, leading to damage or degradation of system components. The undervoltage lockout circuit
prevents such abnormal operations by reading the internal reference voltage level and switching the output FET
off, setting the idle interval to 100% and holding the CSCP terminal (pin 3) to “L” level.
System operation is restored when the supply voltage rises back about the undervoltage lockout circuit threshold
voltage.
(3) Overvoltage Protection Block (OVP)
The overvoltage protection circuit uses an overvoltage comparator (OVP Comp.) to read the output voltage
levels from the DC/DC converter. If the output voltage exceeds the threshold voltage a latch is set, turning off
the main side FET.
Once the protector circuit is activated, it can be reset by switching the power supply off and on again.
14
MB3885
■ SETTING THE TIMER LATCH SHORT CIRCUIT PROTECTOR TIME CONSTANT
The error Amp. output level constantly compares operation with the short circuit protection comparator as the
reference voltage.
When the DC/DC comparator load conditions are stable, the short circuit protection comparator output is at “H”
level, transistor Q1 is on, and the CSCP terminal (pin 3) is held at input standby voltage
(VSTB : = 50 mV) .
If load conditions change rapidly, such as during a load short, causing output voltage to drop, the short circuit
protection comparator output goes to “L” level. This causes the transistor Q1 to shut off, charging the short circuit
protection capacitor Cscp (connected to the CSCP terminal) at 1 µA.
Short detection time
tscp (s) =: 0.68 × Cscp (µF)
When the capacitor Cscp is charted to the threshold voltage (VTH : = 0.68 V) a latch is set, turning the external
FET off (setting the idle interval to 100%) . At this time the latch input is closed and the CSCP terminal is held
at the input latch voltage (VI : = 50 mV) .
10 µA
FB
7
−INE
CS
−
+
+
8
Error
Amp.
Drive
13
OUT1
Drive
15
OUT2
6
1.25 V
CS
Q2
SCP Comp.
1 µA
−
+
CSCP
bias
3
S
CSCP
2.1 V
R
Latch
Q1
UVLO
Q4
< Timer Latch Short Circuit Protection Circuit >
15
MB3885
■ PROCESSING WITHOUT USING THE CSCP TERMINAL
When the timer latch short circuit protection circuit is not used, the CSCP terminal (pin 3) should be shorted to
SGND using the shortest possible connection.
17 SGND
CSCP 3
< Operation Without Using the CSCP Terminal >
16
MB3885
■ SOFT START TIME SETTING
The soft start function prevents rush current events when the IC power is turned on, by connecting soft start
capacitors (Cs) to the CS terminal (pin 6) .
When the IC is activated (Vcc ≥ UVLO threshold voltage) , Q2 is off and the CS terminals begin charging the
externally connected soft start capacitors (Cs) at 10 µA.
Because the error Amp. output (FB) is determined by the ratio of the lower of the two non-inverted input terminals
(1.25 V, CS terminal voltage) to the inverted input terminal voltage (−INE) , the soft start interval (when CS
terminal voltage < 1.25 V) FB is determined by the ratio of the −INE terminal voltage and CS terminal voltage.
Thus the DC/DC converter output voltage is in proportion to the rise in the CS terminal voltage as the soft start
capacitor connected to the CS terminal charges. The soft start time is determined by the following formula.
Soft start time (time to output 100%)
ts (s) =: 0.125 × Cs (µF)
CS terminal voltage
2.3 V
Error. amp block comparison voltage
to −INE voltage
1.25 V
0V
Soft start time ts
17
MB3885
VREF
10 µA
FB
7
−INE
8
CS
10 µA
−
+
+
Error
Amp.
6
1.25 V
CS
Q2
UVLO
< Soft Start Block
18
>
MB3885
■ PROCESSING WITHOUT USING THE CS TERMINALS
When the soft start function is not used, the CS terminal (pin 6) should be left open.
"Open"
CS
< Operation Without Soft Start Setting >
■ OSCILLATOR FREQUENCY SETTING
The oscillator frequency can be set by connecting a timing capacitor (CT) to the CT terminal (pin 4) and a timing
resistor (RT) to the RT terminal (pin 5) .
Oscillator frequency
893000
fosc (kHz) =: CT (pF) •RT (kΩ)
■ OUTPUT VOLTAGE SETTING
VO
FB
7
VO =
R1
−INE
8
R2
CS
−
+
+
Error
Amp.
1.25 V
R2
(R1 + R2)
6
1.25 V
19
MB3885
■ OVERVOLTAGE PROTECTION CIRCUIT VOTAGE SETTING
Overvoltage conditions in the DC/DC converter output voltage can be detected by connecting external resistance
from the DC/DC converter output voltage to the +INC terminal (pin 9) on the respective overvoltage protection
comparator circuits (OVP comp.) .
When the output voltage of the DC/DC converter rises above the detection voltage, the overvoltage protection
comparator (OVP Comp.) output goes to “H” level, setting a latch and shutting off.
Detection voltage
VOVP (V) =: 1.47 × (R3 + R4) /R4
Once the protection circuit has been activated, it can be reset by lowering the VCC voltage below the reset
voltage (1.7 V Min.) .
VO
VCC
R3
+INC1
R4
9
+
R
S
−
1.47 V
20
OVP
Comp.
Q
MB3885
■ PRECAUTIONS RELATED TO SUPPLY VOLTAGE RANGE
Although the supply voltage range listed under recommended operating requirements is 5.5V-18V, generation
of heat limits the maximum operating supply voltage since the IC’s internal loss varies with the frequency of
oscillation and FET’s total gate charge. When using the MB 3885 in an application, caution must be taken in
relation to supply voltage range.
As shown below, IB (average current) can be determined from the total gate charge Qg1, Qg2, charged from the
gate capacitance (Ciss1, Ciss2, Crss1, Crss2) of the external FET Q1, Q2, by the following formula.
IB (A) = I1 + I2
= Ibias1 ×
T1
Qg1
T2
Qg2
+
+ Ibias2 ×
+
T
T
T
T
(Ibias1 = Ibias2 =: 2 mA)
Because IC current consumption other than IB is 6.5 mA, power consumption can be determined from the
following formula.
Power consumption : Pc
Pc (W) =: 0.0065 × VCC + VCC × IB − 1 / 2 × VB × IB
21
MB3885
Vin
VCC
10
IB
5V
11
12
VB
CVB
A
CB
L1
Q1
I1
Drive
1
13
14
I2
OUT1
VO1
Crss2
Crss1
Q2
Ciss1
VS
Ciss2
Drive
2
15
16
OUT2
PGND
T
VOUT1
VOUT2
I1
Bias current
Ibias1 2 mA
T1
I2
Bias current
Ibias2 2 mA
T2
t
Using the above formulas to determine power consumption, settings should be made with reference to the “Power
Consumption vs. Input Voltage” on the following page, as well as the “Power dissipation vs. Ambient Temperature.”
22
MB3885
Power Consumption vs. Input Voltage (Qg Parameters)
Power consumption PC (W)
1.00
0.90
0.80
Ta = +25 °C
fOSC = 200 kHz
SW1 = OFF
0.70
0.60
Qg1 = Qg2 = 70 nC
0.50
Qg1 = Qg2 = 50 nC
0.40
Qg1 = Qg2 = 30 nC
Qg1 = Qg2 = 20 nC
Qg1 = Qg2 = 10 nC
0.30
0.20
0.10
0.00
5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
Input voltage Vin (V)
Power Consumption vs. Input Voltage (fosc Parameters)
Power consumption PC (W)
1.00
0.90
0.80
Ta = +25 °C
Qg1 = Qg2 = 20 nC
SW1 = OFF
0.70
0.60
0.50
fOSC = 500 kHz
0.40
fOSC = 300 kHz
fOSC = 200 kHz
fOSC = 100 kHz
fOSC = 10 kHz
0.30
0.20
0.10
0.00
5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
Input voltage Vin (V)
23
24
VCC
10
VB
5 V Reg.
11
D2
FB
A
Output
On/Off
signal
SW1
C3
0.022 µF
R1
R6
2 kΩ 2.7 kΩ −INE
10 µA
+INC
6.2 kΩ
1.25 V
9
R5
10 kΩ
−
−
1 µA
+
VS
14
15
Drive2
C5
0.01 µF
3
1.9 V
1.3 V
bias
S
R
Latch
L1
2.7 µH
C1 +
22 µF
bias
UVLO
Ref
(2.5 V) Power
OSC
4
CT
C6
470 pF
VCC
5
RT
18
17
VREF
SGND
R7
10 kΩ
C7
0.1 µF
C10 +
C2
0.1 µF
Q2
OUT2
PGND
16
2.1 V
CSCP
Vo (2 V)
13
Drive1
+
−
A
OUT1
PWM
Comp.2
+
Latch
VCC
R
SQ
1.47 V
C9
0.1 µF
Q1
+
+
−
DTC
OVP
Comp.
SCP Comp.
C8
CB 4.7 µF
PWM Comp.1
−
+
+
R2
3.3 kΩ 0.1 µF
R4
12
Error Amp.
8
CS
6
C4
R3
10 kΩ
7
D1
68 µF
×3
C11
2.2 µF
MB3885
■ APPLICATION CIRCUIT
C12
0.1 µF
Vin
MB3885
■ COMPONENT LIST
COMPONENT
ITEM
SPECIFICATION
VENDOR
PARTS No.
Q1, Q2
FET
VDS = 30 V, Qg = 23 nC (Max.)
IR
IRF7811
D1
D2
Diode
Diode
VF = 0.35 V (Max.) , at IF = 1 A
VF = 0.3 V (Max.) , at IF = 10 mA
ROHM
ROHM
RB051L-40
RB495D
L1
Coil
2.7 µH
12 A, 4.5 mΩ
TDK
RLF12545T
-2R7N8R7
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
OS Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Electrolytic Condenser
Ceramics Condenser
Ceramics Condenser
22 µF
0.1 µF
0.022 µF
0.1 µF
0.01 µF
470 pF
0.1 µF
4.7 µF
0.1 µF
68 µF
2.2 µF
0.1 µF
25 V
25 V
25 V
25 V
10 V
50 V
25 V
10 V
25 V
6.3 V
6.3 V
25 V


R1
R2
R3
R4
R5
R6
R7
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
2 kΩ
3.3 kΩ
10 kΩ
6.2 kΩ
10 kΩ
2.7 kΩ
10 kΩ
1/4 W
1/4 W
1/4 W
1/4 W
1/4 W
1/4 W
1/4 W


Notes : IR : International Rectifier Corp.
ROHM : Rohm, Ltd.
TDK : TDK, Ltd.
25
MB3885
■ REFERENCE DATA
Conversion Efficiency vs. Load Current Characteristics
100
Ta = +25 °C
2 V output
SW1 = OFF
Conversion efficiency η (%)
95
90
Vin = 6 V
85
Vin = 8.5 V
Vin = 10 V
80
75
70
0
1
2
3
4
5
6
Load current IL (A)
26
7
8
9
10
MB3885
■ PRECAUTIONARY INFORMATION
• Printed circuit board ground lines should be designed with consideration for common impedance.
•
•
•
•
•
Take sufficient countermeasures should be taken to protect against static electricity.
Always place semiconductors in containers that have anti-static provisions, or are conductive.
After mounting, PC boards should be placed in conductive bags or containers for storage and handling.
Working surfaces, tools, and measurement equipment should be grounded.
Persons handling semiconductors should be grounded directly with resistance of 250 kΩ to 1 MΩ.
• Do not apply negative voltages.
• Application of negative voltage of −0.3 V or greater can create parasitic transistor effects on an LSI device,
leading to abnormal operation.
■ ORDERING INFORMATION
Part Number
MB3885PFV
Package
Remarks
Plastic SSOP 20-pin
(FPT-20P-M03)
27
MB3885
■ PACKAGE DIMENSION
20-pin, Plastic SSOP
(FPT-20P-M03)
* Dimensions include resin remainder.
* 6.50±0.10(.256±.004)
0.17±0.03
(.007±.001)
11
20
* 4.40±0.10
6.40±0.20
(.173±.004) (.252±.008)
INDEX
Details of "A" part
+0.20
1.25 –0.10
+.008
.049 –.004
LEAD No.
1
10
0.65(.026)
"A"
0.24±0.08
(.009±.003)
0.10(.004)
C
(Mounting height)
0.13(.005)
M
0~8°
0.50±0.20
(.020±.008)
0.45/0.75
(.018/.030)
0.10±0.10
(Stand off)
(.004±.004)
0.25(.010)
1999 FUJITSU LIMITED F20012S-3C-5
Dimensions in mm (inches) .
28
MB3885
FUJITSU LIMITED
For further information please contact:
Japan
FUJITSU LIMITED
Corporate Global Business Support Division
Electronic Devices
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Tel: +81-3-5322-3347
Fax: +81-3-5322-3386
http://edevice.fujitsu.com/
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San Jose, CA 95134-1804, U.S.A.
Tel: +1-408-922-9000
Fax: +1-408-922-9179
Customer Response Center
Mon. - Fri.: 7 am - 5 pm (PST)
Tel: +1-800-866-8608
Fax: +1-408-922-9179
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D-63303 Dreieich-Buchschlag,
Germany
Tel: +49-6103-690-0
Fax: +49-6103-690-122
http://www.fujitsu-fme.com/
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#05-08, 151 Lorong Chuan,
New Tech Park,
Singapore 556741
Tel: +65-281-0770
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Korea
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Kangnam-Gu,Seoul 135-280
Korea
Tel: +82-2-3484-7100
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F0011
 FUJITSU LIMITED Printed in Japan
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with FUJITSU sales
representatives before ordering.
The information and circuit diagrams in this document are
presented as examples of semiconductor device applications, and
are not intended to be incorporated in devices for actual use. Also,
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of this information or circuit diagrams.
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equipments, industrial, communications, and measurement
equipments, personal or household devices, etc.).
CAUTION:
Customers considering the use of our products in special
applications where failure or abnormal operation may directly
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where extremely high levels of reliability are demanded (such as
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are requested to consult with FUJITSU sales representatives before
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by incorporating safety design measures into your facility and
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