FUJITSU SEMICONDUCTOR DATA SHEET DS04-28319-2E ASSP CMOS 50 MSPS 3ch 8-bit D/A Converter MB40C958V ■ DESCRIPTION The MB40C958V is a high-speed CMOS process based D/A converter provided with the three-channel I/O for RGB, allowing for independent control of the three channels. ■ FEATURES • • • • • • • • • • Resolution Linearity error Differential linearity error Maximum conversion rate Supply voltage Digital input voltage range Analog output voltage range Dissipation power Additional capabilities Package : : : : : : : : : : 8 bits ±0.5 LSB (max) ±1.0 LSB (max) 50 MSPS (min) single +5 V TTL level 2 Vp-p (0 to 2 V) 220 mW (standard: analog output for RL = 200 Ω, 2 Vp-p output) Reference voltage generator, power saving function, independent 3-ch VREF LQFP48 ■ PACKAGE 48-pin Plastic LQFP (FPT-48P-M05) MB40C958V 2 DVDD CE AVDD ROUT AVSS GOUT AVSS BOUT AVDD GIREF GVB GVRIN 48 47 46 45 44 43 42 41 40 39 38 37 ■ PIN ASSIGNMENT RVRIN 1 36 VROUT RIREF 2 35 BVRIN RVB 3 34 BIREF (LSB) R0 4 33 BVB R1 5 32 VA R2 6 31 DVSS R3 7 30 BCLK R4 8 29 GCLK R5 9 28 RCLK R6 10 27 B7 (MSB) (MSB) R7 11 26 B6 (LSB) G0 12 25 B5 13 14 15 16 17 18 19 20 21 22 23 24 G1 G2 G3 G4 G5 G6 (MSB) G7 (LSB) B0 B1 B2 B3 B4 (TOP VIEW) MB40C958V ■ PIN DESCRIPTION Pin No. Symbol I/O Description 4 to 11 12 to 19 20 to 27 R0 to R7 G0 to G7 B0 to B7 I Data signal incoming terminal for Rch, Gch and Bch LSB: R0, G0, B0 MSB: R7, G7,B7 28 29 30 RCLK GCLK BCLK I Clock signal incoming terminal for Rch, Gch and Bch (TTL compatible) 47 CE I Power saving signal incoming terminal. Power saving enabled for High 48 DVDD — Digital power supply terminal (standard 5 V) 40, 46 AVDD — Analog power supply terminal (standard 5 V) 31 DVSS — Digital ground terminal 42, 44 AVSS — Analog ground terminal 36 VROUT O Rererence voltage output terminal (standard: 2 V) 1 37 35 RVRIN GVRIN BVRIN I Reference voltage incoming terminal for Rch, Gch and Bch (standard: 2 V) 2 39 34 RIREF GIREF BIREF — Reference resistor connection terminal for Rch, Gch and Bch 3 38 33 RVB GVB BVB — Connect >0.1 µF capacitor to the AVDD terminal 32 VA — Connect >0.1 µF capacitor to the AVSS terminal 45 43 41 ROUT GOUT BOUT O Analog signal output terminals for Rch, Gch and Bch 3 MB40C958V ■ BLOCK DIAGRAM RCLK R0 to R7 Decorder and latch circuit ROUT Current cell RVB Reference current generator circuit GCLK G0 to G7 Decorder and latch circuit Current cell RVRIN RIREF GOUT GVB BCLK B0 to B7 Reference current generator circuit Decorder and latch circuit Current cell GVRIN GIREF BOUT BVB CE Reference current generator circuit AVDD DVDD REF circuit AVSS Reference voltage generator circuit DVSS VROUT VA 4 BVRIN BIREF MB40C958V ■ ABSOLUTE MAXIMUM RATINGS Parameter Symbol Rating Min. Max. Unit Power supply voltage VDD –0.3 +7.0 V Digital input voltage VID –0.3 VDD+0.3 V Analog output voltage VO –0.3 VDD+0.3 V Analog output current IO 0 12 mA Storage temperature Tstg –55 +125 °C WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. ■ RECOMMENDED OPERATING CONDITIONS Parameter Symbol Value Min. Typ. Max. Unit Analog power supply voltage AVDD 4.75 5.0 5.25 V Digital power supply voltage DVDD 4.75 5.0 5.25 V AVDD – DVDD –0.2 — 0.2 V VRIN 1.0 2.0 2.2 V IFS 0 — 12 mA Full-scale output voltage* VFS — 2.0 2.3 V Digital “H” level input voltage VIHD 2.4 — DVDD V Digital “L” level input voltage VILD 0 — 0.5 V Clock frequency fCLK — — 50 MHz Setup time ts 6 — — ns Hold time th 3 — — ns “H” level minimum pulse width tWH 6.5 — — ns “L” level minimum pulse width tWL 6.5 — — ns Operating ambient temperature Top –20 — +85 °C Power supply voltage difference Reference input voltage Full-scale current*1 2 *1: IFS = VRIN/RREF × 15.9 *2: VFS = IFS × RL WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within the recommended operating conditions. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. 5 MB40C958V ■ ELECTRICAL CHARACTERISTICS 1. DC Characteristics (AVDD = DVDD = 4.75 V to 5.25 V, VRIN = 2 V, RREF = 3.3 kΩ, RL = 200 Ω, Ta = –20°C to +85°C) Parameter Symbol Condition Resolution — — Linearity error LE Differential linearity error DLE DC Accuracy Value Unit Min. Typ. Max. — 8 — bit — — ±0.5 LSB — — ±1.0 LSB IID — –5 — 5 µA Reference output voltage VROUT AVDD = DVDD = 5.00 V 1.95 2.0 2.05 V Full-scale output voltage VOFS — 1.85 1.94 2.03 V Zero-scale output voltage VOZS — 0 — 10 mV Analog power supply current AIDD — — 30 35 mA Digital power supply current DIDD — — 13 20 mA Digital input current 2. AC Characteristics (AVDD = DVDD = 4.75 V to 5.25 V, VRIN = 2 V, RREF = 3.3 kΩ, RL = 200 Ω, CL = 15 pF, Ta = –20°C to +85°C) Parameter Condition Value Min. Typ. Max. Unit Maximum conversion rate fS 50 — — MSPS Output propagation delay time tpd — 10 — ns Output rising time tr — 11 — ns Output falling time tf — 11 — ns tset — 30 — ns Setting time 6 Symbol — MB40C958V ■ EQUIVALENT CIRCUIT • Digital input DVDD AVDD R0 to R7 G0 to G7 B0 to B7 RCLK GCLK BCLK CE DVSS AVSS • Reference voltage input AVDD RVRIN GVRIN BVRIN − + AVDD AVSS RIREF GIREF BIREF RVB GVB BVB AVSS • VA pin DVDD Current cell DVDD VA REF circuit DVSS 7 MB40C958V • Analog output AVDD AVDD ROUT GOUT BOUT AVSS • Reference voltage output AVDD 30 kΩ VROUT 20 kΩ AVSS 8 MB40C958V ■ TIMING DIAGRAM ts th 1.5 V Data input twH twL CLK input 1.5 V ±1/2LSB 90% 90% Analog output 50% 50% 10% 10% ±1/2LSB VOZS tf tr tset tset tpd tpd 9 MB40C958V ■ TYPICAL APPLICATION +5 V +5 V AVDD DVDD 0.1 µF 0.1 µF 0.1 µF RVB RCLK R0 to R7 RVRIN RCLK 8 +2 V Rout R0 to R7 0 to 2 V(2 VP−P) RIREF RL RREF 200 Ω 3.3 kΩ 0.1 µF GVB GCLK G0 to G7 8 +2 V GVRIN GCLK Gout 0 to 2 V(2 VP−P) G0 to G7 GIREF RL RREF 200 Ω 3.3 kΩ 0.1 µF BVB BCLK B0 to B7 BCLK 8 BVRIN +2 V Bout B0 to B7 0 to 2 V(2 VP−P) BIREF RL RREF 3.3 kΩ VA CE 0.1 µF DVSS AVSS VROUT 10 200 Ω MB40C958V ■ ORDERING INFORMATION Part number MB40C958VPFV Package Remarks 48-pin Plastic LQFP (FPT-48P-M05) 11 MB40C958V ■ PACKAGE DIMENSION 48-pin Plastic LQFP (FPT-48P-M05) +0.20 1.50 −0.10 9.00±0.20(.354±.008)SQ +.008 7.00±0.10(.276±.004)SQ 36 (Mounting height) .059 −.004 25 37 24 5.50 (.217) REF 8.00 (.315) NOM INDEX Details of "A" part 48 13 1 12 "A" LEAD No. 0.50±0.08 (.0197±.0031) +0.08 0.18 −0.03 +.003 .007 −.001 +0.05 0.127 −0.02 +.002 .005 −.001 0.10±0.10 (STAND OFF) (.004±.004) 0.50±0.20 (.020±.008) 0.10(.004) C 12 1995 FUJITSU LIMITED F48013S-2C-5 0 10˚ Dimensions in mm (inches). MB40C958V FUJITSU LIMITED For further information please contact: Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 4-1-1, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211-8588, Japan Tel: 81(44) 754-3763 Fax: 81(44) 754-3329 http://www.fujitsu.co.jp/ North and South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division 3545 North First Street San Jose, CA 95134-1804, USA Tel: (408) 922-9000 Fax: (408) 922-9179 Customer Response Center Mon. - Fri.: 7 am - 5 pm (PST) Tel: (800) 866-8608 Fax: (408) 922-9179 http://www.fujitsumicro.com/ Europe FUJITSU MIKROELEKTRONIK GmbH Am Siebenstein 6-10 D-63303 Dreieich-Buchschlag Germany Tel: (06103) 690-0 Fax: (06103) 690-122 http://www.fujitsu-ede.com/ Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE LTD #05-08, 151 Lorong Chuan New Tech Park Singapore 556741 Tel: (65) 281-0770 Fax: (65) 281-0220 All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. FUJITSU semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.). CAUTION: Customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with FUJITSU sales representatives before such use. The company will not be responsible for damages arising from such use without prior approval. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan. http://www.fmap.com.sg/ F9809 FUJITSU LIMITED Printed in Japan 13