Product Profile MB86619 IEEE 1394 Serial Bus Controller for DTV September 2002 Edition 1.00 FME/MM/PP/0902 OVERVIEW The MB86619 is one member of Fujitsu’s 1394 serial bus controller family, compliant with IEEE1394 standard (IEEE Std 1394-1995, 1394a-2000). This controller has two exclusive ports for isochronous transfer (MPEG-TS, DV) and three ports for 1394 network including differential transceivers and compurgators. The MB86619 integrates PHY layer, LINK layer and copy protection part (DTCP) supporting 400Mbps data transfer rate. This level of integration let this device aim a significant reduction of board mounting space and power consumption. FEATURES • • • • • • • • • • • • • • • • • Compliant with IEEE1394-1995 and 1394.a-2000 high speed serial bus standard Integrate PHY layer and the LINK layer in the single-chip Three 1394 cable ports Transfer data rate: S100, S200 and S400 Supports AV protocol (IEC1883 Part1-7: MPEG-TS, DSS, DV, Audio) Supports SBP-2 protocol with read/write chain transfer mode Supports Asynchronous serial bus connection Isochronous transmit/receive FIFO is 4Kbytes* 2 channels Asynchronous transmit/receive FIFO is 512 bytes Asynchronous extended transmit/receive FIFO is 2Kbytes Automatic separation and picketing for the Isochronous packet header and data Two exclusive ports for Isochronous transfer (8 bit bus) IEC60958 and three line type input-output port for the audio data transfer. Integrate copy protect function compliant with DTCP 16bits MPU/DMA common or separate bus interlace Power-supply voltage 3.3V for IO and 2.5V for internal logic Package LQFP-176 (FPT-176P-M03) Copyright © 2002 Fujitsu Microelectronics Europe GmbH Page 1 of 2 Disclaimer: The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering.The information and circuit diagrams in this document are presented “as is”, no license is granted by implication or otherwise. September 2002 Edition 1.00 FME/MM/PP/0902 MB86619 IEEE 1394 Serial Bus Controller for DTV MB86619 MPU/DMA I/F Asynchronous Transmit data FIFO(512B) Asynchronous Receive data FIFO(512B) TPA0 Transmission / Receive Packet Process 1394 I/F port 0 TPA0 TPB0 TPB0 TPBIAS0 TPA1 Audio I/F FIFO(2048B) PHY/LINK layer control FIFO(2048B) 1394 I/F port 1 TPA1 TPB1 TPB1 TPBIAS1 TSP - IC I/F B port TPA2 Bridge - Bch TSP - IC I/F A port 1394 I/F port 2 Bridge - Ach TPA2 TPB2 TPB2 TPBIAS2 FIFO(2048B) DTCP FIFO(2048B) Block Diagramm Contact Information Email: [email protected] Worldwide Headquarters Japan Tel: +81 3 5322 3347 Fax: +81 3 5322 3386 Asia Fujitsu Limited Corporate Global Business Support Division Electronic Devices ShinjukuDai-Ichi Seimei Bldg.7-1 Nishinjuku 2-chome, Shinjuku-ku Tokyo 163-0721 Japan Tel: +65 281 0770 Fax: +65 281 0220 Fujitsu Microelectronics Asia PTE Limited #05-08, 151 Lorong Chauan New Tech Park Singapore 556741 http://www.fujitsu.com/ http://www.fmal.fujitsu.com/ USA Europe Tel: +1 408 922 9000 Fax: +1 408 922 9179 Fujitsu Microelectronics Inc. 3545 North First Street San Jose CA 95134-1804 USA Tel: +1 800 866 8608 Fax: +1 408 922 9179 Customer Response Center Mon-Fri: 7am-5pm (PST) http://www.fma.fujitsu.com/ Tel: +49 6103 6900 Fax: +49 6103 690122 Fujitsu Microelectronics Europe GmbH Am Siebenstein 6-10 D-63303 Dreieich-Buchschlag Germany http://www.fme.fujitsu.com/ FME/MM/PP/0902 1.00 Page 2 of 2 Copyright © 2002 Fujitsu Microelectronics Europe GmbH Disclaimer: The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering.The information and circuit diagrams in this document are presented “as is”, no license is granted by implication or otherwise.