Maxim MAX5921EESA -48v hot-swap controllers with external rsense and high gate pulldown current Datasheet

19-2946; Rev 0; 9/03
-48V Hot-Swap Controllers with External
RSENSE and High Gate Pulldown Current
Features
♦ Allows Safe Board Insertion and Removal
from a Live -48V Backplane
The MAX5921/MAX5939 provide a controlled turn-on to
circuit cards preventing damage to board connectors,
board components, and preventing glitches on the
power-supply rail. The MAX5921/MAX5939 provide
undervoltage, overvoltage, and overcurrent protection.
These devices ensure that the input voltage is stable
and within tolerance before applying power to the load.
Both the MAX5921 and MAX5939 protect a system
against overcurrent and short-circuit conditions by turning off the external MOSFET in the event of a fault condition. The MAX5921/MAX5939 protect against input
voltage steps by limiting the load current to a safe level
without turning off power to the load.
♦ 450mA GATE Pulldown Current During ShortCircuit Condition
The device features an open-drain power-good status
output, PWRGD or PWRGD for enabling downstream
converters (see Selector Guide). A built-in thermal shutdown feature is also included to protect the external
MOSFET in case of overheating. The MAX5939 features
a latched fault output. The MAX5921 contains built-in
autoretry circuitry after a fault condition.
The MAX5921/MAX5939 are available in an 8-pin SO
package and operate in the extended -40°C to +85°C
temperature range.
Applications
Telecom Line Cards
Network Switches/Routers
♦ Pin-Compatible with LT1640 and LT4250
♦ Circuit Breaker Immunity to Input Voltage Steps
and Current Spikes
♦ Exponential GATE Pulldown Current
♦ Withstands -100V Input Transients with No
External Components
♦ Programmable Inrush and Short-Circuit Current
Limits
♦ Operates from -20V to -80V
♦ Programmable Overvoltage Protection
♦ Programmable Undervoltage Lockout
with Built-In Glitch Filter
♦ Overcurrent Fault Integrator
♦ Powers Up into a Shorted Load
♦ Power-Good Control Output
♦ Thermal Shutdown Protects External MOSFET
Ordering Information
TEMP RANGE
PIN-PACKAGE
MAX5921AESA
PART
-40°C to +85°C
8 SO
MAX5921BESA
-40°C to +85°C
8 SO
Ordering Information continued at end of data sheet.
Central-Office Line Cards
Server Line Cards
Pin Configuration
Base-Station Line Cards
TOP VIEW
Typical Operating Circuit and Selector Guide appear at end
of data sheet.
PWRGD
(PWRGD)
1
OV
2
UV
3
MAX5921
MAX5939
VEE 4
8
VDD
7
DRAIN
6
GATE
5
SENSE
SO
() FOR MAX5921B/F AND MAX5939B/F.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX5921/MAX5939
General Description
The MAX5921/MAX5939 hot-swap controllers allow a circuit card to be safely hot plugged into a live backplane.
The MAX5921/MAX5939 operate from -20V to -80V and
are well suited for -48V power systems. These devices
are pin compatible with both the LT1640 and LT4250 and
provide improved features over these devices.
MAX5921/MAX5939
-48V Hot-Swap Controllers with External
RSENSE and High Gate Pulldown Current
ABSOLUTE MAXIMUM RATINGS
All Voltages Are Referenced to VEE, Unless Otherwise Noted
Supply Voltage (VDD - VEE )................................-0.3V to +100V
DRAIN, PWRGD, PWRGD ....................................-0.3V to +100V
PWRGD to DRAIN .............................................… -0.3V to +95V
PWRGD to VDD .......................................................-95V to +85V
SENSE (Internally Clamped) .................................-0.3V to +1.0V
GATE (Internally Clamped) ....................................-0.3V to +18V
UV and OV..............................................................-0.3V to +60V
Current into SENSE...........................................................+40mA
Current into GATE...........................................................+300mA
Current into Any Other Pin................................................+20mA
Continuous Power Dissipation (TA = +70°C)
8-Pin SO (derate 5.9mW/°C above +70°C)..................471mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature .....................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VEE = 0V, VDD = 48V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C, unless otherwise noted.) (Notes 1, 4)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
80
V
0.7
2
mA
POWER SUPPLIES
Operating Input Voltage Range
VDD
Supply Current
IDD
20
Current into VDD with UV = 3V, OV, DRAIN,
SENSE = VEE, GATE = floating
GATE DRIVER AND CLAMPING CIRCUITS
Gate Pullup Current
IPU
GATE drive on, VGATE = VEE
-30
-45
-60
µA
Gate Pulldown Current
IPD
VSENSE - VEE = 100mV, VGATE = 2V (Note 2)
24
50
70
mA
∆VGATE
VGATE - VEE, steady state, 20V ≤ VDD ≤ 80V
10
13.5
18
V
VGATE - VEE, IGS = 30mA
15
16.4
18
V
External Gate Drive
GATE to VEE Clamp Voltage
VGSCLMP
CIRCUIT BREAKER
Current-Limit Trip Voltage
VCL = VSENSE - VEE
40
50
60
mV
ISENSE
VSENSE = 50mV
-1
-0.2
0
µA
Supply Internal Undervoltage
Lockout Voltage High
VUVLOH
VDD increasing
13.8
15.4
17.0
V
Supply Internal Undervoltage
Lockout Voltage Low
VUVLOL
VDD decreasing
11.8
13.4
15.0
V
V
SENSE Input Current
VCL
UNDERVOLTAGE LOCKOUT
UV INPUT
UV High Threshold
VUVH
UV voltage increasing
1.240
1.255
1.270
UV Low Threshold
VUVL
UV voltage decreasing
1.105
1.125
1.145
UV Hysteresis
UV Input Current
VUVHY
130
IINUV
UV = VEE
-0.5
VOVH
OV voltage rising
1.235
VOVL
OV voltage decreasing
1.189
V
mV
0
µA
1.255
1.275
V
1.205
1.221
OV INPUT
OV High Threshold
OV Low Threshold
OV Voltage Reference Hysteresis
OV Input Current
2
VOVHY
IINOV
50
OV = VEE
-0.5
_______________________________________________________________________________________
V
mV
0
µA
-48V Hot-Swap Controllers with External
RSENSE and High Gate Pulldown Current
(VEE = 0V, VDD = 48V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C, unless otherwise noted.) (Notes 1, 4)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
VDRAIN = 48V
10
80
250
µA
1.1
1.7
2.0
V
1.0
1.6
2.0
V
PWRGD OUTPUT SIGNAL (REFERENCED TO DRAIN)
DRAIN Input Current
IDRAIN
DRAIN Threshold for PWRGD
VDL
VDRAIN - VEE threshold for power-good
condition, DRAIN decreasing
GATE High Threshold
VGH
∆VGATE - VGATE, decreasing
V PWRGD = 80V, VDRAIN = 48V
10
VPWRGD = 80V, VDRAIN = 0V
10
PWRGD, PWRGD Output
Leakage
IOH
PWRGD Low Voltage
(V PWRGD - VEE)
VOL
VDRAIN - VEE < VDL, ISINK = 5mA
(A, E versions)
0.11
0.4
V
PWRGD Low Voltage
(VPWRGD - VDRAIN)
VOL
VDRAIN = 5V, ISINK = 5mA (B, F versions)
0.11
0.4
V
Overtemperature Threshold
TOT(TH)
Junction temperature, temperature rising
135
°C
Overtemperature Hysteresis
THYS
See Thermal Shutdown section
20
°C
tPHLOV
Figures 1a, 2
0.5
µs
UV Low to GATE Low
tPHLUV
Figures 1a, 3
0.4
µs
OV Low to GATE High
tPLHOV
Figures 1a, 2
3.3
µs
UV High to GATE High
tPLHUV
Figures 1a, 3
8.4
ms
tPHLSENSE
Figures 1a, 4a
1
µs
µA
OVERTEMPERATURE PROTECTION
AC PARAMETERS
OV High to GATE Low
SENSE High to GATE Low
Current Limit to GATE Low
tPHLCL
DRAIN Low to PWRGD Low
DRAIN Low to (PWRGD - DRAIN)
High
tPHLDL
GATE High to PWRGD Low
GATE High to (PWRGD - DRAIN)
High
tPHLGH
Time from continuous
A, B versions
current limit to GATE
shutdown (see Overcurrent
Fault Integrator section),
E, F versions
Figures 1b, 4b
0.35
0.5
0.65
ms
1.4
2.0
Figures 1a, 5a; A and E versions
8.2
Figures 1a, 5a; B and F versions
8.2
Figures 1a, 5b; A and E versions
8.2
Figures 1a, 5b; B and F versions
8.2
2.6
ms
ms
TURN-OFF
Latch-Off Period
Note 1:
Note 2:
Note 3:
Note 4:
tOFF
(Note 3)
A, B, E, F versions
128 x
tPHLCL
ms
All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to VEE,
unless otherwise specified.
Gate pulldown current after the current limit to GATE low (tPHLCL) time has elapsed.
Minimum duration of GATE pulldown following a circuit breaker fault. The MAX5921_ automatically restarts after a circuit
breaker fault. The MAX5939_ is latched off and can be reset by toggling UV low. The GATE pulldown does not release until
tOFF has elapsed.
The min/max limits are 100% production tested at +25°C and +85°C and guaranteed by design at -40°C.
_______________________________________________________________________________________
3
MAX5921/MAX5939
ELECTRICAL CHARACTERISTICS (continued)
Typical Operating Characteristics
(VDD = +48V, VEE = 0V, TA = +25°C, unless otherwise noted.)
TA = +25°C
TA = +85°C
500
TA = +25°C
400
TA = -40°C
300
12
11
10
200
9
100
8
0
7
40
60
80
54
52
50
48
46
44
42
40
0
20
40
60
80
100
-40
-15
10
35
60
85
GATE PULLUP CURRENT
vs. TEMPERATURE
GATE PULLDOWN CURRENT
vs. TEMPERATURE AFTER A FAULT
GATE PULLDOWN CURRENT
vs. OVERDRIVE DURING A CURRENT FAULT
44.4
44.2
44.0
43.8
43.6
43.4
VGATE = 2V
65
60
55
50
45
40
35
90
GATE PULLDOWN CURRENT (mA)
44.6
70
MAX5921TOC06
TEMPERATURE (°C)
MAX5921TOC05
SUPPLY VOLTAGE (V)
VGATE = 2V
75
60
45
30
15
30
43.2
43.0
25
-40
-15
10
35
60
0
-40
85
-15
10
35
60
85
0
20
40
60
80
100
GATE PULLDOWN CURRENT
vs. OVERDRIVE DURING A SHORT CIRCUIT
PWRGD OUTPUT LOW VOLTAGE
vs. TEMPERATURE (MAX5921A)
PWRGD OUTPUT LEAKAGE CURRENT
vs. TEMPERATURE (MAX5921B)
300
200
100
IOUT = 5mA
160
140
120
100
80
60
40
20
0
0
600
750
900
OVERDRIVE (mV)
1050
1200
100
PWRGD OUTPUT LEAKAGE CURRENT (nA)
400
180
PWRGD OUTPUT LOW VOLTAGE (mV)
VGATE = 2V
MAX5921TOC09
OVERDRIVE (mV)
MAX5921TOC08
TEMPERATURE (°C)
MAX5921TOC07
TEMPERATURE (°C)
500
4
56
SUPPLY VOLTAGE (V)
VGATE = 0V
44.8
100
GATE PULLDOWN CURRENT (mA)
45.0
20
58
TRIP VOLTAGE (mV)
GATE VOLTAGE (V)
600
0
GATE PULLUP CURRENT (µA)
14
13
60
MAX5921TOC02
700
MAX5921TOC04
SUPPLY CURRENT (µA)
800
CURRENT-LIMIT TRIP VOLTAGE
vs. TEMPERATURE
15
MAX5921TOC01
900
GATE VOLTAGE
vs. SUPPLY VOLTAGE
MAX5921TOC03
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
GATE PULLDOWN CURRENT (mV)
MAX5921/MAX5939
-48V Hot-Swap Controllers with External
RSENSE and High Gate Pulldown Current
VDRAIN - VEE > 2.4V
10
1
0.1
0.01
0.001
-40
-15
10
35
TEMPERATURE (°C)
60
85
-40
-15
10
35
TEMPERATURE (°C)
_______________________________________________________________________________________
60
85
-48V Hot-Swap Controllers with External
RSENSE and High Gate Pulldown Current
MAX5921/MAX5939
V+
5V
R
5kΩ
PWRGD/PWRGD
VDD
+
DRAIN
OV
VOV
VS
+48V
-
VDRAIN
MAX5921
MAX5939
UV
GATE
VEE
SENSE
VUV
VSENSE
Figure 1a. Test Circuit 1
+
PWRGD/PWRGD
VS
VDD
+
OV
DRAIN
VS
MAX5921
MAX5939
IRF530
0.1µF
UV
VEE
10kΩ
10Ω
GATE
VUV
+48V
-
+20V
-
SENSE
Figure 1b. Test Circuit 2
_______________________________________________________________________________________
5
MAX5921/MAX5939
-48V Hot-Swap Controllers with External
RSENSE and High Gate Pulldown Current
Timing Diagrams
2V
1.255V
2V
1.205V
OV
1.255V
1.125V
UV
0V
tPLHUV
tPHLUV
0V
tPHLOV
tPLHOV
GATE
GATE
1V
1V
1V
Figure 2. OV to GATE Timing
1V
Figure 3. UV to GATE Timing
100mV
60mV
SENSE
UV
VEE
tPHLCL
tPHLSENSE
GATE
1V
GATE
1V
Figure 4a. SENSE to GATE Timing
6
Figure 4b. Active Current-Limit Threshold
_______________________________________________________________________________________
1V
-48V Hot-Swap Controllers with External
RSENSE and High Gate Pulldown Current
DRAIN
1.4V
1.4V
∆VGATE - VGATE = 0V
VEE
tPHLDL
GATE
tPHLGH
PWRGD
1V
PWRGD
VEE
1V
VEE
1.4V
DRAIN
∆VGATE - VGATE = 0V
1.4V
GATE
VEE
tPHLDL
tPHLGH
PWRGD
VEE
PWRGD
1V
VDCEN - VDRAIN = 0V
1V
VDCEN - VDRAIN = 0V
Figure 5a. DRAIN to PWRGD/PWRGD Timing
Figure 5b. GATE to PWRGD/PWRGD Timing
Block Diagram
VDD
UVLO
UV
VDD AND
REFERENCE
GENERATOR
VDD
MAX5921/MAX5939
REF
PWRGD
PWRGD
OUTPUT
DRIVER
LOGIC
REF
OV
GATE
DRIVER
50mV
VGH
VDL
∆VGATE
VEE
VEE
SENSE
GATE
DRAIN
_______________________________________________________________________________________
7
MAX5921/MAX5939
Timing Diagrams (continued)
-48V Hot-Swap Controllers with External
RSENSE and High Gate Pulldown Current
MAX5921/MAX5939
Pin Description
PIN
MAX5921A/
MAX5921E
MAX5939A/
MAX5939E
MAX5921B/
MAX5921F
MAX5939B/
MAX5939F
1
—
NAME
FUNCTION
PWRGD
Power-Good Signal Output. PWRGD is an active-low open-drain status output referenced
to VEE. PWRGD latches low when VDRAIN - VEE ≤ VDL and VGATE > ∆VGATE indicating a
power-good condition. PWRGD is open drain otherwise.
Power-Good Signal Output. PWRGD is an active-high open-drain status output referenced to DRAIN. PWRGD latches in a high-impedance state when VDRAIN - VEE ≤ VDL
and VGATE > ∆VGATE - VGH indicating a power-good condition. PWRGD is pulled low to
DRAIN otherwise.
—
1
PWRGD
2
2
OV
3
3
UV
4
4
VEE
Overvoltage Detection Input. OV is referenced to VEE. When OV is pulled above VOVH
voltage, GATE pulls low. GATE remains low until the OV voltage reduces to VOVH VOVHY.
Undervoltage Detection Input. UV is referenced to VEE. When UV is pulled above VUVH
voltage, the GATE is enabled. When UV is pulled below VUVL, GATE pulls low.
UV is also used to reset the circuit breaker after a fault condition. To reset the circuit
breaker, pull UV below VUVL. The reset command can be issued immediately after a fault
condition; however, the device will not restart until a tOFF delay time has elapsed after the
fault condition is removed.
Negative Power-Supply Input. Connect to the negative power-supply rail.
5
5
SENSE
Current-Sense Input. Connect to the external sense resistor and the source of the external
MOSFET. The voltage drop across the external sense resistor is monitored to detect
overcurrent or short-circuit fault conditions. Connect SENSE to VEE to disable the currentlimiting feature.
6
6
GATE
Gate Drive Output. Connect to the gate of the external N-channel MOSFET.
7
7
DRAIN
Output Voltage Sense Input. Connect to the output voltage node (drain of external Nchannel MOSFET). Place the MAX5921/MAX5939 such that DRAIN is close to the drain of
the external MOSFET for the best thermal protection.
8
8
VDD
Positive Power-Supply Input. This is the power ground in the negative supply voltage
system. Connect to the higher potential of the power-supply inputs.
Detailed Description
The MAX5921/MAX5939 integrated hot-swap controllers
for -48V power systems allow circuit boards to be safely
hot plugged into a live backplane without causing a
glitch on the power-supply rail. When circuit boards are
inserted into a live backplane, the bypass capacitors at
the input of the board’s power module or switching
power supply can draw large inrush currents as they
charge. Uncontrolled inrush currents can cause glitches
on the system power supply and damage components
on the board.
8
The MAX5921/MAX5939 provide a controlled turn-on to
circuit cards preventing damage to connectors, board
components, and prevent glitches on the power-supply
rail. Both the MAX5921/MAX5939 provide undervoltage, overvoltage, and overcurrent protection. The
MAX5921/MAX5939 ensure that the input voltage is stable and within tolerance before applying power to the
load. The device also provides protection against input
voltage steps by limiting the load current to a safe level
without turning off power to the load.
_______________________________________________________________________________________
-48V Hot-Swap Controllers with External
RSENSE and High Gate Pulldown Current
The inrush current can be calculated:
IINRUSH = IPU x CL / C2
where CL is the total load capacitance, C3 + C4, and
IPU is the gate pullup current.
Figure 6b shows the inrush current waveform. The current through C2 controls the GATE voltage. At the end
of the DRAIN ramp, the GATE voltage is charged to its
final value. The GATE-to-SENSE clamp limits the maximum ∆VGATE to 18V.
Board Removal
If the circuit card is removed from the backplane, the voltage at the UV falls below the UVLO detect threshold, and
the MAX5921/MAX5939 turn off the external MOSFET.
Power-Supply Ramping
Current Limit and Electronic Circuit
Breaker
The MAX5921/MAX5939 can reside either on the backplane or the removable circuit board (Figure 6a). Power
is delivered to the load by placing an external N-channel MOSFET pass transistor in the power-supply path.
After the circuit board is inserted into the backplane,
and the supply voltage at VEE is stable and within the
undervoltage and overvoltage tolerance, the
MAX5921/MAX5939 gradually turn on the external
MOSFET by charging the gate of Q1 with a 45µA current source. Capacitor C2 provides a feedback signal
to accurately limit the inrush current.
The MAX5921/MAX5939 provide current-limiting and circuit-breaker features that protect against excessive load
current and short-circuit conditions. The load current is
monitored by sensing the voltage across an external
sense resistor connected between VEE and SENSE.
-48V RTN
SHORT PIN
-48V RTN
R4
549kΩ
1%
VDD
UV
R5
6.49kΩ
1%
MAX5921
MAX5939
OV
R6
10kΩ
1%
4.7nF
VEE
SENSE
PWRGD
GATE
DRAIN
VIN+
R1
0.02Ω
5%
-48V
R2
10Ω
5%
Q1
IRF530
R3
1kΩ
5%
C2
15nF
100V
C4
100µF
100V
C3
0.1µF
100V
GATE IN
VICOR
VI-J3D-CY
VIN-
Figure 6a. Inrush Control Circuitry/Typical Application Circuit
_______________________________________________________________________________________
9
MAX5921/MAX5939
Board Insertion
Figure 6a shows a typical hot-swap circuit for -48V systems. When the circuit board first makes contact with
the backplane, the DRAIN to GATE capacitance (Cgd)
of Q1 pulls up the GATE voltage to roughly IV EE x
(Cgd/Cgd + Cgs)I. The MAX5921/MAX5939 feature an
internal dynamic clamp between GATE and V EE to
keep the gate-to-source voltage of Q1 low during hot
insertion preventing Q1 from passing an uncontrolled
current to the load. For most applications, the internal
clamp between GATE and V EE of the MAX5921/
MAX5939 eliminates the need for an external gate-tosource capacitor. The resistor R3 limits the current into
the clamp circuitry during card insertion.
MAX5921/MAX5939
-48V Hot-Swap Controllers with External
RSENSE and High Gate Pulldown Current
Load Current Regulation
(Short-Circuit Condition)
INRUSH
CURRENT
1A/div
GATE - VEE
10V/div
DRAIN
50V/div
VEE
50V/div
4ms/div
Figure 6b. Inrush Control Waveforms
If the voltage between VEE and SENSE reaches the current-limit trip voltage (VCL), the MAX5921/MAX5939 pull
down the GATE and regulate the current through the
external MOSFET such that VSENSE - VEE < VCL. If the
current drawn by the load drops below VCL / RSENSE
limit, the GATE voltage rises again. However, if the load
current is at the regulation limit of VCL / RSENSE for a period of tPHLCL, the electronic circuit breaker trips, causing
the MAX5921/MAX5939 to turn off the external MOSFET.
After an overcurrent fault condition, the MAX5921 automatically restarts after tOFF has elapsed. The MAX5939
circuit breaker is reset by toggling UV or by cycling
power. Unless power is cycled to the MAX5939, the
device waits until tOFF has elapsed before turning on the
gate of the external FET.
Load-Current Regulation
The MAX5921/MAX5939 accomplish load-current regulation by pulling current from GATE whenever VSENSE VEE > VCL. This decreases the gate-to-source voltage of
the external MOSFET, thereby reducing the load current.
When VSENSE - VEE < VCL, the MAX5921/MAX5939 pulls
GATE high by a 45µA (IPU) current.
Exponential Current Regulation
The MAX5921/MAX5939 provide an exponential pulldown current to turn off the external FET in response to
overcurrent conditions. The GATE pulldown current
increases (see Typical Operating Characteristics) in
response to VSENSE - VEE potentials greater than 50mV
(VCL).
10
The MAX5921/MAX5939 devices also include a very
fast high-current pulldown source connected to GATE
(see Typical Operating Characteristics). The high-current pulldown activates if V SENSE exceeds V EE by
650mV (typ) during a catastrophic overcurrent or shortcircuit fault condition. The high-current pulldown circuit
sinks as much as 450mA from GATE to turn off the
external MOSFET.
Immunity to Input Voltage Steps
The MAX5921/MAX5939 guard against input voltage
steps on the input supply. A rapid increase in the input
supply voltage (VDD - VEE increasing) causes a current
step equal to I = CL x ∆VIN / ∆t, proportional to the input
voltage slew rate (∆VIN / ∆t). If the load current exceeds
VCL / RSENSE during an input voltage step, the MAX5921/
MAX5939 current limit activates, pulling down the gate
voltage and limiting the load current to VCL / RSENSE. The
DRAIN voltage (VDRAIN) then slews at a slower rate than
the input voltage. As the drain voltage starts to slew
down, the drain-to-gate feedback capacitor C2 pushes
back on the gate, reducing the gate-to-source voltage
(VGS) and the current through the external MOSFET.
Once the input supply reaches its final value, the DRAIN
slew rate (and therefore the inrush current) is limited by
the capacitor C2 just as it is limited in the startup condition (see the Power-Supply Ramping section). To ensure
correct operation, RSENSE must be chosen to provide a
current limit larger than the sum of the load current and
the dynamic current into the load capacitance in the
slewing mode.
If the load current plus the capacitive charging current is
below the current limit, the circuit breaker does not trip.
Undervoltage and Overvoltage Protection
Use UV and OV to detect undervoltage and overvoltage
conditions. UV and OV internally connect to analog comparators with 130mV (UV) and 50mV (OV) of hysteresis.
When the UV voltage falls below its threshold or the OV
voltage rises above its threshold, GATE pulls low. GATE
is held low until UV goes high and OV is low, indicating
that the input supply voltage is within specification. The
MAX5921/MAX5939 includes an internal lockout (UVLO)
that keeps the external MOSFET off until the input supply
voltage exceeds 15.4V, regardless of the UV input.
UV is also used to reset the circuit breaker after a fault
condition has occurred. Pull UV below VUVL to reset the
circuit breaker.
______________________________________________________________________________________
-48V Hot-Swap Controllers with External
RSENSE and High Gate Pulldown Current
VEE
20V/div
DRAIN
20V/div
GATE - VEE
10V/div
INRUSH
CURRENT
5A/div
1ms/div
MAX5921/MAX5939
DRAIN
50V/div
ID (Q1)
2A/div
400µs/div
Figure 7. Short-Circuit Protection Waveform
Figure 8. Voltage Step-On Input Supply
Figure 10 shows how to program the undervoltage and
overvoltage trip thresholds using three resistors. With R4
= 549kΩ, R5 = 6.49kΩ, and R6 = 10kΩ, the undervoltage threshold is set to 38.5V (with a 43V release from
undervoltage), and the overvoltage is set to 71V. The
resistor-divider also increases the hysteresis and overvoltage lockout to 4.5V and 2.8V at the input supply,
respectively.
or optoisolator to indicate that the power is good (Figure
13) (see the Component Selection Procedure section).
When the DRAIN voltage drops below V DL and the
GATE voltage is greater than ∆VGATE - VGH, MOSFET
Q3 turns on, shorting I1 to VEE and turning Q2 off. The
pullup current in the module pulls the PWRGD high,
enabling the module.
When the DRAIN voltage of the MAX5921B/MAX5939B
(see Selector Guide for complete selection) is high with
respect to VEE (Figure 12) or the GATE voltage is low
due to an undervoltage condition, the internal MOSFET
Q3 is turned off so that I1 and the internal MOSFET Q2
clamp PWRGD to the DRAIN turning off the module.
PWRGD/PWRGD Output
Use the PWRGD (PWRGD) output to enable a power
module after hot insertion. Use the MAX59__A (PWRGD)
to enable modules with an active-low enable input
(Figure 12), or use the MAX59__B (PWRGD) to enable
modules with an active-high enable input (Figure 11).
The PWRGD signal is referenced to the DRAIN terminal, which is the negative supply of the power module.
The PWRGD signal is referenced to VEE.
When the DRAIN voltage of the MAX5921A (see
Selector Guide for complete selection) or MAX5939A is
high with respect to VEE or the GATE voltage is low
from an undervoltage condition, then the internal pulldown MOSFET Q2 is off. The PWRGD output goes into
a high-impedance state (Figure 13). PWRGD is pulled
high by the module’s internal pullup current source,
turning the module off. When the DRAIN voltage drops
below V DL and the GATE voltage is greater than
∆V GATE - V GH, Q2 turns on and PWRGD pulls low,
enabling the module.
The PWRGD signal can also be used to turn on an LED
Once the PWRGD and PWRGD outputs are active, the
MAX5921/MAX5939 output does not toggle due to an
overvoltage (OV) fault.
GATE Voltage Regulation
GATE goes high when the following startup conditions
are met: UV is high, OV is low, the supply voltage is
above VUVLOH, and (VSENSE - VEE) is less than 50mV.
The gate is pulled up with a 45µA current source and is
regulated at 13.5V above VEE. The MAX5921/MAX5939
include an internal clamp that ensures the GATE voltage
of the external MOSFET never exceeds 18V. During a
fast-rising VDD, an additional dynamic clamp keeps the
GATE and SENSE potentials as close as possible to prevent the FET from accidentally turning on. When a fault
condition is detected, GATE is pulled low (see the Load
Current Regulation section).
______________________________________________________________________________________
11
MAX5921/MAX5939
-48V Hot-Swap Controllers with External
RSENSE and High Gate Pulldown Current
-48V RTN
(SHORT PIN)
-48V RTN
R4
VGATE - VEE
2V/div
VUV = 1.255
R4 + R5 + R6
R5 + R6
VOV = 1.255
R4 + R5 + R6
R6
8
3
VDD
UV
R5
ID (Q1)
2A/div
2
MAX5921
MAX5939
OV
VEE
R6
-48V
10ms/div
Figure 9. Automatic Restart After a Short Circuit
Overcurrent Fault Integrator
The MAX5921/MAX5939 feature an overcurrent fault integrator. When an overcurrent condition is detected, an
internal digital counter is incremented. The clock period
for the digital counter is 32µs for the 500µs maximum
current-limit duration version and 128µs for 2ms maximum current-limit duration devices. An overcurrent of
less than 32µs is interpreted as an overcurrent of 32µs.
When the counter reaches 500µs (the maximum currentlimit duration) for the MAX5921/MAX5939A, an overcurrent fault is generated. If the overcurrent fault does not
last 500µs, then the counter begins decrementing at a
rate 128 (maximum current-limit duty cycle) times slower
than the counter was incrementing. Repeated overcurrent conditions generate a fault if the duty cycle of the
overcurrent condition duty ratio is greater than the maximum current-limit duty cycle (see Figure 14).
Thermal Shutdown
The MAX5921/MAX5939 include internal die-temperature monitoring. When the die temperature reaches the
thermal-shutdown threshold, T OT , the MAX5921/
MAX5939 pull GATE low and turn off the external MOSFET. If a good thermal path is provided between the
MOSFET and the MAX5921/MAX5939, the device offers
thermal protection for the external MOSFET. Placing the
12
4
Figure 10. Undervoltage and Overvoltage Sensing
MAX5921/MAX5939 near the drain of the external MOSFET offers the best thermal protection because most of
the power is dissipated in its drain.
After a thermal shutdown fault has occurred, the
MAX5921_ turns the external FET off for a minimum
time of tOFF, allowing the MOSFET to cool down. The
MAX5921_ device restarts after the temperature drops
20°C below the thermal-shutdown threshold.
The MAX5939_ latches off after a thermal shutdown
fault. The MAX5939_ can be restarted by toggling UV
low or cycling power. However, the device keeps the
external FET off for a minimum time of tOFF when toggling UV.
Applications Information
Sense Resistor
The circuit-breaker current-limit threshold is set to 50mV
(typ). Select a sense resistor that causes a drop equal
to or above the current-limit threshold at a current level
above the maximum normal operating current. Typically,
set the overload current to 1.5 to 2.0 times the nominal
load current plus the dynamic load-capacitance charging current during startup. Choose the sense resistor
power rating to be greater than (VCL)2 / RSENSE.
______________________________________________________________________________________
-48V Hot-Swap Controllers with External
RSENSE and High Gate Pulldown Current
MAX5921/MAX5939
ACTIVE-HIGH
ENABLE MODULE
-48V RTN
(SHORT PIN)
-48V RTN
VIN+
VOUT+
VDD
R4
MAX5921B/F
MAX5939B/F
UV
PWRGD
I1
ON/OFF
Q2
C3
Q3
VGH
R5
VIN∆VGATE
*
OV
VOUT-
VEE
VDL
DRAIN
R6
VEE
SENSE
GATE
R3
C2
R2
R1
-48V
Q1
*DIODES INC. SMAT70A
Figure 11. Active-High Enable Module
ACTIVE-LOW
ENABLE MODULE
-48V RTN
(SHORT PIN)
-48V RTN
VIN+
VOUT+
VDD
R4
MAX5921A/E
MAX5939A/E
UV
PWRGD
ON/OFF
C3
Q2
VGH
R5
VIN∆VGATE
*
OV
VOUT-
VEE
VDL
DRAIN
R6
VEE
SENSE
GATE
R3
C2
R2
R1
-48V
*DIODES INC. SMAT70A
Q1
Figure 12. Active-Low Enable Module
______________________________________________________________________________________
13
MAX5921/MAX5939
-48V Hot-Swap Controllers with External
RSENSE and High Gate Pulldown Current
-48V RTN
(SHORT PIN)
PWRGD
GND
R4
549kΩ
1%
VDD
MAX5921A
MAX5921E
MAX5939A
MAX5939E
UV
R5
6.49kΩ
1%
OV
*
R6
10kΩ
1%
R7
51kΩ
5%
VEE
SENSE
R1
0.02Ω
5%
PWRGD
GATE
R2
10Ω
5%
-48V
*DIODES INC. SMAT70A
DRAIN
R3
1kΩ
5%
C3
100µF
100V
C2
15nF
100V
Q1
IRF530
Figure 13. Using PWRGD to Drive an Optoisolator
Component Selection Procedure:
• Determine load capacitance:
CL = C2 + C3 + module input capacitance
• Determine load current, ILOAD.
• Select circuit-breaker current, for example:
ICB = 2 x ILOAD
• Calculate RSENSE:
50mV
RSENSE =
ICB
Realize that ICB varies ±20% due to trip-voltage tolerance.
• Set allowable inrush current:
40mV
− ILOAD or
RSENSE
IINRUSH + ILOAD ≤ 0.8 x ICB(MIN)
IINRUSH ≤ 0.8 x
• Determine value of C2:
C2 =
45µA x CL
IINRUSH
• Calculate value of C1:
 VIN(MAX) − VGS( TH) 
C1 = (C2 + Cgd ) x 

VGS( TH)


• Determine value of R3:
14
R3 =
150µs
C2
• Set R2 = 10Ω.
• If an optocoupler is utilized as in Figure 14, determine the LED series resistor:
R7 =
VIN(NOMINAL) − 2V
3 ≤ ILED ≤ 5mA
Although the suggested optocoupler is not specified for
operation below 5mA, its performance is adequate for
36V temporary low-line voltage where LED current
would then be ≈2.2mA to 3.7mA. If R7 is set as high as
51kΩ, optocoupler operation should be verified over
the expected temperature and input voltage range to
ensure suitable operation when LED current ≈0.9mA for
48V input and ≈0.7mA for 36V input.
If input transients are expected to momentarily raise the
input voltage to >100V, select an input transient-voltagesuppression diode (TVS) to limit maximum voltage on the
MAX5921/MAX5939 to less than 100V. A suitable device
is the Diodes Inc. SMAT70A telecom-specific TVS.
Select Q1 to meet supply voltage, load current, efficiency, and Q1 package power-dissipation requirements:
BVDSS ≥ 100V
ID(ON) ≥ 3 x ILOAD
DPAK, D2PAK, or TO-220AB
______________________________________________________________________________________
-48V Hot-Swap Controllers with External
RSENSE and High Gate Pulldown Current
t1
t3H t5H
VOL
VSENSE
t2L t4L
VGATE
500µs x 128
Figure 14. MAX5921A Overcurrent Fault Example
The lowest practical RDS(ON), within budget constraints
and with values from 14mΩ to 540mΩ, are available at
100V breakdown.
Ensure that the temperature rise of Q1 junction is not
excessive at normal load current for the package selected. Ensure that ICB current during voltage transients
does not exceed allowable transient-safe operating-area
limitations. This is determined from the SOA and transient-thermal-resistance curves in the Q1 manufacturer’s
data sheet.
Example 1:
ILOAD = 2.5A, efficiency = 98%, then VDS = 0.96V is
acceptable, or RDS(ON) ≤ 384mΩ at operating temperature is acceptable. An IRL520NS 100V NMOS with
R DS(ON) ≤ 180mΩ and I D(ON) = 10A is available in
D2PAK. (A Vishay Siliconix SUD40N10-25 100V NMOS
with RDS(ON) ≤ 25mΩ and ID(ON) = 40A is available in
DPAK but may be more costly because of a larger die
size).
Using the IRL520NS, VDS ≤ 0.625V even at +80°C so efficiency ≥ 98.6% at 80°C. PD ≤ 1.56W and junction temperature rise above case temperature would be 5°C due to
the package θ JC = 3.1°C/W thermal resistance. Of
course, using the SUD40N10-25 will yield an efficiency
greater than 99.8% to compensate for the increased cost.
If ICB is set to twice ILOAD, or 5A, VDS momentarily doubles to ≤ 1.25V. If COUT = 4000µF, transient-line input
voltage is ∆36V, the 5A charging-current pulse is:
Layout Guidelines
Good thermal contact between the MAX5921/MAX5939
and the external MOSFET is essential for the thermalshutdown feature to operate effectively. Place the
MAX5921/MAX5939 as close as possible to the drain of
the external MOSFET and use wide circuit-board traces
for good heat transfer. See Figure 15 for an example of
recommended layout for Kelvin-sensing current
through a sense resistor on a PC board.
HIGH-CURRENT PATH
SENSE RESISTOR
SENSE VEE
MAX5921
MAX5939
Figure 15. Recommended Layout for Kelvin-Sensing Current
Through Sense Resistor
______________________________________________________________________________________
15
MAX5921/MAX5939
4000µF x 1.25V
= 1ms
5A
Entering the data sheet transient-thermal-resistance
curves at 1ms provides a θJC = 0.9°C/W. PD = 6.25W,
so ∆tJC = 5.6°C. Clearly, this is not a problem.
Example 2:
ILOAD = 10A, efficiency = 98%, allowing VDS = 0.96V
but RDS(ON) ≤ 96mΩ. An IRF530 in a D2PAK exhibits
RDS(ON) ≤ 90mΩ at +25°C and ≤ 135mΩ at +80°C.
Power dissipation is 9.6W at +25°C or 14.4W at +80°C.
Junction-to-case thermal resistance is 1.9W/°C, so the
junction temperature rise would be approximately 5°C
above the +25°C case temperature. For higher efficiency, consider IRL540NS with R DS(ON) ≤ 44mΩ. This
allows η = 99%, P D ≤ 4.4W, and T JC = +4°C
(θJC = 1.1°C/W) at +25°C.
Thermal calculations for the transient condition yield
I CB = 20A, V DS = 1.8V, t = 0.5ms, transient θ JC =
0.12°C/W, PD = 36W and ∆tJC = 4.3°C.
t =
MAX5921/MAX5939
-48V Hot-Swap Controllers with External
RSENSE and High Gate Pulldown Current
Selector Guide
MAXIMUM CURRENT-LIMIT MAXIMUM CURRENT-LIMIT
DURATION (ms)
DUTY CYCLE
PART
DCEN POLARITY
FAULT MANAGEMENT
MAX5921AESA
Active-Low PWRGD
Autoretry
0.5
MAX5921BESA
Active-High PWRGD
Autoretry
0.5
1/128
MAX5921EESA
Active-Low PWRGD
Autoretry
2
1/128
MAX5921FESA
Active-High PWRGD
Autoretry
2
1/128
MAX5939AESA
Active-Low PWRGD
Latched
0.5
1/128
MAX5939BESA
Active-High PWRGD
Latched
0.5
1/128
MAX5939EESA
Active-Low PWRGD
Latched
2
1/128
MAX5939FESA
Active-High PWRGD
Latched
2
1/128
Ordering Information (continued)
TEMP RANGE
PIN-PACKAGE
MAX5921EESA*
PART
-40°C to +85°C
8 SO
MAX5921FESA*
-40°C to +85°C
8 SO
MAX5939AESA
-40°C to +85°C
8 SO
MAX5939BESA
-40°C to +85°C
8 SO
MAX5939EESA*
-40°C to +85°C
8 SO
MAX5939FESA*
-40°C to +85°C
8 SO
1/128
Chip Information
TRANSISTOR COUNT: 2645
PROCESS: BiCMOS
*Future product—contact factory for availability.
16
______________________________________________________________________________________
-48V Hot-Swap Controllers with External
RSENSE and High Gate Pulldown Current
BACKPLANE CIRCUIT CARD
GND
GND
(SHORT PIN)
VDD
UV
MAX5921
MAX5939
OV
VEE
SENSE
GATE
PWRGD
DRAIN
VIN+
LUCENT
JW050A1-E
INPUT1
-48V (INPUT1)
N
VIN-
-48V (INPUT2)
INPUT2
______________________________________________________________________________________
17
MAX5921/MAX5939
Typical Operating Circuit
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
DIM
A
A1
B
C
e
E
H
L
N
E
H
INCHES
MILLIMETERS
MAX
MIN
0.069
0.053
0.010
0.004
0.014
0.019
0.007
0.010
0.050 BSC
0.150
0.157
0.228
0.244
0.016
0.050
MAX
MIN
1.35
1.75
0.10
0.25
0.35
0.49
0.19
0.25
1.27 BSC
3.80
4.00
5.80
6.20
0.40
SOICN .EPS
MAX5921/MAX5939
-48V Hot-Swap Controllers with External
RSENSE and High Gate Pulldown Current
1.27
VARIATIONS:
1
INCHES
TOP VIEW
DIM
D
D
D
MIN
0.189
0.337
0.386
MAX
0.197
0.344
0.394
MILLIMETERS
MIN
4.80
8.55
9.80
MAX
5.00
8.75
10.00
N MS012
8
AA
14
AB
16
AC
D
C
A
B
e
0 -8
A1
L
FRONT VIEW
SIDE VIEW
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE, .150" SOIC
APPROVAL
DOCUMENT CONTROL NO.
21-0041
REV.
B
1
1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2003 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
Similar pages