Intersil ACTS138K Radiation hardened ttl input, 3-to-8 line decoder/demultiplexer Datasheet

ACTS138MS
Radiation Hardened
TTL Input, 3-to-8 Line Decoder/Demultiplexer
December 1997
Features
Description
• QML Qualified Per MIL-PRF-38535 Requirements
The Radiation Hardened ACTS138MS is an Inverting 3-to-8
Line Decoder/Demultiplexer with three TTL level binary
select inputs (A0, A1 and A2). If the device is enabled, these
inputs determine which one of the eight normally high outputs will go low.
• 1.25Micron Radiation Hardened SOS CMOS
• Radiation Environment
- Latch-up Free Under any Conditions
- Total Dose . . . . . . . . . . . . . . . . . . . . . . 3 x 105 RAD(Si)
- SEU Immunity . . . . . . . . . . . <1 x 10-10 Errors/Bit/Day
- SEU LET Threshold . . . . . . . . . . . >100MeV/(mg/cm2)
Two active low and one active high enable inputs (E1, E2 and
E3) are provided to make cascaded decoder designs easier
to implement.
• Input Logic Levels . . . . . . . . . . VIL = 0.8V, VIH = (Vcc/2)
The ACTS138MS is fabricated on a CMOS Silicon on Sapphire (SOS) process, which provides an immunity to Single
Event Latch-up and the capability of highly reliable performance in any radiation environment. These devices offer
significant power reduction and faster performance when
compared to ALSTTL types.
• Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±12mA
• Quiescent Supply Current. . . . . . . . . . . . . . . . . . . .20µA
• Propagation Delay . . . . . . . . . . . . . . . . . . . . . . . . . . 20ns
Applications
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed below must be used when ordering.
• Memory Decoding
• Data Routing
Detailed Electrical Specifications for the ACTS138 are
contained in SMD 5962-98535. A “hot-link” is provided
on our homepage with instructions for downloading.
http://www.intersil.com/data/sm/index.htm
• Code Conversion
Ordering Information
SMD PART NUMBER
TEMP. RANGE (oC)
INTERSIL PART NUMBER
5962F9853501VEC
ACTS138DMSR-02
N/A
ACTS138D/Sample-02
PACKAGE
CASE OUTLINE
-55 to 125
16 Ld SBDIP
CDIP2-T16
25
16 Ld SBDIP
CDIP2-T16
5962F9853501VXC
ACTS138KMSR-02
-55 to 125
16 Ld Flatpack
CDFP4-F16
N/A
ACTS138K/Sample-02
25
16 Ld Flatpack
CDFP4-F16
N/A
ACTS138HMSR-02
25
Die
N/A
Pinouts
ACTS138 (SBDIP)
TOP VIEW
ACTS138 (FLATPACK)
TOP VIEW
A0 1
16 VCC
A0
1
16
VCC
A1 2
15 Y0
A1
2
15
Y0
A2 3
14 Y1
A2
3
14
Y1
E1 4
13 Y2
E1
4
13
Y2
12 Y3
E2
5
12
Y3
11 Y4
E3
6
11
Y4
Y7
7
10
Y5
GND
8
9
Y6
E2 5
E3 6
Y7 7
10 Y5
GND 8
9 Y6
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
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File Number
4460
ACTS138MS
Die Characteristics
PASSIVATION
DIE DIMENSIONS:
Type: Phosphorous Silicon Glass (PSG)
Thickness: 1.30µm ±0.15µm
Size: 2390µm x 2390µm (94 mils x 94 mils)
Thickness: 525µm ±25µm (20.6 mils ±1 mil)
Bond Pad: 110µm x 110µm (4.3 x 4.3 mils)
SPECIAL INSTRUCTIONS:
METALLIZATION: Al
Metal 1 Thickness: 0.7µm ±0.1µm
Metal 2 Thickness: 1.0µm ±0.1µm
Bond VCC First
ADDITIONAL INFORMATION:
Worst Case Density: <2.0 x 105 A/cm2
Transistor Count: 256
SUBSTRATE POTENTIAL:
Unbiased Insulator
Metallization Mask Layout
ACTS138MS
A1
A0
VCC
Y0
A2
Y1
E1
Y2
E2
Y3
E3
Y4
Y7
GND
Y6
Y5
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notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
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