HA13566AF Combo (Spindle & VCM) Driver ADE-207-250 (Z) 1st Edition December 1997 Description The HA13566AF is combination of Spindle and VCM Driver designed for HDD and have following functions and features. Functions • • • • • • • • • • • • 1.0 A max/3-phase spindle motor driver 400 mA max VCM driver 100 mA max retract driver 11 bit serial interface 9 bit DAC for VCM control Commutation logic for sensor-less motor Center tap pull-up driver for half wave driver Soft switching matrix Charge pump Booster Power monitor OTSD Features • Low output saturation voltage Spindle driver 1.0 V typ (@0.8 A) 0.2 V typ (@0.1 A) VCM driver 1.0 V typ (@400 mA) • Soft switching drive • Minimum surface mount package body size 7 × 7 mm HA13566AF LVI1 RETOUT RETPOW SPNCOMP VREF2 CDELAY Pin Arrangement RS VCMN VCMP CT 20 19 18 21 TAB 17 16 15 14 22 13 23 12 24 11 TAB TAB W V 25 10 26 9 RNF PCOMP 27 8 28 7 TAB 4 5 6 VB BC1 BC2 U VCMIN VCC2 1 2 3 DACOUT POWGOOD CHAGPMP DATA (Top view) 2 CLK SERENAB COMM PHASE HA13566AF Block Diagram VCC2 C101 3 B - EMF Soft switching matrix Amps PHASE COMM 7 8 Commutation logic U 1 D1 V 26 D2 W 25 D3 Spindle driver SOFTSW BRAKE EXTCOM Center tap pull-up CHAGPMP 12 24 HALF CT VREF2 (1.25 V) R1 SPNCOMP C2 R2 17 C102 VCC2 SPNENAB 5 6 FBOOST 4 18 RETRACT POWGOOD V CC 19 CLK 10 (10MHz Max) DATA 11 VCMP P DACOUT 14 Serial port (11 bit) SERENAB 9 VCMN N LVI 20 LVI1 23 RETOUT R101 RS R103 22 C104 SPNENAB BRAKE HALF EXTCOM SOFTSW RETRACT FBOOST 21 VCMENAB 1.25 V VCC2 RETPOW C108 C103 VCM Driver VCC2 2 PCOMP Retract VCMIN 2 DAC (9 bit) 28 D0 Booster C106 VB Current control Charge pump C1 C105 RNF 27 16 POR delay CDELAY 15 C107 3 13 POWGOOD TAB R104 RS HA13566AF Serial Port Construction MD0 to MD9 Serial port SERENAB CLK D0 to D9 Mode Control Register Mode Control A0 = 1 DATA DD0 to DD9 A0 Input Data Register for DAC & VCM A0 = 0 Decoder VCM Control Figure 1 Serial Port Data construction Input Data Construction MSB A0 D9 LSB D8 D7 D6 for selecting register D5 D4 D3 D2 D1 D0 Register Data Figure 2 Input Data (1) The serial port is required the 11 bit data (D0 to D9 and A0). Address bit A0 is used to select the register as follows. When the data length is less than 11 bits, the internal register will not be up dated. And when the data length is more than 11 bits, this register will take late 10 bits and ignore the faster bit. A0 Register 0 Input data register of DAC & VCMGAIN 1 Mode control register 4 HA13566AF Mode Control Register (A0 = 1) Bit Symbol 1 0 Note MD0 SPNENAB Spindle enable Spindle disable 1 MD1 BRAKE Brake enable Brake disable 1 MD2 Not use — — MD3 HALF Half wave drive Full wave drive MD4 EXTCOM External commutation Internal commutation MD5 SOFTSW Soft switching Switching MD6 VCMENAB VCM enable VCM disable MD7 RETRACT Retracting Not retracting MD8 POLESEL for 12 poles motor for 8 poles motor 3 MD9 FBOOST Low frequency High frequency 4 2 Notes: 1. The spindle motor is independently winding to the value of the MD2, during the MD1 is true. 2. The bit MD4 select a commutation mode at driving by B-EMF sensing. (See Commutation timing) 3. In order to prevent the misdetection of back-EMF amplifier, the bit MD8 should be chosen as shown above table. 4. The bit MD9 determine the operating frequency of Booster Circuit. According to the frequency of Input CLK at pin 10, the value of MD9 should be chosen as shown below. CLK (at pin 10) MD9 7.1 MHz to 10 MHz 0 4.0 MHz to 7.0 MHz 1 Input Data Register (A0 = 0) Bit / DD0 to DD9: These input data are used to control the output current at VCM driver as shown follows. MSB DD9 VCMGAIN DD8 LSB DD7 DD6 DD5 DD4 DD3 Input data of DAC Figure 3 Input Data (2) 5 DD2 DD1 DD0 HA13566AF The data bit DD9 determine the transfer gain GVCM which is specified as the relationship between the input data at the input data register and the output current at VCM amplifier. (See the under table) DD9 DATA I O [mA] 1 1FF +199.2/RS 1 100 0.000 1 000 –200.0/R S 0 1FF +24.9/RS 0 100 0.000 0 000 –25.0/R S Data Input Timing t1 Vth (= 1/2VCC2 Typ) SERENAB t0 CLK t3 t2 Vth Up date point t4 DATA Latch point t5 A0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Vth t0 ≥ 20ns t1 ≥ 20ns t2 ≥ 50ns Figure 4 Input Timing on Serial Port SERENAB t6 t6 Internal DAC output t6 : Conversion time of DAC ≤ 1µs Figure 5 Conversion Timing on DAC 6 t3 ≥ 40ns t4 ≥ 40ns t5 ≥ 40ns HA13566AF Commutation Timing Commutation for starting up Pulsewidth ≥ 10µs 1/fCOMM COMM Delay PHASE IU + 0 – IV + 0 – IW + 0 – Synchronous (≅0.2s to 0.3s) driving by B-EMF sensing Note: 1. The frequency of COMM signal fCOMM can be designed as follows. fCOMM (max) = 2.5 P · KT · IO J (Hz) (for begin of synchronous driving) (1) fCOMM (min) = 0.5 P · KT · IO J (Hz) (for end of synchronous driving) (2) Where, P : Pole number of spindle motor (Hz) KT : Torque constant (kg · cm/A) IO : Start up current (A) J : Moment of inertia (kg · cm · S2) 7 HA13566AF External Commutation Mode (Full Wave Drive) U V W + B-EMF 0 – PHASE 0 Delay *2 COMM 0 + U-Current Switching mode U-Current Soft switching mode 0 – + + 50 % 0 – 50 % – Note: 2. Provided by MPU. 8 HA13566AF External Commutation Mode (Half Wave Mode) U V W + B-EMF (VCC) 0 – PHASE 0 COMM 0 + U-Current Switching mode U-Current Soft switching mode 0 – + 0 – 50 % – 9 HA13566AF Internal Commutation Mode (Full Wave Mode) U V W + B-EMF 0 – PHASE 0 COMM *3 U-Current Switching mode U-Current Soft switching mode 0 + 0 – + + 50 % 0 – 50 % – Note: 3. When the internal commutation mode is selected, the commutation of the motor is automatically selected at the B-EMF sensing drive. But don’t open the COMM terminal. 10 HA13566AF Internal Commutation Mode (Half Wave Mode) U V W + B-EMF 0 – PHASE 0 COMM U-Current Switching mode U-Current Soft switching mode 0 + 0 – + 0 – 50 % – 11 HA13566AF Application C105 VCC2 C106 C101 R2 C2 VCC2 Booster U SPNCOMP C1 R1 Serial data D1 VREF PHASE V D2 W D3 COMM CT CHAGPMP MPU Spindle motor RNF POWGOOD PCOMP CLK RETOUT DATA VCMP SERENAB RNF C102 R101 RS C103 R103 DACOUT VCMN VCMIN C104 R104 RS C107 CDELAY RETPOW TAB 12 C108 RL HA13566AF External Component Parts No. Recommended Value Purpose Notes R1 ≤ 47 kΩ Integral constant 1 R2 — Integral constant 1 R101 — Set retract current 2 R103, R104 2.2 Ω For stability RNF ≥ 0.2 Ω Spindle current sense RS 0.47 Ω VCM current sense C1, C2 — Integral constant C101 0.1 µF Power supply bypass C102 0.1 µF Phase compensation for spindle driver C103, C104 0.1 µF For stability C105 0.47 µF For booster C106 4.7 µF For booster C107 — POR delay C108 — Retpower filter D1, D2, D3 — For retract Notes: 1. This integral constants can be designed as follows. 2πNO ωO = 600 (3) R2 R1 C1 = = J ωO NO RNF 9.55Kt Gctl Vref2 (4) 1 10 ωO R2 C2 = 10C1 (5) (6) Where, ωO = Time constant of servo loop NO = Rotation number (rpm) J = Moment of inertia (kg cm•s2) RNF = Current sense resistor (Ω) Gctl = Control gain (see electrical characteristics) Vref2 = Internal reference voltage (See electrical characteristics) 13 3 1 4 HA13566AF 2. The retract current is determined as follows. Vretpow – Vsatret Iret = R101 + RL + RS (7) where, RL = VCM coil Resistor. Vsatret = Retout saturation voltage (See electrical characteristics) 3. The motor start up current IO is determined as follows. IO = Vref1 RNF (A) (8) Where, Vref1 = Current limiter reference voltage (See electrical characteristics) 4. The power on reset delay time is determined as follows. t POR = 105•C 107 (See electrical characteristics) (9) 14 HA13566AF Absolute Maximum Ratings (Ta = 25°C) Item Symbol Value Units Notes Power supply voltage VCC2 7.0 V 1 Spindle current Ispn 1.0 A 2 VCM current Ivcm 400 mA 2 Retract current Iret 100 mA 2 Input voltage Vin 0 to V CC V Power dissipation (Ta = 65°C) P T1 1.0 W 3 Power dissipation (Tc = 100°C) P T2 2.0 W 3 Junction temperature Tj 150 °C 4 Storage temperature range Tstg –55 to +125 °C Notes: 1. Operating voltage range is 4.25 V to 5.75 V. 2. ASO of each output transistor is shown below. Operating locus must be with in the ASO. 3. Thermal resistance is shown below. θj-c ≤ 25°C/W θj-a ≤ 80°C/W 4. Operating junction temperature range is 0 to +125°C. 4 t = 1 ms Collector Current IC (A) t = 10 ms t = 100 ms 1 0.5 0.1 1 5 10 20 Collector Emitter Voltage VCE (V) Figure 6 ASO of Output Transistor (Spindle Driver) 15 HA13566AF 4 t = 1 ms Collector Current IC (A) t = 10 ms t = 100 ms 1 0.5 0.1 1 5 10 20 Collector Emitter Voltage VCE (V) Figure 7 ASO of Output Transistor (VCM Driver) 16 HA13566AF Electrical Characteristics (Ta = 25°C, VCC = 5 V) Item Symbol Min Typ Max Units Test Conditions Applicable Terminal Supply current ICC1 — 15 20 mA Enable m ode 3 Logic Input low current IIL — 0 ±10 µA VIL=0V 8, 9, 10, 11 input Input high current IIH — — ±10 µA VIH=5V Input low voltage VIL — — 1.5 V Input high voltage VIH 3.5 — — V Clock frequency fCLK — — 10 MHz Output high voltage VOH 4.4 — — V IOH =1mA Output low voltage VOL — — 0.4 V IOL=1mA Spindle Total saturation Vsatspn — 1.0 1.4 V Ispn=0.8A driver voltage — 0.2 0.3 V Ispn=100mA Logic output 7, 13 1, 25, 26 Output leak current Icer1 — — 5 mA MD3=1, VO=VCC+3V Current limiter reference voltage Vref1 139 155 171 mV RNF =1.0Ω Current control gain Gctl –14 –12 –10 dB B-EMF amps Input sensitivity Vmin — 50 — mVp-p 1, 25, 26 Charge Input high voltage VIHCP 3.5 — — V 12 pump Input low voltage VILCP — — 1.5 V Input high current IIHCP — 150 200 µA Input dead current IIDCP — ±10 µA Input low current IILCP — –150 –200 µA VILCP=0V Output current Charge current +44 +54 +64 µA R1=24kΩ Discharge current –64 –54 –44 µA R1=24kΩ Output cutoff current Ioff — — ±50 nA Reference voltage Vref2 1.32 1.39 1.46 V VCM VCM input resistor Rin 42 60 78 kΩ 2 driver Output quiescent voltage Vq VCC2/2 VCC2/2 +5% VCC2/2 +10% V 22, 23 Output leak current Icer2 — — ±5 mA Total output Vsatvcm — 1.0 1.35 V Ivcm=400mA — 0.8 1.0 V Ivcm=200mA saturation voltage 17 VIHCP=5V R1=24kΩ Note 17 16 1 HA13566AF Electrical Characteristics (Ta = 25°C, VCC = 5 V) (cont) Item Symbol Min Typ Max Units Test Conditions Applicable Terminal Note 1 VCM Resolution Ires — 1/512 — — 21, 22, 23 driver DAC output resistor Rout — — 50 Ω 14 Output current full IFS1 345 385 425 mA DD9=1, RS= scale IFS2 45 50 55 mA 1Ω, RL=14Ω Gain ratio IFS1 / IFS2 7.5 8.0 8.5 — Offset Ioff1 — — ±15 LSB DD9=1, RS= Ioff2 — — ±20 LSB 1Ω, RL=14Ω Ioff3 — — ±80 LSB Ioff1×8–Ioff2 Linearity ILIN — — ±1 LSB Gain Bandwidth B — 40 — kHz DD9=1, RS= 1Ω, RL=14Ω — 95 — kHz DD9=0, RS= 1Ω, RL=14Ω Retract driver 2, 14 21, 22, 23 1 Retpow voltage Vretpow 1.4 — — V RS=1.0Ω, RL=14Ω Iret=100mA 18 Retout saturation voltage Vsatret — 1.0 1.2 V Iret=100mA 19 Operating voltage Vsd 3.55 3.85 4.15 V Recovery voltage Vrec 3.9 4.2 4.5 V POR Power on reset delay time POR 5 10 20 ms OTSD Operating temperature Tsd 125 150 — °C Hysteresis Thys — 25 — °C LVI Note: 1. Design guide only 2. Specified by shorting between VCMIN and DACOUT. 18 2 3 1 C107=0.1µF 13 1 HA13566AF Package Dimensions 21 14 28 7 6 0.575 2.25 ± 0.10 0.10 M 1.40 1.70 Max 0.13 0.17 ± 0.05 0.15 ± 0.04 1 0.32 ± 0.08 0.30 ± 0.06 0.09 0.13 +– 0.05 9.0 ± 0.2 9.0 ± 0.2 7.0 20 15 0.65 Unit: mm 1.0 0.575 0° – 8° 0.95 ± 0.10 0.50 ± 0.10 Hitachi Code JEDEC EIAJ Weight (reference value) Dimension including the plating thickness Base material dimension 19 FP-28T — — 0.2 g Cautions 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. 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