HA13631T CD-ROM Combo Driver ADE-207-320 (Z) 1st Edition Feb. 2000 Description The HA13631T is combination of Spindle, Forcus, Tracking, Slide, Tray designed for CD-ROM and have following functions and features. Functions • • • • • • 1.5 A spindle driver 0.75 A focus driver 0.75 A tracking driver 1.0 A slide driver 0.75 A tray driver Over temperature shut down (OTSD) Features • • • • • Corresponds to both of sensor motor and sensorless motor All direct PWM drive Low on resistance Low power dissipation Small thin surface mount package HA13631T Pin Arrangement ASGND SLDIN OP3IN OP4IN VSLD TRYIN SLDP SLDN SLDGND VTRY TRYP TRYN BSTGND BP1 BP2 VBST U RNF V W EXTCOM FGOUT COMM BRKSEL CE HB HU+ ASGND 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 (Top view) 2 ASGND NC NC OP1IN FCSIN FCSN FCSP VFCS FCSGND TRKP TRKN TRKIN OP2IN VSS SGND PWMDC CT2 CT1 RT REFIN VCTL HWHW+ HVHV+ HUVSPN ASGND HA13631T Pin Description Pin No. Pin Name Function 1 ASGND Actuator small signal GND 2 SLDIN SLD driver control input 3 OP3IN Inverted input of OP amp. 3 for SLD driver control 4 OP4IN Inverted input of OP amp. 4 for TRY driver control 5 VSLD SLD driver power supply 6 TRYIN TRY driver control input 7 SLDP SLD driver P output 8 SLDN SLD driver N output 9 SLDGND SLD and TRY driver GND 10 VTRY TRY driver power supply 11 TRYP TRY driver P output 12 TRYN TRY driver N output 13 BSTGND Booster GND 14 BP1 Booster pumping capacitor connection 15 BP2 Booster pumping capacitor connection 16 VBST Booster output pin. This circuit generates a voltage about two times of the VSPN pin. 17 U U phase output 18 RNF SPN driver current detection 19 V V phase output 20 W W phase output 21 EXTCOM COMM signal on/off control and FGOUT switching. (Refer to the Timing Chart) 22 FGOUT FG output (Refer to the Timing Chart) open drain 23 COMM Start-up clock input pin for sensorless (Refer to the Timing Chart) 24 BRKSEL To select the brake mode (Refer to the Truth Table) 25 CE Chip enable (Refer to the Truth Table) 26 HB Hall bias switch 27 HU+ U-phase Hall +input, and U-phase B-EMF connection pin for sensorless 28 ASGND Actuator small signal GND 29 ASGND Actuator small signal GND 30 VSPN SPN driver power supply 31 HU– U-phase Hall –input, and center tap connection pin for sensorless 32 HV+ V-phase Hall +input, and V-phase B-EMF connection pin for sensorless 33 HV– V-phase Hall –input, and center tap connection pin for sensorless 3 HA13631T Pin Description (cont) Pin No. Pin Name Function 34 HW+ W-phase Hall +input, and W-phase B-EMF connection pin for sensorless 35 HW– W-phase Hall –input, and center tap connection pin for sensorless 36 VCTL SPN driver control input 37 REFIN Reference voltage for control inputs. Common to all drivers. 38 RT Reference voltage. The IC’s internal reference current is determined by this voltage and the external resistor Rt. 39 CT1 Time constant for clock oscillation. The oscillator frequency is determined by the external capacitor and resistor Ct1 and Rt. 40 CT2 Time constant for PWM carrier. The amplitude is determined by the value of the external capacitor Ct1. 41 PWMDC Phase compensation connection pin for matching PWM carrier DC level with REFIN 42 SGND SPN small signal GND 43 VSS Control block power supply. 5 V 44 OP2IN Inverted input of OP amp. 2 for TRK driver control 45 TRKIN TRK driver control input 46 TRKN TRK driver N output 47 TRKP TRK driver P output 48 FCSGND FCS and TRK driver GND 49 VFCS FCS driver power supply 50 FCSP FCS driver P output 51 FCSN FCS driver N output 52 FCSN FCS driver control input 53 OP1IN Inverted input of OP amp. 1 for FCS driver control 54 NC No connection 55 NC No connection 56 ASGND Actuator small signal GND 4 HA13631T Block Diagram U V W CT VSS FGOUT EXTCOM VSPN 43 22 21 30 27 31 U 17 32 1.5 A V SPN output 19 W 20 33 Zero cross detection 34 Logic CLK 35 Rnf 18 26 COMM 23 VCTL 36 BRKSEL 24 ENABLE CE 25 PWM control SPN FCS TRK SLD TRY Vref C104 41 PWM carrier 40 Ct2 16 Vbst OTSD Rt 38 CLK OSC 39 15 Bias CLK 14 Ct1 C103 BP2 C103 BP1 13 REFIN 37 49 VFCS + OP1IN 53 − Vbst PWM control P 50 N 51 P 47 N 46 FCS OP1 FCSIN 52 + OP2IN 44 − Vbst PWM control TRK OP2 TRKIN 45 48 5 VSLD + OP3IN 3 − Vbst PWM control P 7 N 8 SLD OP3 SLDIN 2 M 54 55 10 VTRY + OP4IN 4 − Vbst PWM control P 11 N 12 TRY OP4 M TRYIN 6 5k 42 1 28 29 56 9 SGND 5 HA13631T Timing Chart 1. Start-up EN EXTCOM H L H L T2 T4 T1 T3 T5 T6 T7 T8 T9 T10 Tmext COMM H L Vspn Output voltage (U phase) PWM PWM 0 Vspn Output voltage (V phase) PWM PWM 0 Vspn Output voltage (W phase) PWM 0 + Output current (U phase) 0 − + Output current (V phase) 0 − + Output current (W phase) FGOUT 0 − H L Mute (B-EMF detection) Notes: 1. T1 to T10, and Tmext are set by CPU. 2. B-EMF sensing is masked while COMM = H. Also, when EXTCOM = H, B-EMF sensing is masked during the period from T1 to T6. 6 HA13631T 2. Acceleration EXTCOM H L U + Reverse start-up 0 voltage B-EMF − V W Tmint FGOUT H L Tmext COMM H L Vspn Output voltage (U phase) PWM PWM 0 Vspn Output voltage (V phase) PWM PWM PWM 0 Vspn Output voltage (W phase) PWM PWM 0 + Output current (U phase) 0 − + Output current (V phase) 0 − + Output current (W phase) 0 − Note: 1. B-EMF sensing is masked while COMM = H (= Tmext) or FGOUT = H (= Tmint). Tmext is set by the CPU. 7 HA13631T 3. Running EXTCOM H L U + Reverse start-up 0 voltage B-EMF − V W Td Zero cross detection input FGOUT U + V W 0 − H L Vspn Output voltage (U phase) PWM PWM 0 Vspn Output voltage (V phase) PWM PWM 0 Vspn Output voltage (W phase) PWM PWM 0 + Output current (U phase) 0 − + Output current (V phase) 0 − + Output current (W phase) 0 − Notes: 1. Delay time Td is determined by C105 to C107, and R109 to R116. Refer to the section of External Components. 2. B-EMF sensing is masked while FGOUT = H (= Tmint). The Tmint time is set internally. Refer to the Electrical Characteristics. 8 HA13631T Truth Table Table 1 CE and BRKSEL CE BRKSEL SPN Driver FCS Driver TRK Driver SLD Driver TRY Driver L L Z H H L H Z Z Z Z 2 Enable Enable Z Enable 3 Enable Enable Enable Z 2 Enable Enable Enable Z Enable * Enable * Enable * Notes: 1. Z: Hi impedance 2. Short brake mode 3. Reverse brake mode Table 2 EXTCOM and COMM EXTCOM COMM T1~T6 Mask T7~ Mask FGOUT (@P = 12) Logic L L OFF Internal 6 cycle/rotation Corresponds to sensor H OFF Internal L ON Internal H ON External H Corresponds to sensorless 36 pulse/rotation 9 HA13631T Application +5 V C101 R101a~d VSS C105a~d VSPN HUP U HUN V HVP W HVN RNF HWP HWN +5 V or +12 V Rnf C104 PWMDC CT2 R102a~d Ct2 C103 HB VBST COMM B1 EXTCOM B2 FGOUT MPU Rt FCSP CE FCSN RT FCSGND R103 R105 R106 R107 R108 R109 R110 FCS TRKP Ct1 R104 +5 V or +12 V VFCS BRKSEL CT1 TRKN OP1IN VSLD FCSIN SLDP OP2IN SLDN TRKIN P54 OP3IN P55 SLDIN SLDGND OP4IN VTRY TRYIN TRYP SGND 10 BSTGND VCTL REFIN DSP C102 TRYN ASGND TRK +5 V or +12 V M SLD +5 V or +12 V M TRY HA13631T External Components Parts No. Reccomended Value Reccomended Range Purpose Note R101a~d 2.4 kΩ ≤ 22 kΩ Filter resistor and atenuation for B-EMF 1 R102a~d 7.5 kΩ ≤ 22 kΩ Filter resistor and atenuation for B-EMF 1 R103, R104 — ≤ 220 kΩ for FCS driver gain setting R105, R106 — ≤ 220 kΩ for TRK driver gain setting R107, R108 — ≤ 220 kΩ for SLD driver gain setting R109, R110 — ≤ 220 kΩ for TRY driver gain setting 5 Rnf 0.25 Ω ≥ 0.25 Ω SPN driver current detection resistor 2 Rt 6.8 kΩ ≥ 5 kΩ Reference current setting C101 — ≥ 0.1 µF for Power supply by passing C102 0.1 µF — for Booster pumping C103 0.47 µF — for Booster output smoothing C104 2200 pF — for PWM carrier oscillation DC level adjustment C105a~d 0.1 µF — for B-EMF filter 1 Ct1 100 pF — Time constant for CLK oscillation 3, 4 Ct2 400 pF — PWM carrier generation time constant 3, 4 Notes: 1. The values of R101a~d, R102a~d, and C105a~d are determined by the following equation. Where, Nomax : Maximum rotation speed (rpm) P : Number of spindle motor poles (Total number of S poles and N poles) R101 1 ≥ (at Vspn = 5 V) R102 4 C105x = 11 Nomax P 1 1 + R101x R102x 2. The output current maximum value Iospnmax of SPN driver is controlled according to the following equation. However, Vspncl is the current limiter reference voltage. (See the electrical characteristics) Vspncl Iospnmax = Rnf 3. The CLK oscillation frequency fclk and Rt1 ⋅ Ct1 are related by the following equation. fclk = Vrt 2 Ct1 Rt (Vct1h − Vct1l) Where, Vrt : RT pin voltage (See the electrical characteristics) Vct1h : CT1 pin high voltage (See the electrical characteristics) Vct1l : CT1 pin low voltage (See the electrical characteristics) 11 HA13631T 4. The PWM carrier frequency fpwm and the amplitude Apwm are determined by the following equation. Vrt fpwm = 8 Ct1 Rt (Vct1h − Vct1l) 4 Ct1 Apwm = (Vct1h − Vct1l) Ct2 However, Ct2 = 4 Ct1 5. As 5 kΩ appears as an internal resistance at TRYIN (pin 6), caution is required when marking the gain setting. 12 HA13631T Absolute Maximum Ratings (Ta = 25°C) Item Symbol Rating Unit Note Control block supply voltage Vss 7 V 1 SPN supply voltage Vspn 7 V 1 FCS & TRK supply voltage Vfcs 9.5 V 1 SLD supply voltage Vsld 7 V 1 TRY supply voltage Vtry 9.5 V 1 Input voltage Vin 0 to Vss V 2 SPN output current Iospn 1.5 (2.5) A 3 FCS output current Iofcs 0.75 (1.5) A 3 TRK output current Iotrk 0.75 (1.5) A 3 SLD output current Iosld 1.0 (1.5) A 3 TRY output current Iotry 0.75 (1.5) A 3 Power dissipation Pt 2.5 W 4 Junction temperature Tj 150 °C 1 Storage temperature range Tstg –55 to +125 °C s m s ut D 0.5 m s y = 2 0.3 1/ 2 1/ Drain Current Id (A) 1 10 s m = 0.3 1 t= m 10 y ut D 3 1/ 0.5 t = 0.1 ms t= 1 t= s m 1 ASO of FCS ⋅ TRK ⋅ TRY Driver 2 1.5 t = 0.1 ms t= s m = 0.3 3 2 1.5 1 y 0.5 ASO of SLD Driver 3 t= 10 1 ut D Drain Current Id (A) ASO of SPN Driver t = 0.1 ms t= 3 2.5 2 1.5 1. Operating range is shown below. Vss = 4.5 to 5.5 V, Vspn = 4.25 to 5.75 V, Vfcs = 4.25 to 8.5 V, Vsld = 4.25 to 5.75 V, Vtry = 4.25 to 8.5 V, Tjopr = –20 to +135°C When operating with Vfcs > Vss, it is necessary to set Vtry = Vfcs. Also, settings must be made that satisfy the following condition: Vtry + Vss – Vsld ≤ 8.5 V 2. Applied to analog and logic input. 3. Values in parentheses are peak values. ASO (Area of Safety Operation) is shown below. Drain Current Id (A) Note: 0.2 0.2 0.2 0.1 1 2 3 5 10 15 20 The voltage between Drain and Source Vds (V) 0.1 1 2 3 5 10 15 20 The voltage between Drain and Source Vds (V) 0.1 1 2 3 5 10 15 20 The voltage between Drain and Source Vds (V) 4. Thermal resistance is shown below. θj-tab ≤ 6°C/W (back side tab soldering area is 70% or more) θj-a1 ≤ 30°C/W (mounted on 4 layer glass-epoxy board, back side tab soldering area is 70% or more) 13 HA13631T Electrical Characteristics (Ta = 25°C, Vss = 5 V, Vspn = 12 V, Vfcs = 5 V, Vsld = 12 V) Item Symbol Min Typ Max Unit Test Conditions Applicable Pins Quiescent current Iss0 — 0.2 0.5 mA CE = L VSS Ispn0 — 0.1 0.2 mA VSPN Ifcs0 — — 0.1 mA VFCS Isld0 — — 0.1 mA VSLD Itry0 — — 0.1 mA VTRY Iss1 — 25 35 mA Ispn1 — — 1.0 mA Ifcs1 — — 1.0 mA VFCS Isld1 — — 1.0 mA VSLD Itry1 — 4.0 6.0 mA VTRY Input current Iin — — ±10 µA Low level voltage Vil — — 0.8 V COMM, High level voltage Vih 2.0 — — V BRKSEL, CE Low level voltage Vol — 0.2 0.4 V Io = 1 mA Leakage current ICER1 — — ±10 µA VCE = 5.5 V Logic input Logic output 1 CE = H All load open Vin = 0 to Vss VSS VSPN EXTCOM, FGOUT Logic output 2 Low level voltage Vol — 0.3 0.6 V Io = 15 mA Leakage current ICER1 — 1.2 1.5 µA VCE = 5.5 V SPN driver Output on resistance Ronspn — 1.2 1.5 Ω Io = 1.0 A Leakage current Ioffspn — — ±100 µA Vspn = 15 V Slew rate SRspn — 60 — V/µs Load open Current limiter voltage Vspncl — 0.25 ±10% V Rnf = 0.25 Ω RNF Output on resistance Ronfcs — 3.0 3.75 Ω Io = 0.5 A FCSP/N, TRKP/N Leakage current Iofffcs — — ±100 µA Vfcs = 15 V Slew rate SRfcs — 60 — V/µs Load open Output on resistance Ronsld — 2.0 2.5 Ω Io = 1.0 A Leakage current Ioffsld — — ±100 µA Vsld = 15 V Slew rate SRsld — 60 — V/µs Load open FCS/ TRK driver SLD driver 14 Note HB U, V, W 1 5 1 5 SLDP/N 1 5 HA13631T Electrical Characteristics (Ta = 25°C, Vss = 5 V, Vspn = 12 V, Vfcs = 5 V, Vsld = 12 V) (cont) Symbol Min Typ Max Unit Test Conditions Applicable Pins Note Output on resistance Rontry — 3.0 3.75 Ω Io = 0.5 A TRYP/N 1 Leakage current Iofftry — — ±100 µA Vtry = 15 V Slew rate SRtry — 125 — V/µs Load open RT voltage Vrt — 1.37 ±5% V CT1 charge current Ict1p — 180 ±10% µA Rt = 6.8 kΩ CT1 discharge current Ict1n — –180 ±10% µA Rt = 6.8 kΩ CT1 high voltage Vct1h — 2.7 ±0.1 V CT1 low voltage Vct1l — 1.47 ±0.1 V CLK oscillation frequency fclk — 460 ±10% kHz Drive frequency fbst — fclk/2 — kHz Output voltage Vbst 16.0 16.5 — V Vspn = 12 V 9.0 9.5 — V Vspn = 5 V Item TRY driver CLK OSC Bias PWM carrier RT CT1 Ct1 = 100 pF BP1 PWM frequency fpwm — fclk/4 — kHz CT2 charge current Ict2p — 180 ±10% µA Rt = 6.8 kΩ CT2 discharge current Ict2n — –180 ±10% µA Rt = 6.8 kΩ DC feedback resistance Rdc — 20 ±20% kΩ Offset voltage Vospwm — — ±30 mV Zero cross Common mode input voltage range Vczd 0 — 4.0 V detection Input voltage range Vinzd 50 — — mVpp Hysteresis Vhyszd 11 16 21 mVpp FGOUT pulse width Tmint — 64/ fclk ±4/ fclk µs Input current Ictl — — ±3.0 µA Dead zone voltage Vdzctl ±50 — ±200 mV REFIN voltage range Vref 1.0 — 2.65 V Control gain Dspn 119 139 159 %/V SPN control 5 VBST CT2 PWMDC HU+/–, HV+/–, HW+/– FGOUT Vctl = 0.5 to 4.5 V VCTL 2 Ct2 = 680 pF, Ct1 = 100 pF REFIN 4 U, V, W 2 15 HA13631T Electrical Characteristics (Ta = 25°C, Vss = 5 V, Vspn = 12 V, Vfcs = 5 V, Vsld = 12 V) (cont) Symbol Min Typ Max Unit Test Conditions Applicable Pins Input current Iinop — — ±0.1 µA Vin = 0 to Vss OP1~4IN Offset voltage Vosop — — ±60 mV Open loop gain Gvolop — 64 — dB Gain bandwidth Bop — 1.6 — MHz OP1~ OP3 Output low voltage Voopl — — 0.5 V Io = –0.2 mA Output high voltage Vooph Vss –1.0 — — V Io = 0.2 mA FCSIN, TRKIN, SLDIN Output low voltage Voopl — — 0.5 V Io = –0.03 mA TRYIN Output high voltage Vooph Vss –1.7 — — V Io = 0.03 mA Item OP1~ OP4 OP4 FCSIN, f = 1kHz FCS/ TRK/ SLD/ TRY control Quiescent offset duty Dqfcs — — ±2 % FCS/TRK/SLD/ TRYIN = REFIN Control gain Dfcs 63 68 73 %/V Ct2 = 680 pF, Ct1 = 100 pF OTSD Operating temperature Tsd 135 180 — °C Hysteresis Thys — 80 — °C 16 Note TRKIN, 5 SLDIN, TRYIN 5 FCSP/N, TRKP/N, SLDP/N, TRYP/N 3 5 HA13631T 1. Specified by sum of the upper and lower saturation voltages. 2. See figure 1. Where, ∆D ∆Vctl Duty (%) Dspn = Vdzctl Reverse torque Forward torque 100 ∆D ∆Vctl 0 Vref Vctl(V) Figure 1 3. See figure 2. Where, x = fcs, trk, sld, try. ∆D ∆Vxin 100 X = fcs, trk, sld, try N P Dx = Duty (%) Note: ∆Vxin 50 0 ∆D Vref Vxin Figure 2 4. If Vref < 1.5 V, 100% PWM duty control may not be possible. 5. Design guide only. 17 HA13631T 18 rm ra e 1 rm ow +L ra pe Up er arm , Low 0 0 arm pper U 0.5 1.0 Output Current Iospn (A) 1.5 SLD Driver Output Saturation Voltage vs. Output Current 3 m r we 2 m r pe + Lo ar er Up 1 ar w , Lo arm arm per Up 0 0 0.5 1.0 Output Current Iosld (A) 1.5 Output Saturation Voltage Vsatfcs (V) 2 Output Saturation Voltage Vsattrr (V) SPN Driver Output Saturation Voltage vs. Output Current 3 TRY Driver Output Saturation Voltage vs. Output Current 3 FCS Driver Output Saturation Voltage vs. Output Current 3 m r we 2 rm + ar Lo ra e pp er w , Lo U 1 arm arm per Up 0 0 0.2 0.4 0.6 0.8 Output Current Iofcs (A) 1.0 TRK Driver Output Saturation Voltage vs. Output Current 3 m r we 2 m r pe + Lo ar er Up 1 ar per w , Lo arm arm Up 0 0 0.2 0.4 0.6 0.8 Output Current Iotrk (A) 1.0 RT Voltage vs. Junction Temperature 1.6 m r we 2 m r pe + Lo ar er Up 1 w , Lo arm rm ra pe Up 0 0 ar RT Voltage Vrt (V) Output Saturation Voltage Vsattry (V) Output Saturation Voltage Vsatsld (V) Output Saturation Voltage Vsatspn (V) Reference Data 0.2 0.4 0.6 0.8 Output Current Iotry (A) 1.0 1.4 1.2 1.0 −20 0 25 50 75 100 135 Junction Temperature Tj (°C) HA13631T Package Dimensions Unit: mm 14.0 14.2 Max 29 6.10 56 0.50 28 0.08 M 0.65 Max 0° – 8° (9.30) (7.20) 1 28 56 29 *Dimension including the plating thickness Base material dimension (2.50) (3.50) 0.10 *0.17 ± 0.05 0.15 ± 0.04 1.20 Max 1.0 8.10 ± 0.20 0.05 ± 0.05 1 *0.21 +0.04 –0.05 0.19 +0.03 –0.05 0.50 ± 0.1 Hitachi Code JEDEC EIAJ Weight (reference value) TTP-56DT — — 0.32 g 19 HA13631T Cautions 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi’s sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products. Hitachi, Ltd. Semiconductor & Integrated Circuits. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109 URL NorthAmerica : http:semiconductor.hitachi.com/ Europe : http://www.hitachi-eu.com/hel/ecg Asia (Singapore) : http://www.has.hitachi.com.sg/grp3/sicd/index.htm Asia (Taiwan) : http://www.hitachi.com.tw/E/Product/SICD_Frame.htm Asia (HongKong) : http://www.hitachi.com.hk/eng/bo/grp3/index.htm Japan : http://www.hitachi.co.jp/Sicd/indx.htm For further information write to: Hitachi Semiconductor (America) Inc. 179 East Tasman Drive, San Jose,CA 95134 Tel: <1> (408) 433-1990 Fax: <1>(408) 433-0223 Hitachi Europe GmbH Electronic components Group Dornacher Straβe 3 D-85622 Feldkirchen, Munich Germany Tel: <49> (89) 9 9180-0 Fax: <49> (89) 9 29 30 00 Hitachi Europe Ltd. Electronic Components Group. Whitebrook Park Lower Cookham Road Maidenhead Berkshire SL6 8YA, United Kingdom Tel: <44> (1628) 585000 Fax: <44> (1628) 778322 Hitachi Asia Pte. Ltd. 16 Collyer Quay #20-00 Hitachi Tower Singapore 049318 Tel: 535-2100 Fax: 535-1533 Hitachi Asia Ltd. Taipei Branch Office 3F, Hung Kuo Building. No.167, Tun-Hwa North Road, Taipei (105) Tel: <886> (2) 2718-3666 Fax: <886> (2) 2718-8180 Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Tsim Sha Tsui, Kowloon, Hong Kong Tel: <852> (2) 735 9218 Fax: <852> (2) 730 0281 Telex: 40815 HITEC HX Copyright ' Hitachi, Ltd., 2000. All rights reserved. Printed in Japan. 20