ON MC74VHCT08AMG Quad 2−input and gate Datasheet

MC74VHCT08A
Quad 2−Input AND Gate
The MC74VHCT08A is an advanced high speed CMOS 2−input
AND gate fabricated with silicon gate CMOS technology. It achieves
high speed operation similar to equivalent Bipolar Schottky TTL
while maintaining CMOS low power dissipation.
The VHCT inputs are compatible with TTL levels. This device can
be used as a level converter for interfacing 3.3 V to 5.0 V, because it
has full 5.0 V CMOS level output swings.
The VHCT08A input structures provide protection when voltages
between 0 V and 5.5 V are applied, regardless of the supply voltage.
The output structures also provide protection when VCC = 0 V. These
input and output structures help prevent device destruction caused by
supply voltage − input/output voltage mismatch, battery backup, hot
insertion, etc.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
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MARKING
DIAGRAMS
14
SOIC−14
D SUFFIX
CASE 751A
1
1
14
Features
•
•
•
•
•
•
•
•
•
•
•
•
High Speed: tPD = 4.3 ns (Typ) at VCC = 5 V
Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C
TTL−Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2 V to 5.5 V Operating Range
Low Noise: VOLP = 0.8 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance: Human Body Model; > 2000 V,
Machine Model; > 200 V
Chip Complexity: 24 FETs or 6 Equivalent Gates
Pb−Free Packages are Available*
VHCT08AG
AWLYWW
1
VHCT
08A
ALYWG
G
TSSOP−14
DT SUFFIX
CASE 948G
1
14
1
SOEIAJ−14
M SUFFIX
CASE 965
VHCT08
ALYWG
1
A
= Assembly Location
WL, L
= Wafer Lot
Y, YY
= Year
WW, W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
March, 2006 − Rev. 5
1
Publication Order Number:
MC74VHCT08A/D
MC74VHCT08A
A1
B1
A2
B2
A3
B3
A4
B4
1
3
2
4
6
5
VCC
B4
A4
Y4
B3
A3
Y3
14
13
12
11
10
9
8
1
2
3
4
5
6
7
A1
B1
Y1
A2
B2
Y2
GND
Y1
Y2
Y = AB
9
8
10
12
11
13
Y3
(Top View)
Y4
Figure 2. Pinout: 14−Lead Packages
Figure 1. Logic Diagram
FUNCTION TABLE
Inputs
Output
A
B
Y
L
L
H
H
L
H
L
H
L
L
L
H
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MAXIMUM RATINGS*
Rating
DC Supply Voltage
Symbol
Value
Unit
VCC
–0.5 to +7.0
V
DC Input Voltage
Vin
–0.5 to +7.0
V
DC Output Voltage
Vout
–0.5 to VCC +0.5
V
Input Diode Current
IIK
−20
mA
Output Diode Current
IOK
±20
mA
DC Output Current, per Pin
Iout
±25
mA
DC Supply Current, VCC and GND Pins
ICC
±50
mA
Power Dissipation in Still Air, SOIC Packages†
TSSOP Package†
PD
500
450
mW
Storage Temperature
Tstg
–65 to +150
°C
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance circuit. For proper operation, Vin and
Vout should be constrained to the
range GND v (Vin or Vout) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or V CC ).
Unused outputs must be left open.
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
* Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or
conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute−maximum−rated conditions is not
implied.
†Derating − SOIC Packages: – 7 mW/°C from 65° to 125°C
TSSOP Package: − 6.1 mW/°C from 65° to 125°C
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RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Min
Max
Unit
DC Supply Voltage
VCC
4.5
5.5
V
DC Input Voltage
Vin
0
5.5
V
DC Output Voltage
Vout
0
VCC
V
Operating Temperature
TA
−40
+ 85
°C
Input Rise and Fall Time VCC = 5.0 V ±0.5 V
tr, tf
0
20
ns/V
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2
MC74VHCT08A
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DC ELECTRICAL CHARACTERISTICS
Parameter
Test Conditions
Symbol
TA = 25°C
VCC
(V)
Min
1.2
2.0
2.0
Typ
Minimum High−Level Input Voltage
VIH
3.0
4.5
5.5
Maximum Low−Level Input Voltage
VIL
3.0
4.5
5.5
VOH
3.0
4.5
2.9
4.4
3.0
4.5
2.58
3.94
Minimum High−Level Output Voltage
VIN = VIH or VIL
VIN = VIH or VIL
IOH = − 50 mA
VIN = VIH or VIL
IOH = −4 mA
IOH = −8 mA
Maximum Low−Level Output Voltage
VIN = VIH or VIL
VOL
VIN = VIH or VIL
IOL = 50 mA
TA ≤ 125°C
Min
Min
Max
1.2
2.0
2.0
0.53
0.8
0.8
3.0
4.5
3.0
4.5
VIN = VIH or VIL
IOL = 4 mA
IOL = 8 mA
Max
TA ≤ 85°C
0.0
0.0
Max
1.2
2.0
2.0
0.53
0.8
0.8
V
0.53
0.8
0.8
2.9
4.4
2.9
4.4
2.48
3.80
2.34
3.66
Unit
V
V
0.1
0.1
0.1
0.1
0.1
0.1
3.0
4.5
0.36
0.36
0.44
0.44
0.52
0.52
V
VIN = 5.5 V or
GND
IIN
0 to 5.5
±0.1
±1.0
±1.0
mA
Maximum Quiescent Supply Current
VIN = VCC or GND
ICC
5.5
2.0
20
40
mA
Quiescent Supply Current
Input: VIN = 3.4 V
ICCT
5.5
1.35
1.50
1.65
mA
VOUT = 5.5 V
IOPD
0.0
0.5
5.0
10
mA
Maximum Input Leakage Current
Output Leakage Current
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)
TA ≤ 85°C
TA = 25°C
Characteristic
Test Conditions
Symbol
Maximum Propagation Delay,
Input A or B to Y
VCC = 3.0 ± 0.3V CL = 15 pF
CL = 50 pF
tPLH,
tPHL
Min
VCC = 5.0 ± 0.5V CL = 15 pF
CL = 50 pF
Maximum Input Capacitance
Cin
CPD
Typ
Max
6.2
8.7
8.8
12.3
4.3
5.8
4
Min
Max
TA ≤ 125°C
Max
Max
Unit
10.5
14.0
14.0
17.5
ns
5.9
7.9
7.0
9.0
9.0
11.0
10
10
10
pF
Typical @ 25°C, VCC = 5.0V
20
Power Dissipation Capacitance (Note 1)
pF
1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC / 4 (per gate). CPD is used to determine the
no−load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.7
NOISE CHARACTERISTICS (Input tr = tf = 3.0 ns, CL = 50pF, VCC = 5.0 V)
TA = 25°C
Symbol
Typ
Max
Unit
Quiet Output Maximum Dynamic VOL
VOLP
0.3
0.8
V
Quiet Output Minimum Dynamic VOL
VOLV
−0.3
−0.8
V
Minimum High Level Dynamic Input Voltage
VIHD
3.5
V
Maximum Low Level Dynamic Input Voltage
VILD
1.5
V
Characteristic
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3
MC74VHCT08A
3.0V
A or B
1.5V
OUTPUT
DEVICE
UNDER
TEST
GND
tPLH
tPHL
TEST
POINT
C L*
VOH
Y
1.5V
*Includes all probe and jig capacitance
VOL
Figure 3. Switching Waveforms
Figure 4. Test Circuit
ORDERING INFORMATION
Device
Package
MC74VHCT08ADR2
SOIC−14
MC74VHCT08ADR2G
SOIC−14
(Pb−Free)
MC74VHCT08ADTR2
TSSOP−14*
MC74VHCT08ADTR2G
TSSOP−14*
MC74VHCT08AM
SOEIAJ−14
MC74VHCT08AMG
SOEIAJ−14
(Pb−Free)
MC74VHCT08AMEL
SOEIAJ−14
MC74VHCT08AMELG
SOEIAJ−14
(Pb−Free)
Shipping †
2500 Units / Tape & Reel
2500 Units / Tape &Reel
50 Units / Rail
2000 Units / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*These packages are inherently Pb−Free.
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4
MC74VHCT08A
PACKAGE DIMENSIONS
SOIC−14
D SUFFIX
CASE 751A−03
ISSUE G
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
−A−
14
8
−B−
1
P 7 PL
0.25 (0.010)
7
G
B
M
M
F
R X 45 _
C
−T−
SEATING
PLANE
D 14 PL
0.25 (0.010)
T B
M
J
M
K
S
A
S
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
8.55
8.75
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.337
0.344
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0_
7_
0.228
0.244
0.010
0.019
TSSOP−14
CASE 948G−01
ISSUE A
14X K REF
0.10 (0.004)
0.15 (0.006) T U
M
T U
V
S
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
S
S
N
2X
14
L/2
0.25 (0.010)
8
M
B
−U−
L
PIN 1
IDENT.
F
7
1
0.15 (0.006) T U
N
S
DETAIL E
K
A
−V−
ÉÉÉ
ÇÇÇ
ÇÇÇ
ÉÉÉ
ÇÇÇ
K1
J J1
SECTION N−N
−W−
C
0.10 (0.004)
−T− SEATING
PLANE
D
G
H
DETAIL E
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5
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MILLIMETERS
MIN
MAX
4.90
5.10
4.30
4.50
−−−
1.20
0.05
0.15
0.50
0.75
0.65 BSC
0.50
0.60
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0_
8_
INCHES
MIN MAX
0.193 0.200
0.169 0.177
−−− 0.047
0.002 0.006
0.020 0.030
0.026 BSC
0.020 0.024
0.004 0.008
0.004 0.006
0.007 0.012
0.007 0.010
0.252 BSC
0_
8_
MC74VHCT08A
PACKAGE DIMENSIONS
SOEIAJ−14
CASE 965−01
ISSUE A
14
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE
MOLD FLASH OR PROTRUSIONS AND ARE
MEASURED AT THE PARTING LINE. MOLD FLASH
OR PROTRUSIONS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
LE
8
Q1
E HE
L
7
1
M_
DETAIL P
Z
D
VIEW P
A
e
c
A1
b
0.13 (0.005)
M
0.10 (0.004)
DIM
A
A1
b
c
D
E
e
HE
0.50
LE
M
Q1
Z
MILLIMETERS
MIN
MAX
−−−
2.05
0.05
0.20
0.35
0.50
0.10
0.20
9.90
10.50
5.10
5.45
1.27 BSC
7.40
8.20
0.50
0.85
1.10
1.50
10 _
0_
0.70
0.90
−−−
1.42
INCHES
MIN
MAX
−−− 0.081
0.002
0.008
0.014
0.020
0.004
0.008
0.390
0.413
0.201
0.215
0.050 BSC
0.291
0.323
0.020
0.033
0.043
0.059
10 _
0_
0.028
0.035
−−− 0.056
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