HITACHI HD74ALVCH16543

HD74ALVCH16543
16-bit Registered Transceivers with 3-state Outputs
ADE-205-169A (Z)
2nd. Edition
December 1999
Description
The HD74ALVCH16543 can be used as two 8-bit transceivers or one 16-bit transceiver. Separate latch
enable (LEAB or LEBA) and output enable (OEAB or OEBA) inputs are provided for each register to
permit independent control in either direction of data flow. The A to B enable (CEAB) input must be low
in order to enter data from A or to output data from B. If CEAB is low and LEAB is low, the A to B
latches are transparent; a subsequent low to high transition of LEAB puts the A latches in the storage mode.
With CEAB and OEAB both low, the 3-state B outputs are active and reflect the data present at the output
of the A latches. Data flow from B to A is similar but requires using CEBA, LEBA, and OEBA. Active
bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
Features
• VCC = 2.3 V to 3.6 V
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
• High output current ±24 mA (@V CC = 3.0 V)
• Bus hold on data inputs eliminates the need for external pullup / pulldown resistors
HD74ALVCH16543
Function Table *1
Inputs
Output B
CEAB
LEAB
OEAB
A
H
X
X
X
Z
X
X
H
X
Z
L
H
L
X
B0
L
L
L
L
L
L
L
L
H
H
*2
H : High level
L : Low level
X : Immaterial
Z : High impedance
Notes 1. A to B data flow is shown; B to A flow control is the same except that it uses CEBA, LEBA, and
OEBA.
2. Output level before the indicated steady state input conditions were established.
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HD74ALVCH16543
Pin Arrangement
1OEAB 1
56 1OEBA
1LEAB 2
55 1LEBA
1CEAB 3
54 1CEBA
GND 4
53 GND
1A1 5
52 1B1
1A2 6
VCC 7
51 1B2
1A3 8
49 1B3
1A4 9
48 1B4
1A5 10
47 1B5
GND 11
46 GND
1A6 12
45 1B6
1A7 13
44 1B7
1A8 14
43 1B8
2A1 15
42 2B1
2A2 16
41 2B2
2A3 17
40 2B3
GND 18
39 GND
2A4 19
38 2B4
2A5 20
37 2B5
2A6 21
36 2B6
VCC 22
35 VCC
2A7 23
34 2B7
2A8 24
33 2B8
GND 25
32 GND
50 VCC
2CEAB 26
31 2CEBA
2LEAB 27
30 2LEBA
2OEAB 28
29 2OEBA
(Top view)
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HD74ALVCH16543
Absolute Maximum Ratings
Item
Supply voltage
Input voltage
*1, 2
Symbol
Ratings
Unit
VCC
–0.5 to 4.6
V
VI
–0.5 to 4.6
V
–0.5 to VCC +0.5
Output voltage
*1, 2
Conditions
Except I/O ports
I/O ports
VO
–0.5 to VCC +0.5
V
Input clamp current
I IK
–50
mA
VI < 0
Output clamp current
I OK
±50
mA
VO < 0 or VO > VCC
Continuous output current
IO
±50
mA
VO = 0 to VCC
TSSOP
±100
Maximum power dissipation
at Ta = 55°C (in still air) *3
PT
1
W
Storage temperature
Tstg
–65 to 150
°C
Notes:
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage
to the device. These are stress ratings only, and functional operation of the device at these or
any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute maximum rated conditions for extended periods may affect device
reliability.
1. The input and output negative voltage ratings may be exceeded if the input and output clamp
current ratings are observed.
2. This value is limited to 4.6 V maximum.
3. The maximum package power dissipation is calculated using a junction temperature of 150°C
and a board trace length of 750 mils.
Recommended Operating Conditions
Item
Symbol
Min
Max
Unit
Supply voltage
VCC
2.3
3.6
V
Input voltage
VI
0
VCC
V
Output voltage
VO
0
VCC
V
High level output current
I OH
—
–12
mA
—
–12
VCC = 2.7 V
—
–24
VCC = 3.0 V
—
12
—
12
VCC = 2.7 V
—
24
VCC = 3.0 V
Low level output current
I OL
mA
Input transition rise or fall rate
∆t / ∆v
0
10
ns / V
Operating temperature
Ta
–40
85
°C
Note: Unused control inputs must be held high or low to prevent them from floating.
4
Conditions
VCC = 2.3 V
VCC = 2.3 V
HD74ALVCH16543
Logic Diagram
1OEBA
1CEBA
1LEBA
1OEAB
1CEAB
1LEAB
1A1
56
54
55
1
3
2
C1
5
1D
52
1B1
C1
1D
To seven other channels
2OEBA
2CEBA
2LEBA
2OEAB
2CEAB
2LEAB
2A1
29
31
30
28
26
27
C1
15
1D
42
2B1
C1
1D
To seven other channels
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HD74ALVCH16543
Electrical Characteristics (Ta = –40 to 85°C)
Item
Symbol VCC (V) *1
Input voltage
VIH
VIL
Output voltage
VOH
Min
Max
Unit
2.3 to 2.7
1.7
—
V
2.7 to 3.6
2.0
—
2.3 to 2.7
—
0.7
2.7 to 3.6
—
0.8
I OH = –100 µA
Min to Max VCC–0.2
—
2.3
2.0
—
I OH = –6 mA, VIH = 1.7 V
2.3
1.7
—
I OH = –12 mA, VIH = 1.7 V
2.7
2.2
—
I OH = –12 mA, VIH = 2.0 V
3.0
2.4
—
I OH = –12 mA, VIH = 2.0 V
3.0
2.0
—
I OH = –24 mA, VIH = 2.0 V
Min to Max —
0.2
I OL = 100 µA
2.3
—
0.4
I OL = 6 mA, VIL = 0.7 V
2.3
—
0.7
I OL = 12 mA, VIL = 0.7 V
2.7
—
0.4
I OL = 12 mA, VIL = 0.8 V
3.0
—
0.55
I OL = 24 mA, VIL = 0.8 V
I IN
3.6
—
±5
I IN (hold)
2.3
45
—
VIN = 0.7 V
2.3
–45
—
VIN = 1.7 V
3.0
75
—
VIN = 0.8 V
3.0
–75
—
VIN = 2.0 V
3.6
—
±500
VIN = 0 to 3.6 V
I OZ
3.6
—
±10
µA
VOUT = VCC or GND
Quiescent supply current I CC
3.6
—
40
µA
VIN = VCC or GND
3.0 to 3.6
—
750
µA
VIN = one input at (VCC–0.6) V,
other inputs at V CC or GND
VOL
Input current
Off state output current
*2
∆I CC
V
Test Conditions
µA
VIN = VCC or GND
Notes: 1. For conditions shown as Min or Max, use the appropriate values under recommended operating
conditions.
2. For I/O ports, the parameter IOZ includes the input leakage current.
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HD74ALVCH16543
Switching Characteristics (Ta = –40 to 85°C)
Item
Symbol VCC (V)
Min
Typ
Max
Unit
FROM
(Input)
TO
(Output)
Propagation delay time
t PLH
2.5±0.2
1.0
—
5.1
ns
A or B
B or A
t PHL
2.7
—
—
4.8
3.3±0.3
1.0
—
4.3
2.5±0.2
1.1
—
6.5
LE
A or B
2.7
—
—
6.2
3.3±0.3
1.1
—
5.0
t ZH
2.5±0.2
1.0
—
7.2
CE
A or B
t ZL
2.7
—
—
6.9
3.3±0.3
1.0
—
5.6
2.5±0.2
1.0
—
6.8
OE
A or B
2.7
—
—
6.3
3.3±0.3
1.0
—
5.3
t HZ
2.5±0.2
2.0
—
6.1
CE
A or B
t LZ
2.7
—
—
6.2
3.3±0.3
1.5
—
5.1
2.5±0.2
1.6
—
5.7
OE
A or B
2.7
—
—
4.8
3.3±0.3
1.1
—
4.6
Output enable time
Output disable time
ns
ns
Input capacitance
CIN
3.3
—
3.5
—
pF
Control inputs
Output capacitance
CIN / O
3.3
—
7.0
—
pF
A or B ports
7
HD74ALVCH16543
Switching Characteristics (Ta = –40 to 85°C) (Cont)
Item
Symbol VCC (V)
Setup time
t su
Hold time
Pulse width
8
th
tw
Min
Typ
Max
Unit
FROM (Input)
2.5±0.2
1.2
—
—
ns
Data before CE↑
2.7
1.5
—
—
3.3±0.3
1.2
—
—
2.5±0.2
1.2
—
—
Data before LE↑
2.7
1.5
—
—
CE “L”
3.3±0.3
1.2
—
—
2.5±0.2
1.2
—
—
2.7
0.8
—
—
3.3±0.3
1.3
—
—
2.5±0.2
1.2
—
—
Data after LE↑
2.7
0.8
—
—
CE “L”
3.3±0.3
1.3
—
—
2.5±0.2
3.3
—
—
2.7
3.3
—
—
3.3±0.3
3.3
—
—
ns
ns
Data after CE↑
CE or LE “L”
HD74ALVCH16543
• Test Circuit
See under table
500 Ω
S1
OPEN
GND
*1
C L = 50 pF
500 Ω
Load Circuit for Outputs
Symbol
t PLH / t PHL
t su / t h / t w
t ZH/ t HZ
t ZL / t LZ
Vcc=2.5±0.2V
Vcc=2.7V,
3.3±0.3V
OPEN
OPEN
GND
GND
4.6 V
6.0 V
Note: 1. C L includes probe and jig capacitance.
9
HD74ALVCH16543
• Waveforms – 1
tf
tr
90 %
Input
VIH
90 %
Vref
Vref
10 %
10 %
GND
t PHL
t PLH
VOH
Output
Vref
Vref
VOL
• Waveforms – 2
tr
VIH
90 %
Vref
Timing Input
10 %
tsu
GND
th
VIH
Data Input
Vref
Vref
GND
tw
VIH
Input
Vref
Vref
GND
10
HD74ALVCH16543
• Waveforms – 3
Output
Control
tf
tr
VIH
90 %
90 %
Vref
Vref
10 %
t ZL
10 %
GND
t LZ
≈VOH1
Vref
Waveform - A
t ZH
Waveform - B
VOL + 0.3 V
t HZ
VOH – 0.3 V
Vref
VOL
VOH
≈VOL1
TEST
VIH
Vref
VOH1
VOL1
Vcc=2.5±0.2V
Vcc=2.7V,
3.3±0.3V
2.3 V
2.7 V
1.2 V
2.3 V
1.5 V
3.0 V
GND
GND
Notes: 1. All input pulses are supplied by generators having the following characteristics:
PRR ≤ 10 MHz, Zo = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
2. Waveform – A is for an output with internal conditions such that the output is low
except when disabled by the output control.
3. Waveform – B is for an output with internal conditions such that the output is high
except when disabled by the output control.
4. The output are measured one at a time with one transition per measurement.
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HD74ALVCH16543
Package Dimensions
Unit : mm
+0.3
14.00 –0.1
29
6.10 +0.3
–0.1
56
0.20 +0.1
–0.05
0.50
28
0.08 M
0.15 ± 0.05
1
1.20 max
0.10
0.05 Min
0.40 Max
8.10 ± 0.3
10° Max
0.50 ± 0.1
Hitachi code
EIAJ code
JEDEC code
12
TTP-56D
—
—
HD74ALVCH16543
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
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received the latest product standards or specifications before final design, purchase or use.
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contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
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products.
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Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.
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