AUIRLS4030
AUIRLSL4030
AUTOMOTIVE GRADE
Features
Optimized for Logic Level Drive
Advanced Process Technology
Ultra Low On-Resistance
Logic Level Gate Drive
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
HEXFET® Power MOSFET
Package Type
AUIRLSL4030
TO-262
AUIRLS4030
D2-Pak
100V
RDS(on) typ.
3.4m
max
4.3m
G
S
ID
180A
D
D
Description
Specifically designed for Automotive applications, this HEXFET®
Power MOSFET utilizes the latest processing techniques to
achieve extremely low on-resistance per silicon area. Additional
features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely
efficient and reliable device for use in Automotive applications and
a wide variety of other applications.
Base part number
VDSS
D
S
G
G
2
D Pak
AUIRLS4030
G
Gate
Standard Pack
Form
Quantity
Tube
50
Tube
50
Tape and Reel Left
800
S
D
TO-262
AUIRLSL4030
D
Drain
S
Source
Orderable Part Number
AUIRLSL4030
AUIRLS4030
AUIRLS4030TRL
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance
and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless
otherwise specified.
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Parameter
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy (Thermally limited)
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery
Operating Junction and
Storage Temperature Range
Soldering Temperature for 10 seconds
Thermal Resistance
Symbol
Parameter
Junction-to-Case
RJC
Junction-to-Ambient (PCB Mount), D2 Pak
RJA
Max.
180
130
730
370
2.5
± 16
305
See Fig. 14, 15, 22a, 22b
Units
21
-55 to + 175
V/ns
A
W
W/°C
V
mJ
A
mJ
°C
300(1.6mm from case)
Typ.
–––
–––
Max.
0.4
40
Units
°C/W
HEXFET® is a registered trademark of Infineon.
*Qualification standards can be found at www.infineon.com
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AUIRLS/SL4030
Static Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
100
–––
–––
V VGS = 0V, ID = 250µA
––– 0.10 ––– V/°C Reference to 25°C, ID = 5mA
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient
–––
3.4
4.3
VGS = 10V, ID = 110A
Static Drain-to-Source On-Resistance
RDS(on)
m
–––
3.6
4.5
VGS = 4.5V, ID = 92A
VGS(th)
Gate Threshold Voltage
1.0
–––
2.5
V VDS = VGS, ID = 250µA
gfs
Forward Trans conductance
320
–––
–––
S VDS = 25V, ID = 110A
–––
–––
20
VDS = 100V, VGS = 0V
Drain-to-Source Leakage Current
µA
IDSS
–––
–––
250
VDS = 100V, VGS = 0V, TJ = 125°C
IGSS
Gate-to-Source Forward Leakage
–––
–––
100
VGS = 16V
nA
Gate-to-Source Reverse Leakage
–––
––– -100
VGS = -16V
RG
Internal Gate Resistance
–––
2.1
–––
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
Qg
Total Gate Charge
–––
87
130
ID = 110A
VDS = 50V
Qgs
Gate-to-Source Charge
–––
27
–––
nC
VGS = 4.5V
Qgd
Gate-to-Drain ("Miller") Charge
–––
45
–––
Qsync
Total Gate Charge Sync. (Qg - Qgd)
–––
42
–––
td(on)
Turn-On Delay Time
–––
74
–––
VDD = 65V
ID = 110A
tr
Rise Time
–––
330
–––
ns
td(off)
Turn-Off Delay Time
–––
110
–––
RG = 2.7
VGS = 4.5V
Fall Time
–––
170
–––
tf
Ciss
Input Capacitance
––– 11360 –––
VGS = 0V
VDS = 50V
Coss
Output Capacitance
–––
670
–––
Crss
Reverse Transfer Capacitance
–––
290
–––
pF ƒ = 1.0 MHz
Coss eff. (ER) Effective Output Capacitance (Energy Related) –––
760
–––
VGS = 0V, VDS = 0V to 80V
Coss eff. (TR) Effective Output Capacitance (Time Related)
––– 1140 –––
VGS = 0V, VDS = 0V to 80V
Diode Characteristics
Symbol
Parameter
Continuous Source Current
IS
(Body Diode)
Pulsed Source Current
ISM
(Body Diode)
VSD
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
Min.
Typ.
Max. Units
–––
–––
180
–––
–––
730
–––
–––
–––
–––
–––
–––
–––
50
60
88
130
3.3
1.3
–––
–––
–––
–––
–––
A
V
ns
nC
A
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 110A, VGS = 0V
TJ = 25°C VR = 85V,
TJ = 125°C I = 110A
F
TJ = 25°C di/dt = 100A/µs
TJ = 125°C
TJ = 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.05mH, RG = 25, IAS = 110A, VGS =10V. Part not recommended for use above this value.
ISD 110A, di/dt 1330A/µs, VDD V(BR)DSS, TJ 175°C.
Pulse width 400µs; duty cycle 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
R is measured at TJ approximately 90°C.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques
refer to application note #AN-994.
RJC value shown is at time zero.
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AUIRLS/SL4030
1000
1000
100
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
8.0V
4.5V
3.5V
3.0V
2.7V
2.5V
BOTTOM
100
10
2.5V
2.5V
60µs PULSE WIDTH
60µs PULSE WIDTH
Tj = 175°C
Tj = 25°C
10
1
0.1
1
10
100
0.1
1000
100
1000
2.5
RDS(on) , Drain-to-Source On Resistance
(Normalized)
1000
ID, Drain-to-Source Current (A)
10
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
TJ = 175°C
100
TJ = 25°C
10
V DS = 50V
60µs PULSE WIDTH
1.0
ID = 110A
V GS = 10V
2.0
1.5
1.0
0.5
0.0
1
2
3
4
5
-60 -40 -20 0 20 40 60 80 100 120 140160 180
TJ , Junction Temperature (°C)
V GS, Gate-to-Source Voltage (V)
Fig 4. Normalized On-Resistance vs. Temperature
Fig 3. Typical Transfer Characteristics
100000
5.0
VGS = 0V,
f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = C gd
V GS, Gate-to-Source Voltage (V)
ID= 110A
Coss = Cds + Cgd
C, Capacitance (pF)
1
V DS, Drain-to-Source Voltage (V)
V DS, Drain-to-Source Voltage (V)
Ciss
10000
Coss
1000
Crss
V DS= 80V
V DS= 50V
4.0
3.0
2.0
1.0
0.0
100
1
10
100
V DS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
3
VGS
15V
10V
8.0V
4.5V
3.5V
3.0V
2.7V
2.5V
0
20
40
60
80
100
QG, Total Gate Charge (nC)
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
2015-11-6
AUIRLS/SL4030
10000
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
TJ = 175°C
100
TJ = 25°C
10
1
OPERATION IN THIS AREA
LIMITED BY R DS (on)
1000
100µsec
100
10msec
1msec
DC
10
Tc = 25°C
Tj = 175°C
Single Pulse
V GS = 0V
0.1
0.0
0.5
1.0
1.5
2.0
1
2.5
0
V SD, Source-to-Drain Voltage (V)
180
ID, Drain Current (A)
160
140
120
100
80
60
40
20
0
75
100
125
150
Id = 5mA
120
115
110
105
100
95
90
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
175
TJ , Temperature ( °C )
Fig 9. Maximum Drain Current vs. Case Temperature
4.5
Fig 10. Drain-to-Source Breakdown Voltage
EAS , Single Pulse Avalanche Energy (mJ)
1400
4.0
ID
17A
40A
BOTTOM 110A
TOP
1200
3.5
1000
3.0
Energy (µJ)
1000
125
TC , Case Temperature (°C)
2.5
2.0
1.5
1.0
0.5
0.0
-20
0
20
40
60
80
100
120
VDS, Drain-to-Source Voltage (V)
Fig 11. Typical Coss Stored Energy
4
100
Fig 8. Maximum Safe Operating Area
V (BR)DSS, Drain-to-Source Breakdown Voltage (V)
200
50
10
VDS, Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
25
1
800
600
400
200
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 12. Maximum Avalanche Energy vs. Drain Current
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AUIRLS/SL4030
Thermal Response ( Z thJC ) °C/W
1
D = 0.50
0.1
0.20
0.10
J
0.05
0.01
0.02
0.01
R1
R1
J
1
R2
R2
R3
R3
C
2
1
2
3
C
3
Ci= iRi
Ci= iRi
Ri (°C/W)
i (sec)
0.0477
0.000071
0.1631
0.000881
0.1893
0.007457
0.001
SINGLE PULSE
( THERMAL RESPONSE )
0.0001
1E-006
1E-005
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Avalanche Current (A)
Duty Cycle = Single Pulse
100
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
0.01
0.05
0.10
10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Avalanche Current vs. Pulse Width
350
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 110A
EAR , Avalanche Energy (mJ)
300
250
200
150
100
50
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 15. Maximum Avalanche Energy vs. Temperature
5
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1.Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for every
part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
22a, 22b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 14)
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
2015-11-6
AUIRLS/SL4030
40
IF = 73A
V R = 85V
35
2.0
TJ = 25°C
TJ = 125°C
30
1.5
IRRM (A)
VGS(th) , Gate threshold Voltage (V)
2.5
ID = 250µA
ID = 1.0mA
ID = 1.0A
1.0
25
20
15
10
0.5
5
0.0
0
-75 -50 -25
0
0
25 50 75 100 125 150 175
200
600
800
1000
Fig 17. Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
35
800
IF = 110A
V R = 85V
30
IF = 73A
VR = 85V
720
640
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
560
QRR (nC)
25
IRRM (A)
400
diF /dt (A/µs)
T J , Temperature ( °C )
20
15
480
400
320
10
240
5
160
0
80
0
200
400
600
800
1000
0
200
diF /dt (A/µs)
400
600
800
1000
diF /dt (A/µs)
Fig 18. Typical Recovery Current vs. dif/dt
Fig 19. Typical Stored Charge vs. dif/dt
880
IF = 110A
VR = 85V
800
720
TJ = 25°C
TJ = 125°C
QRR (nC)
640
560
480
400
320
240
160
80
0
200
400
600
800
1000
diF /dt (A/µs)
Fig 20. Typical Stored Charge vs. dif/dt
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AUIRLS/SL4030
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V(BR)DSS
tp
15V
L
VDS
D.U.T
RG
IAS
20V
tp
DRIVER
+
V
- DD
A
I AS
0.01
Fig 22a. Unclamped Inductive Test Circuit
Fig 22b. Unclamped Inductive Waveforms
Fig 23a. Switching Time Test Circuit
Fig 23b. Switching Time Waveforms
Id
Vds
Vgs
VDD
Vgs(th)
Qgs1 Qgs2
Fig 24a. Gate Charge Test Circuit
7
Qgd
Qgodr
Fig 24b. Gate Charge Waveform
2015-11-6
AUIRLS/SL4030
D2Pak (TO-263AB) Package Outline (Dimensions are shown in millimeters (inches))
D2Pak (TO-263AB) Part Marking Information
Part Number
AUIRLS4030
YWWA
IR Logo
XX
Date Code
Y= Year
WW= Work Week
XX
Lot Code
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
8
2015-11-6
AUIRLS/SL4030
TO-262 Package Outline (Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
Part Number
AUIRLSL4030
YWWA
IR Logo
XX
Date Code
Y= Year
WW= Work Week
XX
Lot Code
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
9
2015-11-6
AUIRLS/SL4030
D2Pak (TO-263AB) Tape & Reel Information (Dimensions are shown in millimeters (inches))
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
24.30 (.957)
23.90 (.941)
TRL
10.90 (.429)
10.70 (.421)
1.75 (.069)
1.25 (.049)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
60.00 (2.362)
MIN.
26.40 (1.039)
24.40 (.961)
3
30.40 (1.197)
MAX.
4
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
10
2015-11-6
AUIRLS/SL4030
Qualification Information
Automotive
(per AEC-Q101)
Comments: This part number(s) passed Automotive qualification. Infineon’s
Industrial and Consumer qualification level is granted by extension of the higher
Automotive level.
Qualification Level
Moisture Sensitivity Level
Machine Model
ESD
Human Body Model
Charged Device Model
RoHS Compliant
D2-Pak
MSL1
TO-262
Class M4(+/- 800V )†
(per AEC-Q101-002)
Class H3A (+/- 6000V)†
AEC-Q101-001
Class C5 (+/- 2000V)†
AEC-Q101-005
Yes
† Highest passing voltage.
Revision History
Date
3/3/2014
4/9/2014
11/6/2015
Comments
Added "Logic Level Gate Drive" bullet in the features section on page 1
Updated data sheet with new IR corporate template
Updated package outline and part marking on page 8 & 9.
Updated Qualification table -TO262 Pak from "N/A" to "MSL1" on page 11.
Updated typo on the fig.19 and fig.20, unit of y-axis from "A" to "nC" on page 6.
Updated datasheet with corporate template
Corrected ordering table on page 1.
Published by
Infineon Technologies AG
81726 München, Germany
© Infineon Technologies AG 2015
All Rights Reserved.
IMPORTANT NOTICE
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third
party.
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of
the product of Infineon Technologies in customer’s applications.
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of
customer’s technical departments to evaluate the suitability of the product for the intended application and the
completeness of the product information given in this document with respect to such application.
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies office (www.infineon.com).
WARNINGS
Due to technical requirements products may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies office.
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized
representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a
failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.
11
2015-11-6