Revised May 1999 DM81LS95A • DM81LS96A • DM81LS97A 3-STATE Octal Buffer General Description Features These devices provide eight, two-input buffers in each package. All employ low-power-Schottky TTL technology. One of the two inputs to each buffer is used as a control line to gate the output into the high-impedance state, while the other input passes the data through the buffer. The DM81LS95A and DM81LS97A present true data at the outputs, while the DM81LS96A is inverting. On the DM81LS95A and DM81LS96A versions, all eight 3-STATE enable lines are common, with access through a 2-input NOR gate. On the DM81LS97A version, four buffers are enabled from one common line, and the other four buffers are enabled form another common line. In all cases the outputs are placed in the 3-STATE condition by applying a high logic level to the enable pins. ■ Typical power dissipation DM81LS95A, DM81LS97A 80 mW DM81LS96A 65 mW ■ Typical propagation delay DM81LS95A, DM81LS97A 15 ns DM81LS96A 10 ns ■ Low power-Schottky, 3-STATE technology Ordering Code: Order Number DM81LS95AWM Package Number Package Description M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide DM81LS95AN N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide DM81LS96AWM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide DM81LS96AN N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide DM81LS97AN N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Pin Descriptions DM81LS95A and DM92LS96A Pin Names A1–A8 Descriptions Inputs Y1–Y8 Outputs G1–G2 Active LOW Output Enables (Note 1) Note 1: Both G1 and G2 must be LOW for outputs to be enabled. DM81LS97A Pin Names A1–A8 © 1999 Fairchild Semiconductor Corporation DS006435 Descriptions Inputs Y1–Y8 Outputs G1 Active LOW Output Enable (Y1–Y4) G2 Active LOW Output Enable (Y5–Y8) www.fairchildsemi.com DM81LS95A • DM81LS96A • DM81LS97A 3-STATE Octal Buffer September 1991 DM81LS95A • DM81LS96A • DM81LS97A Logic Symbols Truth Tables DM81LS95A DM81LS95A Inputs Output G1 G2 A Y H X X Hi-Z X H X Hi-Z L L H H L L L L DM81LS96A DM81LS96A Inputs Output G1 G2 A Y H X X Hi-Z X H X Hi-Z L L H L L L L H DM81LS97A DM81LS97A Inputs www.fairchildsemi.com 2 Output G1 A1–A4 Y1–Y4 H X Hi-Z L H H L L L G2 A5–A6 Y5–Y8 H X Hi-Z L H H L L L Supply Voltage 7V Input Voltage 7V Note 2: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The Recommended Operating Conditions table will define the conditions for actual device operation. 0°C to +70°C Operating Free Air Temperature Range −65°C to +150°C Storage Temperature Range Recommended Operating Conditions Symbol Parameter Min Nom Max 4.75 5 5.25 Units VCC Supply Voltage VIH HIGH Level Input Voltage VIL LOW Level Input Voltage 0.8 V IOH HIGH Level Output Current −5.2 mA IOL LOW Level Output Current 24 mA TA Free Air Operating Temperature 70 °C 2 0 3 V V www.fairchildsemi.com DM81LS95A • DM81LS96A • DM81LS97A Absolute Maximum Ratings(Note 2) DM81LS95A • DM81LS96A • DM81LS97A DC Electrical Characteristics DM81LS95A and DM81LS97A over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions VI Input Clamp Voltage VCC = Min, II = −18 mA VOH HIGH Level Output Voltage VCC = Min, IOH = Max VOL LOW Level Output Voltage VCC = Min, IOL = Max Typ Min (Note 3) VCC = Max, VI = 7V HIGH Level Input Current VCC = Max, VI = 2.7V LOW Level Input Current VCC = Max VI = 0.5V VI = 0.4V IOZH Off-State Output Current VCC = Max, VO = 2.4V with HIGH Level Output VIH = Min, VIL = Max V 0.4 Input Voltage IIL V 0.5 IOL = 12 mA, VCC = Min IIH −1.5 V IOL = Max, VIH = Min Input Current @ Max Units 2.7 VIL = Max, VIH = Min II Max 0.1 mA 20 µA A (Note 4) −20 A (Note 5) −50 G −50 µA 20 µA −20 µA −100 mA 26 mA Voltage Applied IOZL Off-State Output Current VCC = Max, VO = 0.4V with LOW Level Output VIH = Min, VIL = Max Voltage Applied IOS ICC Short Circuit VCC = Max Output Current (Note 6) Supply Current VCC = Max (Note 4) −20 16 Note 3: All typicals are at VCC = 5V, TA = 25°C. Note 4: Both G inputs are at 2V. Note 5: Both G inputs are at 0.4V. Note 6: Not more than one output should be shorted at a time, and the duration should not exceed one second. AC Electrical Characteristics DM81LS95A and DM81LS97A VCC = 5V, TA = 25°C RL = 667 Ω Symbol CL = 50 pF Parameter Min tPLH Propagation Delay Time LOW-to-HIGH Level Output tPHL Propagation Delay Time HIGH-to-LOW Level Output tPZH Output Enable Time to HIGH Level Output tPZL Output Enable Time to LOW Level Output tPHZ Output Disable Time from HIGH Level Output (Note 7) tPLZ Output Disable Time from LOW Level Output (Note 7) Note 7: CL = 5 pF. www.fairchildsemi.com 4 CL = 150 pF Max Min Units Max 16 25 ns 28 40 ns 25 30 ns 30 42 ns 20 ns 27 ns DM81LS96A over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions VI Input Clamp Voltage VCC = Min, II = −18 mA VOH HIGH Level Output Voltage VCC = Min, IOH = Max VOL LOW Level Output Voltage VCC = Min, IOL = Max Typ Min (Note 8) VCC = Max, VI = 7V HIGH Level Input Current VCC = Max, VI = 2.7V LOW Level Input Current VCC = Max VI = 0.5V VI = 0.4V IOZH Off-State Output Current VCC = Max, VO = 2.4V with HIGH Level Output VIH = Min, VIL = Max V 0.4 Input Voltage IIH V 0.5 IOL = 12 mA, VCC = Min IIL −1.5 V IOL = Max, VIH = Min Input Current @ Max Units 2.7 VIL = Max, VIH = Min II Max 0.1 mA 20 µA A (Note 9) −20 A (Note 10) −50 G −50 µA 20 µA −20 µA Voltage Applied IOZL Off-State Output Current VCC = Max, VO = 0.4V with LOW Level Output VIH = Min, VIL = Max Voltage Applied IOS ICC Short Circuit VCC = Max Output Current (Note 11) Supply Current VCC = Max (Note 10) −20 13 −100 mA 21 mA Note 8: All typicals are at VCC = 5V, TA = 25°C. Note 9: Both G inputs are at 2V. Note 10: Both G inputs are at 0.4V. Note 11: Not more than one output should be shorted at a time, and the duration should not exceed one second. AC Electrical Characteristics DM81LS96A VCC = 5V, TA = 25°C RL = 667 Ω Symbol CL = 50 pF Parameter Min tPLH Propagation Delay Time LOW-to-HIGH Level Output tPHL Propagation Delay Time HIGH-to-LOW Level Output tPZH Output Enable Time to HIGH Level Output tPZL Output Enable Time to LOW Level Output tPHZ Output Disable Time from HIGH Level Output (Note 12) tPLZ Output Disable Time from LOW Level Output (Note 12) CL = 150 pF Max Min Units Max 10 16 ns 17 30 ns 15 30 ns 35 45 ns 20 ns 27 ns Note 12: CL = 5 pF. 5 www.fairchildsemi.com DM81LS95A • DM81LS96A • DM81LS97A DC Electrical Characteristics DM81LS95A • DM81LS96A • DM81LS97A Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B www.fairchildsemi.com 6 DM81LS95A • DM81LS96A • DM81LS97A 3-STATE Octal Buffer Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 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