MC10EP16VA, MC100EP16VA 3.3V / 5V ECL Differential Receiver/Driver with High Gain Description www.onsemi.com • • • • 270 ps Typical Propagation Delay Gain = > 20 20 mV Minimum Input Voltage Swing Maximum Frequency = > 3 GHz Typical PECL Mode Operating Range: VCC = 3.0 V to 5.5 Vwith VEE = 0 V NECL Mode Operating Range: VCC = 0 V with VEE = −3.0 V to −5.5 V Open Input Default State VBB Output These Devices are Pb-Free, Halogen Free and are RoHS Compliant 1 1 SOIC−8 NB TSSOP−8 D SUFFIX DT SUFFIX CASE 751−07 CASE 948R−02 DFN8 MN SUFFIX CASE 506AA MARKING DIAGRAMS* 1 HEP64 ALYW G 1 HP64 ALYWG G 1 KP64 ALYWG G 1 4 8 8 1 5N MG G 8 8 Features • • • • • 8 8 KEP64 ALYW G 1 SOIC−8 NB H K 5M 3D M = MC10 = MC100 = MC10 = MC100 = Date Code TSSOP−8 A L Y W G 3E MG G The EP16VA is a world-class differential receiver/driver. The device is functionally equivalent to the EP16 and LVEP16 devices but with high gain output. QHG and QHG outputs have a DC gain several times larger than the DC gain of an EP16. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. Under open input conditions (pulled to VEE) internal input clamps will force the QHG output LOW. Special considerations are required for differential inputs under No Signal conditions to prevent instability. The 100 Series contains temperature compensation. 4 DFN8 = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. © Semiconductor Components Industries, LLC, 2008 August, 2016 − Rev. 11 1 Publication Order Number: MC10EP16VA/D MC10EP16VA, MC100EP16VA Table 1. PIN DESCRIPTION NC D D VBB 1 8 2 7 6 3 4 5 VCC QHG QHG PIN FUNCTION D*, D* ECL Data Inputs QHG, QHG ECL High Gain Data Outputs VBB Reference Voltage Output VCC Positive Supply VEE Negative Supply NC No Connect EP (DFN8 only) Thermal exposed pad must be connected to a sufficient thermal conduit. Electrically connect to the most negative supply (GND) or leave unconnected, floating open. VEE * Pins will default LOW when left open. Figure 1. 8-Lead Pinout (Top View) and Logic Diagram Table 2. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor 75 kW Internal Input Pullup Resistor N/A ESD Protection Human Body Model Machine Model Charged Device Model > 4 kV > 200 V > 2 kV Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) SOIC−8 NB TSSOP−8 DFN8 Flammability Rating Pb-Free Pkg Level 1 Level 3 Level 1 Oxygen Index: 28 to 34 Transistor Count UL−94 V−0 @ 0.125 in 167 Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. www.onsemi.com 2 MC10EP16VA, MC100EP16VA Table 3. MAXIMUM RATINGS Symbol Rating Unit VCC PECL Mode Power Supply Parameter VEE = 0 V Condition 1 Condition 2 6 V VEE NECL Mode Power Supply VCC = 0 V −6 V VI PECL Mode Input Voltage NECL Mode Input Voltage VEE = 0 V VCC = 0 V 6 −6 V Iout Output Current Continuous Surge 50 100 mA IBB VBB Sink/Source ±0.5 mA TA Operating Temperature Range −40 to +85 °C Tstg Storage Temperature Range −65 to +150 °C qJA Thermal Resistance (Junction-to-Ambient) 0 lfpm 500 lfpm SOIC−8 NB SOIC−8 NB 190 130 °C/W qJC Thermal Resistance (Junction-to-Case) Standard Board SOIC−8 NB 41 to 44 °C/W qJA Thermal Resistance (Junction-to-Ambient) 0 lfpm 500 lfpm TSSOP−8 TSSOP−8 185 140 °C/W qJC Thermal Resistance (Junction-to-Case) Standard Board TSSOP−8 41 to 44 °C/W qJA Thermal Resistance (Junction-to-Ambient) 0 lfpm 500 lfpm DFN8 DFN8 129 84 °C/W Tsol Wave Solder (Pb-Free) < 2 to 3 sec @ 260°C 265 °C qJC Thermal Resistance (Junction-to-Case) (Note 2) 35 to 40 °C/W VI ≤ VCC VI ≥ VEE DFN8 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 2. JEDEC standard multilayer board − 2S2P (2 signal, 2 power) Table 4. 10EP DC CHARACTERISTICS, PECL (VCC = 3.3 V, VEE = 0 V (Note 1)) −40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit 20 28 36 22 30 38 24 32 40 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 2) 2165 2240 2415 2230 2355 2480 2290 2415 2540 mV VOL Output LOW Voltage (Note 2) 1365 1490 1615 1430 1555 1680 1490 1615 1740 mV VIH Input HIGH Voltage (Single-Ended) 2090 2415 2155 2480 2215 2540 mV VIL Input LOW Voltage (Single-Ended) 1365 1690 1460 1755 1490 1815 mV VBB Output Voltage Reference 1790 1990 1855 2055 1915 2115 mV 3.3 2.0 3.3 2.0 3.3 V 150 mA VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 3) IIH Input HIGH Current IIL Input LOW Current 1950 2.0 150 0.5 2000 150 0.5 0.5 2040 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V. 2. All loading with 50 W to VCC − 2.0 V. 3. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. www.onsemi.com 3 MC10EP16VA, MC100EP16VA Table 5. 10EP DC CHARACTERISTICS, PECL (VCC = 5.0 V, VEE = 0 V (Note 1)) −40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit 20 28 36 22 30 38 24 32 40 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 2) 3865 3940 4115 3930 4055 4180 3990 4115 4240 mV VOL Output LOW Voltage (Note 2) 3065 3190 3315 3130 3255 3380 3190 3315 3440 mV VIH Input HIGH Voltage (Single-Ended) 3790 4115 3855 4180 3915 4240 mV VIL Input LOW Voltage (Single-Ended) 3065 3390 3130 3455 3190 3515 mV VBB Output Voltage Reference 3490 3690 3555 3755 3615 3815 mV 5.0 2.0 5.0 2.0 5.0 V 150 mA VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 3) IIH Input HIGH Current IIL Input LOW Current 3633 2.0 3670 150 0.5 3710 150 0.5 0.5 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V. 2. All loading with 50 W to VCC − 2.0 V. 3. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Table 6. 10EP DC CHARACTERISTICS, NECL (VCC = 0 V; VEE = −5.5 V to −3.0 V (Note 1)) −40°C Symbol Characteristic Min Typ 25°C Max Min Typ 85°C Max Min Typ Max Unit IEE Power Supply Current 20 28 36 22 30 38 24 32 40 mA VOH Output HIGH Voltage (Note 2) −1135 −1060 −885 −1070 −945 −820 −1010 −885 −760 mV VOL Output LOW Voltage (Note 2) −1935 −1810 −1685 −1870 −1745 −1620 −1810 −1685 −1560 mV VIH Input HIGH Voltage (Single-Ended) −1210 −885 −1145 −820 −1085 −760 mV VIL Input LOW Voltage (Single-Ended) −1935 −1610 −1870 −1545 −1810 −1485 mV VBB Output Voltage Reference −1510 −1310 −1445 −1245 −1385 −1185 mV 0.0 V 150 mA VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 3) IIH Input HIGH Current IIL Input LOW Current −1367 VEE+2.0 0.0 VEE+2.0 150 0.5 −1330 0.0 VEE+2.0 150 0.5 −1290 0.5 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. Input and output parameters vary 1:1 with VCC. 2. All loading with 50 W to VCC − 2.0 V. 3. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. www.onsemi.com 4 MC10EP16VA, MC100EP16VA Table 7. 100EP DC CHARACTERISTICS, PECL (VCC = 3.3 V, VEE = 0 V (Note 1)) −40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit 22 28 36 24 30 40 26 32 42 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 2) 2155 2280 2405 2155 2280 2405 2155 2280 2405 mV VOL Output LOW Voltage (Note 2) 1305 1430 1555 1305 1430 1555 1305 1430 1555 mV VIH Input HIGH Voltage (Single-Ended) 2075 2420 2075 2420 2075 2420 mV VIL Input LOW Voltage (Single-Ended) 1355 1675 1355 1675 1355 1675 mV VBB Output Voltage Reference 1775 1975 1775 1975 1775 1975 mV 3.3 2.0 3.3 2.0 3.3 V 150 mA VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 3) IIH Input HIGH Current IIL Input LOW Current 1875 2.0 1875 150 0.5 1875 150 0.5 0.5 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V. 2. All loading with 50 W to VCC − 2.0 V. 3. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Table 8. 100EP DC CHARACTERISTICS, PECL (VCC = 5.0 V, VEE = 0 V (Note 1)) −40°C Symbol Characteristic Min Typ 25°C Max Min Typ 85°C Max Min Typ Max Unit IEE Power Supply Current 22 28 36 24 30 40 26 32 42 mA VOH Output HIGH Voltage (Note 2) 3855 3980 4105 3855 3980 4105 3855 3980 4105 mV VOL Output LOW Voltage (Note 2) 3005 3180 3355 3005 3180 3355 3005 3180 3355 mV VIH Input HIGH Voltage (Single-Ended) 3775 4120 3775 4120 3775 4120 mV VIL Input LOW Voltage (Single-Ended) 3055 3375 3055 3375 3055 3375 mV VBB Output Voltage Reference 3475 3675 3475 3675 3475 3675 mV VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 3) 5.0 2.0 5.0 2.0 5.0 V 150 mA IIH Input HIGH Current IIL Input LOW Current 3575 2.0 150 0.5 3575 150 0.5 0.5 3575 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V. 2. All loading with 50 W to VCC − 2.0 V. 3. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. www.onsemi.com 5 MC10EP16VA, MC100EP16VA Table 9. 100EP DC CHARACTERISTICS, NECL (VCC = 0 V; VEE = −5.5 V to −3.0 V (Note 1)) −40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit 22 28 36 24 30 40 26 32 42 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 2) −1145 −1020 −895 −1145 −1020 −895 −1145 −1020 −895 mV VOL Output LOW Voltage (Note 2) −1995 −1870 −1745 −1995 −1870 −1745 −1995 −1870 −1745 mV VIH Input HIGH Voltage (Single-Ended) −1225 −880 −1225 −880 −1225 −880 mV VIL Input LOW Voltage (Single-Ended) −1945 −1625 −1945 −1625 −1945 −1625 mV VBB Output Voltage Reference −1525 −1325 −1525 −1325 −1525 −1325 mV 0.0 V 150 mA VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 3) IIH Input HIGH Current IIL Input LOW Current −1425 VEE+2.0 0.0 −1425 VEE+2.0 150 0.0 −1425 VEE+2.0 150 0.5 0.5 0.5 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. Input and output parameters vary 1:1 with VCC. 2. All loading with 50 W to VCC − 2.0 V. 3. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Table 10. AC CHARACTERISTICS (VCC = 0 V; VEE = −3.0 V to −5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 1)) −40°C Symbol Characteristic Min Typ 25°C Max Min Max fmax Maximum Frequency (See Figure 2 Fmax/JITTER) tPLH, tPHL Propagation Delay to Output Differential tSKEW Duty Cycle Skew (Note 2) 5.0 20 5.0 20 tJITTER Cycle-to-Cycle Jitter (See Figure 2 Fmax/JITTER) 0.2 <1 0.2 <1 20 800 120 0 20 800 120 0 70 110 170 80 110 180 VPP tr tf >3 Typ 85°C 200 Input Voltage Swing (Differential Configuration) (See Figure 3) Output Rise/Fall Times Q, Q (20% − 80%) 260 Min >3 320 220 270 Typ Max >3 340 250 320 Unit GHz 390 ps 5.0 20 ps 0.2 <1 ps 20 800 120 0 mV 80 120 200 ps NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC−2.0 V. 2. Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays are measured from the cross point of the inputs to the cross point of the outputs. www.onsemi.com 6 900 9 800 8 700 7 600 6 500 5 400 4 300 3 ÉÉÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉÉÉ 200 ÉÉ ÉÉ 2 (JITTER) 1 100 0 0 1000 2000 3000 JITTEROUT ps (RMS) VOUTpp (mV) MC10EP16VA, MC100EP16VA 4000 5000 FREQUENCY (MHz) Figure 2. Fmax/Jitter 800 700 VOUTpp (mV) 600 500 400 300 200 100 0 20 15 10 VINpp (mV) 5 0 Figure 3. Gain vs. Input Voltage (50 MHz) Q Zo = 50 W D Receiver Device Driver Device Q D Zo = 50 W 50 W 50 W VTT VTT = VCC − 2.0 V Figure 4. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices) www.onsemi.com 7 MC10EP16VA, MC100EP16VA ORDERING INFORMATION Package Shipping† MC10EP16VADG SOIC−8 NB (Pb-Free) 98 Units / Rail MC10EP16VADR2G SOIC−8 NB (Pb-Free) 2500 / Tape & Reel MC10EP16VADTG TSSOP−8 (Pb-Free) 100 Units / Rail MC10EP16VADTR2G TSSOP−8 (Pb-Free) 2500 / Tape & Reel MC10EP16VAMNR4G DFN8 (Pb-Free) 1000 / Tape & Reel MC100EP16VADG SOIC−8 NB (Pb-Free) 98 Units / Rail MC100EP16VADR2G SOIC−8 NB (Pb-Free) 2500 / Tape & Reel MC100EP16VADTG TSSOP−8 (Pb-Free) 100 Units / Rail MC100EP16VADTR2G TSSOP−8 (Pb-Free) 2500 / Tape & Reel MC100EP16VAMNR4G DFN8 (Pb-Free) 1000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPSt I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ECL AN1672/D − The ECL Translator Guide AND8001/D − Odd Number Counters Design AND8002/D − Marking and Date Codes AND8020/D − Termination of ECL Logic Devices AND8066/D − Interfacing with ECLinPS AND8090/D − AC Characteristics of ECL Devices www.onsemi.com 8 MC10EP16VA, MC100EP16VA PACKAGE DIMENSIONS SOIC−8 NB D SUFFIX CASE 751−07 ISSUE AK −X− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. A 8 5 S B 0.25 (0.010) M Y M 1 4 −Y− K G C N DIM A B C D G H J K M N S X 45 _ SEATING PLANE −Z− 0.10 (0.004) H D 0.25 (0.010) M Z Y S X M J S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm Ǔ ǒinches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 9 MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 MC10EP16VA, MC100EP16VA PACKAGE DIMENSIONS TSSOP−8 DT SUFFIX CASE 948R−02 ISSUE A 8x 0.15 (0.006) T U 0.10 (0.004) S 2X L/2 L 8 5 1 PIN 1 IDENT 0.15 (0.006) T U K REF M T U V S 0.25 (0.010) B −U− 4 M A −V− S NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. S F DETAIL E C 0.10 (0.004) −T− SEATING PLANE D −W− G DETAIL E www.onsemi.com 10 DIM A B C D F G K L M MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 0.80 1.10 0.05 0.15 0.40 0.70 0.65 BSC 0.25 0.40 4.90 BSC 0_ 6_ INCHES MIN MAX 0.114 0.122 0.114 0.122 0.031 0.043 0.002 0.006 0.016 0.028 0.026 BSC 0.010 0.016 0.193 BSC 0_ 6_ MC10EP16VA, MC100EP16VA PACKAGE DIMENSIONS DFN8 2x2, 0.5 P MN SUFFIX CASE 506AA ISSUE F D PIN ONE REFERENCE 2X 0.10 C 2X A B L1 ÇÇ ÇÇ 0.10 C DETAIL A E OPTIONAL CONSTRUCTIONS ÉÉ ÉÉ ÇÇ EXPOSED Cu TOP VIEW A DETAIL B 0.10 C NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994 . 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.20 MM FROM TERMINAL TIP. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. L L DIM A A1 A3 b D D2 E E2 e K L L1 ÉÉ ÇÇ ÇÇ A3 MOLD CMPD A1 DETAIL B 0.08 C (A3) NOTE 4 SIDE VIEW ALTERNATE CONSTRUCTIONS A1 C MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 REF 0.20 0.30 2.00 BSC 1.10 1.30 2.00 BSC 0.70 0.90 0.50 BSC 0.30 REF 0.25 0.35 −−− 0.10 SEATING PLANE RECOMMENDED SOLDERING FOOTPRINT* DETAIL A D2 1 4 8X L E2 K 8 5 e/2 e 8X 1.30 PACKAGE OUTLINE 0.90 b 2.30 1 0.10 C A B 0.05 C 8X 0.50 8X 0.50 PITCH 0.30 NOTE 3 BOTTOM VIEW DIMENSIONS: MILLIMETERS *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 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