IRF IR25607SPBF High and low side driver Datasheet

IR25607SPBF
High and Low Side Driver
Features
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Product Summary
Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 10 to 20V
Undervoltage lockout for both channels
3.3V logic compatible
Separate logic supply range from 3.3V to 20V
Logic and power ground ±5V offset
CMOS Schmitt-triggered inputs with pull-down
Cycle by cycle edge-triggered shutdown logic
Matched propagation delay for both channels
Outputs in phase with inputs
VOFFSET
600V max.
IO+/-
2A / 2A
VOUT
10 – 20V
Ton/off (typ.)
120 & 94 ns
Delay Matching (typ.)
20 ns
Package Options
Description
The IR25607 is a high voltage, high speed power MOSFET
and IGBT driver with independent high and low side
referenced output channels. Proprietary HVIC and latch
immune CMOS technologies enable ruggedized monolithic
construction. Logic inputs are compatible with standard
CMOS or LSTTL output, down to 3.3V logic. The output
drivers feature a high pulse current buffer stage designed for
minimum driver cross-conduction. Propagation delays are
matched to simplify use in high frequency applications. The
floating channel can be used to drive an N-channel power
MOSFET or IGBT in the high side configuration which
operates up to 600 V.
16 Lead SOIC Wide Body
Ordering Information
Standard Pack
Base Part Number
Package Type
Form
Quantity
IR25607SPBF
SO16W
Tube
45
IR25607SPBF
SO16W
Tape and Reel
1000
1
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Orderable Part Number
IR25607SPBF
IR25607STRPBF
March 26, 2013
IR25607SPBF
Typical Connection Diagram
up to 600V
2
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March 26, 2013
IR25607SPBF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are
measured under board mounted and still air conditions.
Symbol
VB
VS
VHO
VCC
VLO
VDD
VSS
VIN
dVs/dt
PD
RthJA
TJ
TS
TL
Definition
High side floating supply voltage
High side floating supply offset voltage
High side floating output voltage
Low side and logic fixed supply voltage
Low side output voltage
Logic supply voltage
Logic supply offset voltage
Logic input voltage (HIN, LIN & SD )
Min.
-0.3
Max.
625
VB - 25
VS - 0.3
-0.3
-0.3
-0.3
VB + 0.3
VB + 0.3
25
Units
V
VCC – 25
VSS -0.3
—
VCC + 0.3
VSS + 25
VCC + 0.3
VDD + 0.3
50
V/ns
Package power dissipation @ TA ≤ +25°C
—
1.25
W
Thermal resistance, junction to ambient
—
100
°C/W
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
—
-55
—
150
150
300
°C
Allowable offset supply voltage transient
Recommended Operating Conditions
For proper operation the device should be used within the recommended conditions. The VS and VSS offset
ratings are tested with all supplies biased at 15V differential.
Symbol
VB
VS
VHO
VCC
VLO
VDD
VSS
VIN
TA
Definition
High side floating supply absolute voltage
High side floating supply offset voltage
High side floating output voltage
Low side fixed supply voltage
Low side output voltage
Logic supply voltage
Logic supply offset voltage
Logic input voltage (HIN, LIN & SD )
Ambient temperature
Min.
Max.
VS + 10
†
VS + 20
600
VS
10
VB
20
0
VSS + 3
-5 ††
VCC
VSS + 20
5
VSS
-40
VDD
125
Units
V
°C
† Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to Design Tip DT97-3 for more
details).
†† When VDD < 5V, the minimum VSS offset is limited to -VDD.
3
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March 26, 2013
IR25607SPBF
Dynamic Electrical Characteristics
VBIAS (VCC, VBS, VDD) = 15V, CL = 1000 pF, VSS = COM and TA = 25°C unless otherwise specified.
Symbol
Definition
Min.
Typ.
Max.
Units
Test Conditions
ton
Turn-on propagation delay
—
120
150
VS = 0V
toff
Turn-off propagation delay
—
94
125
VS = 600V
tsd
tr
tf
MT
Shutdown propagation delay
Turn-on rise time
Turn-off fall time
Delay matching, HS & LS turn-on/off
—
—
—
—
110
25
17
—
140
35
25
20
ns
VS = 600V
Static Electrical Characteristics
VBIAS (VCC, VBS, VDD) = 15V, VSS = COM and TA = 25°C unless otherwise specified. The VIN, VTH and IIN
parameters are referenced to VSS and are applicable to all three logic input leads: HIN, LIN and SD. The VO and
IO parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
Symbol
VIH
VIL
VOH
VOL
ILK
IQBS
IQCC
IQDD
IIN+
IINVBSUV+
VBSUVVCCUV+
VCCUVIO+
IO-
4
Definition
Logic ―1‖ input voltage
Logic ―0‖ input voltage
High level output voltage, VBIAS - VO
Low level output voltage, VO
Offset supply leakage current
Quiescent VBS supply current
Quiescent VCC supply current
Quiescent VCC supply current
Logic ―1‖ input bias current
Logic ―0‖ input bias current
VBS supply undervoltage positive
going threshold
VBS supply undervoltage negative
going threshold
VCC supply undervoltage positive
going threshold
VCC supply undervoltage negative
going threshold
Output high short circuit pulsed
current
Output low short circuit pulsed
current
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Min.
Typ.
Max.
9.5
—
—
—
—
—
—
—
—
—
—
—
—
—
—
125
180
15
20
—
—
6.0
1.2
0.1
50
230
340
30
40
1
7.5
8.6
9.7
7.0
8.2
9.4
7.4
8.5
9.6
7.0
8.2
9.4
2
2.5
—
Units
V
μA
2.5
—
IO = 0A
IO = 0A
VB = VS = 600V
VIN = 0V or VDD
VIN = 0V or VDD
VIN = 0V or VDD
VIN = VDD
VIN = 0V
V
A
2
Test Conditions
VO = 0V, VIN = VDD
PW ≤ 10 μs
VO = 15V, VIN = VDD
PW ≤ 10 μs
March 26, 2013
IR25607SPBF
Functional Block Diagram
5
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March 26, 2013
IR25607SPBF
Lead Definitions
Symbol Description
Logic supply
Logic input for high side gate driver output (HO), in phase
Logic input for shutdown
Logic input for low side gate driver output (LO), in phase
Logic ground
High side floating supply
High side gate drive output
High side floating supply return
Low side and logic fixed supply
Low side gate drive output
Low side return
VDD
HIN
SD
LIN
VSS
VB
HO
VS
VCC
LO
COM
Lead Assignments
6
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IR25607SPBF
Application Information and Additional Details
Figure 1. Input/Output Timing Diagram
Figure 2. Switching Time Waveform Definitions
Figure 3. Shutdown Waveform Definitions
Figure 4. Delay matching Waveform Definitions
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IR25607SPBF
Figure 5A. Turn On Time vs. Temperature
Figure 5B. Turn On Time vs. VCC/VBS Supply Voltage
Figure 5C. Turn On Time vs. VDD Supply Voltage
Figure 6A. Turn Off Time vs. Temperature
Figure 6B. Turn Off Time vs. VCC/VBS Supply Voltage
Figure 6C. Turn Off Time vs. VDD Supply Voltage
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IR25607SPBF
Figure 7A. Shutdown Time vs. Temperature
Figure 7B. Shutdown Time vs. VCC/VBS Supply Voltage
Figure 7C. Shutdown Time vs. VDD Supply Voltage
Figure 8A. Turn On Rise Time vs. Temperature
Figure 8B. Turn On Rise Time vs. Voltage
Figure 9A. Turn Off Fall Time vs. Temperature
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IR25607SPBF
Figure 9B. Turn Off Fall Time vs. Voltage
Figure 10A. logic ‘1’ Input Threshold vs. Temperature
Figure 10B. Logic ‘1’ Input Threshold vs. Voltage
Figure 11A. Logic ‘0’ Input Threshold vs. Temperature
Figure 11B. Logic ‘0’ Input Threshold vs. Voltage
Figure 12A. High Level Output vs. Temperature
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IR25607SPBF
Figure 12B. High Level Output vs. Voltage
Figure 13A. Low Level Output vs. Temperature
Figure 13B. Low Level Output vs. Voltage
Figure 14A. Offset Supply Current vs. Temperature
Figure 14B. Offset Supply Current vs. Voltage
Figure 15A. VBS Supply Current vs. Temperature
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IR25607SPBF
Figure 15B. VBS Supply Current vs. Voltage
Figure 16A. VCC Supply Current vs. Temperature
Figure 16B. VCC Supply Current vs. Voltage
Figure 17A. VDD Supply Current vs. Temperature
Figure 17B. VDD Supply Current vs. VDD Voltage
Figure 18A. Logic ‘1’ Input Current vs. Temperature
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IR25607SPBF
Figure 18B. Logic ‘1’ Input Current vs. VDD Voltage
Figure 19A. Logic ‘0’ Input Current vs. Temperature
Figure 19B. Logic ‘0’ Input Current vs. VDD Voltage
Figure 20. VBS Undervoltage (+) vs. Temperature
Figure 21 VBS Undervoltage (-) vs. Temperature
Figure 22. VCC Undervoltage (+) vs. Temperature
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IR25607SPBF
Figure 23. VCC Undervoltage (-) vs. Temperature
Figure 24A. Output Source Current vs. Temperature
Figure 24B. Output Source Current vs. Voltage
Figure 25A. Output Sink Current vs. Temperature
Figure 25B. Output Sink Current vs. Voltage
Figure 26. Maximum VS Negative Offset vs. VBS Supply
Voltage
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IR25607SPBF
Figure 27. Maximum VSS Positive Offset vs. VCC Supply
Voltage
15
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IR25607SPBF
Package Details
16
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IR25607SPBF
Tape and Reel Details
LOADED TAPE FEED DIRECTION
A
B
H
D
F
C
NOTE : CONTROLLING
DIMENSION IN MM
E
G
CARRIER TAPE DIMENSION FOR 16SOICN
Metric
Imperial
Code
Min
Max
Min
Max
A
7.90
8.10
0.311
0.318
B
3.90
4.10
0.153
0.161
C
15.70
16.30
0.618
0.641
D
7.40
7.60
0.291
0.299
E
6.40
6.60
0.252
0.260
F
10.20
10.40
0.402
0.409
G
1.50
n/a
0.059
n/a
H
1.50
1.60
0.059
0.062
F
D
C
B
A
E
G
H
REEL DIMENSIONS FOR 16SOICN
Metric
Imperial
Code
Min
Max
Min
Max
A
329.60
330.25
12.976
13.001
B
20.95
21.45
0.824
0.844
C
12.80
13.20
0.503
0.519
D
1.95
2.45
0.767
0.096
E
98.00
102.00
3.858
4.015
F
n/a
22.40
n/a
0.881
G
18.50
21.10
0.728
0.830
H
16.40
18.40
0.645
0.724
17
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IR25607SPBF
Part Marking Information
IRxxxxx
Part number
YWW ?
Date code
Pin 1
Identifier
? XXXX
?
MARKING CODE
P
Lead Free Released
Non-Lead Free Released
18
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Lot Code
(Prod mode –
4 digit SPN code)
Assembly site code
Per SCOP 200-002
March 26, 2013
IR25607SPBF
Qualification Information
†
††
Industrial
(per JEDEC JESD 47)
Comments: This family of ICs has passed JEDEC’s
Industrial qualification. IR’s Consumer qualification level is
granted by extension of the higher Industrial level.
†††
MSL3
(per IPC/JEDEC J-STD-020)
Yes
Qualification Level
Moisture Sensitivity Level
RoHS Compliant
†
††
Qualification standards can be found at International Rectifier’s web site http://www.irf.com/
Higher qualification ratings may be available should the user have such requirements. Please contact your
International Rectifier sales representative for further information.
††† Higher MSL ratings may be available for the specific package types listed here. Please contact your
International Rectifier sales representative for further information.
The information provided in this document is believed to be accurate and reliable. However, International Rectifier assumes no responsibility
for the consequences of the use of this information. International Rectifier assumes no responsibility for any infringement of patents or of
other rights of third parties which may result from the use of this information. No license is granted by implication or otherwise under any
patent or patent rights of International Rectifier. The specifications mentioned in this document are subject to change without notice. This
document supersedes and replaces all information previously supplied.
For technical support, please contact IR’s Technical Assistance Center
http://www.irf.com/technical-info/
WORLD HEADQUARTERS:
233 Kansas St., El Segundo, California 90245
Tel: (310) 252-7105
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March 26, 2013
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