IRF IRF6892STRPBF Directfetâ® mosfet with schottky diode Datasheet

PD - 97770
IRF6892STRPbF
IRF6892STR1PbF
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DirectFET®plus MOSFET with Schottky Diode ‚
RoHS Compliant and Halogen Free 
Low Profile (<0.7 mm)
Dual Sided Cooling Compatible 
Ultra Low Package Inductance
Optimized for High Frequency Switching 
Ideal for CPU Core DC-DC Converters
Optimized for Control FET Application
Compatible with existing Surface Mount Techniques 
100% Rg tested
Typical values (unless otherwise specified)
VDSS
VGS
Qg
tot
17nC
Qgd
Qgs2
Qrr
Qoss
Vgs(th)
6.0nC
2.3nC
39nC
16nC
1.8V
G
S
S
S
S3C
D
ISOMETRIC
S3C
Applicable DirectFET Outline and Substrate Outline 
S2
M2
RDS(on)
25V max ±16V max 1.3mΩ @ 10V 2.0mΩ @ 4.5V
D
S1
RDS(on)
M4
L4
L6
L8
Description
The IRF6892SPbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFET TM packaging to achieve
the lowest on-state resistance in a package that has the footprint of a SO-8 and less than 0.7 mm profile. The DirectFET package is
compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection
soldering techniques. Application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package
allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF6892SPbF balances industry leading on-state resistance while minimizing gate charge along with low gate resistance to reduce both
conduction and switching losses. This part contains an integrated Schottky diode to reduce the Qrr of the body drain diode further reducing
the losses in a Synchronous Buck circuit. The reduced losses make this product ideal for high frequency/high efficiency DC-DC converters
that power high current loads such as the latest generation of microprocessors. The IRF6892SPbF has been optimized for parameters that
are critical in synchronous buck converter’s Sync FET sockets.
Absolute Maximum Ratings
Max.
Parameter
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
VGS
ID @ TA = 25°C
ID @ TA = 70°C
ID @ TC = 25°C
IDM
EAS
IAR
g
Pulsed Drain Current
Single Pulse Avalanche Energy
Avalanche Current
g
Typical RDS(on) (mΩ)
ID = 28A
6.0
4.0
TJ = 125°C
2.0
TJ = 25°C
0.0
2
4
6
8
10
12
14
e
e
f
h
8.0
16
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
Units
25
±16
28
22
125
220
240
22
VGS, Gate-to-Source Voltage (V)
VDS
V
A
mJ
A
14.0
ID= 22A
12.0
VDS= 20V
VDS= 13V
10.0
VDS= 5V
8.0
6.0
4.0
2.0
0.0
0
10
20
30
40
50
QG Total Gate Charge (nC)
Fig 2. Typical Total Gate Charge vs Gate-to-Source Voltage
Notes:
 Click on this section to link to the appropriate technical paper.
‚ Click on this section to link to the DirectFET Website.
ƒ Surface mounted on 1 in. square Cu board, steady state.
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„ TC measured with thermocouple mounted to top (Drain) of part.
Repetitive rating; pulse width limited by max. junction temperature.
† Starting TJ = 25°C, L = 1.2mH, RG = 25Ω, IAS = 22A.
1
4/4/12
IRF6892STR/TR1PbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min.
Conditions
Typ. Max. Units
BVDSS
Drain-to-Source Breakdown Voltage
25
–––
–––
ΔΒVDSS/ΔTJ
Breakdown Voltage Temp. Coefficient
–––
11
–––
RDS(on)
Static Drain-to-Source On-Resistance
–––
1.3
1.7
–––
2.0
2.6
VGS = 0V, ID = 1mA
V
mV/°C Reference to 25°C, ID = 5mA
VGS = 10V, ID = 28A
mΩ
VGS = 4.5V, ID = 22A
i
i
VGS(th)
Gate Threshold Voltage
1.1
1.8
2.1
V
ΔVGS(th)/ΔTJ
IDSS
Gate Threshold Voltage Coefficient
–––
-9.8
–––
mV/°C
Drain-to-Source Leakage Current
–––
–––
500
μA
VDS = 20V, VGS = 0V
–––
–––
5.0
mA
VDS = 20V, VGS = 0V, TJ = 125°C
IGSS
gfs
Qg
Gate-to-Source Forward Leakage
–––
–––
100
Gate-to-Source Reverse Leakage
–––
–––
-100
nA
S
VDS = VGS, ID = 50μA
VGS = 16V
VGS = -16V
VDS = 13V, ID = 22A
Forward Transconductance
290
–––
–––
Total Gate Charge
–––
17
25
Qgs1
Pre-Vth Gate-to-Source Charge
–––
4.0
–––
VDS = 13V
Qgs2
Post-Vth Gate-to-Source Charge
–––
2.3
–––
VGS = 4.5V
Qgd
Gate-to-Drain Charge
–––
6.0
–––
Qgodr
–––
4.7
–––
Qsw
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
–––
8.3
–––
Qoss
Output Charge
–––
16
–––
nC
ID = 22A
See Fig. 2 & 15
nC
RG
Gate Resistance
–––
0.4
td(on)
Turn-On Delay Time
–––
12
–––
tr
Rise Time
–––
30
–––
td(off)
Turn-Off Delay Time
–––
16
–––
tf
Fall Time
–––
9.5
–––
Ciss
Input Capacitance
–––
2510
–––
Coss
Output Capacitance
–––
850
–––
Crss
Reverse Transfer Capacitance
–––
190
–––
Min.
Typ. Max. Units
VDS = 10V, VGS = 0V
Ω
VDD = 13V, VGS = 4.5V
ns
ID = 22A
i
RG= 1.8Ω
VGS = 0V
pF
VDS = 13V
ƒ = 1.0MHz
Diode Characteristics
Parameter
IS
Continuous Source Current
(Body Diode)
ISM
Pulsed Source Current
g
–––
–––
76
–––
–––
220
Conditions
MOSFET symbol
A
D
showing the
G
integral reverse
VSD
Diode Forward Voltage
–––
–––
0.75
V
p-n junction diode.
TJ = 25°C, IS = 22A, VGS = 0V
trr
Reverse Recovery Time
–––
22
33
ns
TJ = 25°C, IF = 22A
Qrr
Reverse Recovery Charge
–––
37
56
nC
di/dt = 300A/μs
(Body Diode)
i
S
i
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
‡ Pulse width ≤ 400μs; duty cycle ≤ 2%.
2
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IRF6892STR/TR1PbF
Absolute Maximum Ratings
Max.
Parameter
e
e
f
Units
2.1
1.3
42
270
-40 to + 150
Power Dissipation
Power Dissipation
Power Dissipation
Peak Soldering Temperature
Operating Junction and
Storage Temperature Range
PD @TA = 25°C
PD @TA = 70°C
PD @TC = 25°C
TP
TJ
TSTG
W
°C
Thermal Resistance
Parameter
el
jl
kl
fl
RθJA
RθJA
RθJA
RθJC
RθJ-PCB
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Case
Junction-to-PCB Mounted
Linear Derating Factor
e
Typ.
Max.
Units
–––
12.5
20
–––
1.0
60
–––
–––
3.0
–––
°C/W
0.016
W/°C
100
Thermal Response ( ZthJA )
D = 0.50
10
0.20
0.10
0.05
1
0.02
0.01
0.1
0.01
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
t1 , Rectangular Pulse Duration (sec)
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient 
Notes:
‰ Mounted on minimum footprint full size board with metalized
ƒ Surface mounted on 1 in. square Cu board, steady state.
„ TC measured with thermocouple incontact with top (Drain) of part. back and with small clip heatsink.
Š Rθ is measured at TJ of approximately 90°C.
ˆ Used double sided cooling, mounting pad with large heatsink.
ƒ Surface mounted on 1 in. square Cu
board (still air).
www.irf.com
‰ Mounted on minimum footprint full size board with metalized
back and with small clip heatsink. (still air)
3
IRF6892STR/TR1PbF
1000
1000
100
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
10V
4.5V
3.5V
3.2V
2.9V
2.7V
2.6V
2.4V
10
1
BOTTOM
10
2.5V
≤60μs PULSE WIDTH
≤60μs PULSE WIDTH
2.5V
Tj = 150°C
Tj = 25°C
0.1
0.1
100
1
10
VGS
10V
4.5V
3.5V
3.2V
2.9V
2.7V
2.6V
2.4V
1
100
0.1
VDS, Drain-to-Source Voltage (V)
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 4. Typical Output Characteristics
Fig 5. Typical Output Characteristics
1000
2.0
Typical RDS(on) (Normalized)
ID, Drain-to-Source Current (A)
ID = 28A
100
T J = 150°C
T J = 25°C
T J = -40°C
10
1
VDS = 15V
≤60μs PULSE WIDTH
0.1
1
2
3
-60 -40 -20 0
20 40 60 80 100 120 140 160
Fig 7. Normalized On-Resistance vs. Temperature
14
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
T J = 25°C
Vgs = 3.5V
Vgs = 4.0V
Vgs = 4.5V
Vgs = 5.0V
Vgs = 10V
12
Typical RDS(on) ( mΩ)
C oss = C ds + C gd
C, Capacitance(pF)
1.0
T J , Junction Temperature (°C)
Fig 6. Typical Transfer Characteristics
10000
Ciss
Coss
1000
Crss
10
8
6
4
2
0
100
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
4
V GS = 4.5V
1.5
0.5
4
VGS, Gate-to-Source Voltage (V)
100000
V GS = 10V
0
20
40
60
80 100 120 140 160 180
ID, Drain Current (A)
Fig 9. Typical On-Resistance vs.
Drain Current and Gate Voltage
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IRF6892STR/TR1PbF
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
100
T J = 150°C
T J = 25°C
10
T J = -40°C
VGS = 0V
0.4
0.6
0.8
100
1msec
10msec
10
1
0.1
TA = 25°C
DC
Tj = 150°C
Single Pulse
0.01
1.0
0.1
1
10
100
VDS , Drain-toSource Voltage (V)
VSD, Source-to-Drain Voltage (V)
Fig 10. Typical Source-Drain Diode Forward Voltage
Fig 11. Maximum Safe Operating Area
2.5
Typical VGS(th) Gate threshold Voltage (V)
140
120
ID, Drain Current (A)
100μsec
0.01
1
0.2
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
80
60
40
20
ID = 1.0mA
2.0
1.5
1.0
0
25
50
75
100
125
-75 -50 -25
150
0
25
50
75 100 125 150
T J , Temperature ( °C )
T C , Case Temperature (°C)
Fig 13. Typical Threshold Voltage vs. Junction
Temperature
Fig 12. Maximum Drain Current vs. Case Temperature
EAS , Single Pulse Avalanche Energy (mJ)
1000
ID
1.3A
2.1A
BOTTOM 22A
TOP
800
600
400
200
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 14. Maximum Avalanche Energy vs. Drain Current
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5
IRF6892STR/TR1PbF
Id
Vds
Vgs
L
VCC
DUT
0
20K
1K
Vgs(th)
S
Qgodr
Fig 15a. Gate Charge Test Circuit
Qgs2 Qgs1
Qgd
Fig 15b. Gate Charge Waveform
V(BR)DSS
tp
15V
DRIVER
L
VDS
D.U.T
RG
+
V
- DD
IAS
20V
I AS
0.01Ω
tp
Fig 16a. Unclamped Inductive Test Circuit
VDS
VGS
RG
A
RD
Fig 16b. Unclamped Inductive Waveforms
VGS
90%
D.U.T.
+
- VDD
V10V
GS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 17a. Switching Time Test Circuit
6
10%
VDS
td(off)
tf
td(on)
tr
Fig 17b. Switching Time Waveforms
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IRF6892STR/TR1PbF
D.U.T
Driver Gate Drive
+
ƒ
+
‚
-
„
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+

RG
•
•
•
•
di/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D=
Period
P.W.
VDD
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor
Current
Inductor Curent
-
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 19. Diode Reverse Recovery Test Circuit for N-Channel
HEXFET® Power MOSFETs
DirectFET®plus Board Footprint, S3C (Small Size Can).
Please see AN-1035 for DirectFET assembly details and stencil and substrate design recommendations
G=GATE
D=DRAIN
S=SOURCE
D
D
www.irf.com
S
S
G
S
D
D
7
IRF6892STR/TR1PbF
DirectFET®plus Outline Dimension, S3C Outline (Small Size Can).
Please see AN-1035 for DirectFET assembly details and stencil and substrate design recommendations
DIMENSIONS
CODE
A
B
C
D
E
F
G
H
J
K
L
M
P
R
METRIC
MIN
MAX
4.75
4.85
3.70
3.95
2.75
2.85
0.35
0.45
0.48
0.52
0.48
0.52
1.18
1.22
0.68
0.72
0.38
0.42
0.90
1.00
1.80
1.90
0.52
0.62
0.08
0.17
0.02
0.08
IMPERIAL
MAX
MIN
0.191
0.187
0.156
0.146
0.112
0.108
0.018
0.014
0.020
0.019
0.019
0.020
0.047
0.048
0.027
0.028
0.016
0.015
0.039
0.035
0.075
0.071
0.020
0.024
0.003
0.007
0.0008 0.0031
DirectFET®plus Part Marking
GATE MARKING
LOGO
PART NUMBER
BATCH NUMBER
DATE CODE
Line above the last character of
the date code indicates "Lead-Free"
8
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IRF6892STR/TR1PbF
DirectFET®plus Tape & Reel Dimension (Showing component orientation).
F
E
A
B
C
D
G
H
NOTE: Controlling dimensions in mm
Std reel quantity is 4800 parts. (ordered as IRF6892STRPBF). For 1000 parts on 7"
reel, order IRF6892STR1PBF
STANDARD OPTION
METRIC
CODE
MIN
MAX
A
330.0
N.C
B
20.2
N.C
C
12.8
13.2
D
1.5
N.C
E
100.0
N.C
F
N.C
18.4
G
12.4
14.4
H
11.9
15.4
REEL DIMENSIONS
TR1 OPTION
(QTY 4800)
METRIC
IMPERIAL
MIN
MAX
MAX
MIN
12.992
N.C
177.77 N.C
0.795
N.C
N.C
19.06
0.504
0.520
13.5
12.8
0.059
1.5
N.C
N.C
3.937
N.C
58.72
N.C
N.C
N.C
0.724
13.50
0.488
0.567
11.9
12.01
0.469
0.606
11.9
12.01
(QTY 1000)
IMPERIAL
MIN
MAX
6.9
N.C
0.75
N.C
0.53
0.50
0.059
N.C
2.31
N.C
N.C
0.53
0.47
N.C
0.47
N.C
LOADED TAPE FEED D IRECTION
A
H
F
C
D
B
E
NO TE: C ON TRO LLING
DIMEN SION S IN MM
C OD E
A
B
C
D
E
F
G
H
G
DIMEN SIO NS
IMPERIAL
METR IC
MAX
MIN
MIN
MAX
0.311
7.90
0.319
8.10
0.1 54
0.161
3.90
4.10
0.4 69
11.90
0.484
12.30
0.2 15
5.45
0.219
5.55
0.1 58
4.00
0.165
4.20
0.1 97
5.00
0.205
5.20
0.0 59
1.50
N.C
N.C
0.0 59
1.50
0.063
1.60
Note: For the most current drawing please refer to IR website at http://www.irf.com/package
Data and specifications subject to change without notice.
This product has been designed and qualified to MSL1 rating for the Consumer market.
Additional storage requirement details for DirectFET products can be found in application note AN1035 on IR’s Web site.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.04/2012
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9
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