LINER LTC3809EMSE-PBF No rsenseâ ¢, low emi, synchronous dc/dc controller Datasheet

LTC3809
No RSENSE™, Low EMI,
Synchronous DC/DC Controller
DESCRIPTION
FEATURES
n
n
n
n
n
n
n
n
n
n
n
n
n
n
No Current Sense Resistor Required
Selectable Spread Spectrum Frequency Modulation
for Low Noise Operation
Constant Frequency Current Mode Operation for
Excellent Line and Load Transient Response
True PLL for Frequency Locking or Adjustment
(Frequency Range: 250kHz to 750kHz)
Wide VIN Range: 2.75V to 9.8V
Wide VOUT Range: 0.6V to VIN
0.6V ±1.5% Reference
Low Dropout Operation: 100% Duty Cycle
Selectable Burst Mode®/Pulse-Skipping/Forced
Continuous Operation
Auxiliary Winding Regulation
Internal Soft-Start Circuitry
Output Overvoltage Protection
Micropower Shutdown: IQ = 9μA
Tiny Thermally Enhanced Leadless (3mm × 3mm)
DFN and 10-lead MSOP Packages
APPLICATIONS
n
n
n
The LTC®3809 is a synchronous step-down switching regulator controller that drives external complementary power
MOSFETs using few external components. The constant
frequency current mode architecture with MOSFET VDS
sensing eliminates the need for a current sense resistor
and improves efficiency.
For noise sensitive applications, the LTC3809 can be externally synchronized from 250kHz to 750kHz. Burst Mode is
inhibited during synchronization or when the SYNC/MODE
pin is pulled low to reduce noise and RF interference. To
further reduce EMI, the LTC3809 incorporates a novel
spread spectrum frequency modulation technique.
Burst Mode operation provides high efficiency operation
at light loads. 100% duty cycle provides low dropout
operation, extending operating time in battery-powered
systems.
The switching frequency can be programmed up to 750kHz,
allowing the use of small surface mount inductors and
capacitors.
The LTC3809 is available in tiny footprint thermally
enhanced DFN and 10-lead MSOP packages.
1- or 2-Cell Lithium-Ion Powered Devices
Portable Instruments
Distributed DC Power Systems
L, LT, LTC, LTM and Burst Mode are registered trademarks of Linear Technology Corporation.
No RSENSE is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 5481178, 5929620, 6580258, 6304066, 5847554,
6611131, 6498466. Other Patents pending.
TYPICAL APPLICATION
Efficiency and Power Loss vs Load Current
100
10k
EFFICIENCY
High Efficiency, 550kHz Step-Down Converter
SYNC/MODE
TG
59k
2.2μH
15k
187k
470pF
VFB
SW
ITH
BG
IPRG
RUN
VOUT
2.5V
2A
EFFICIENCY (%)
VIN
VIN = 5V
80
100
POWER LOSS
VIN = 4.2V
70
1
FIGURE 10 CIRCUIT
VOUT = 2.5V
50
1
3809 TA01
10
60
47μF
GND
1k
VIN = 4.2V
POWER LOSS (mW)
10μF
LTC3809
PLLLPF
VIN = 3.3V
90
VIN
2.75V TO 9.8V
10
100
1000
LOAD CURRENT (mA)
0.1
10000
3809 TA01b
3809fc
1
LTC3809
ABSOLUTE MAXIMUM RATINGS (Note 1)
Input Supply Voltage (VIN) ........................ –0.3V to 10V
PLLLPF, RUN, SYNC/MODE,
IPRG Voltages ............................... –0.3V to (VIN + 0.3V)
VFB , ITH Voltages ...................................... –0.3V to 2.4V
SW Voltage ......................... –2V to VIN + 1V (10V Max)
TG, BG Peak Output Current (<10μs) ......................... 1A
Operating Temperature Range (Note 2)....–40°C to 85°C
Storage Temperature Range...................–65°C to 125°C
Junction Temperature (Note 3) ............................ 125°C
Lead Temperature (Soldering, 10 sec)
MSOP Package ................................................. 300°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
PLLLPF
1
10 SW
SYNC/MODE
2
9 VIN
VFB
3
ITH
4
7 BG
RUN
5
6 IPRG
11
PLLLPF
SYNC/MODE
VFB
ITH
RUN
8 TG
1
2
3
4
5
11
10
9
8
7
6
SW
VIN
TG
BG
IPRG
MSE PACKAGE
10-LEAD PLASTIC MSOP
DD PACKAGE
10-LEAD (3mm s 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 40°C/W
EXPOSED PAD (PIN 11) IS GND
(MUST BE SOLDERED TO PCB)
TJMAX = 125°C, θJA = 43°C/W
EXPOSED PAD (PIN 11) IS GND
(MUST BE SOLDERED TO PCB)
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3809EDD#PBF
LTC3809EDD#TRPBF
LBQY
10-Lead (3mm × 3mm) Plastic DFN
–40°C to 85°C
LTC3809EMSE#PBF
LTC3809EMSE#TRPBF
LTBQT
10-Lead Plastic MSOP
–40°C to 85°C
LEAD BASED FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3809EDD
LTC3809EDD#TR
LBQY
10-Lead (3mm × 3mm) Plastic DFN
–40°C to 85°C
LTC3809EMSE
LTC3809EMSE#TR
LTBQT
10-Lead Plastic MSOP
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3809fc
2
LTC3809
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 4.2V unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
350
105
9
3
500
150
20
10
μA
μA
μA
μA
2.55
2.75
V
V
Main Control Loops
Input DC Supply Current
Normal Operation
Sleep Mode
Shutdown
UVLO
(Note 4)
Undervoltage Lockout Threshold (UVLO)
VIN Falling
VIN Rising
l
l
1.95
2.15
2.25
2.45
0.8
1.1
1.4
V
Regulated Feedback Voltage
(Note 5)
l
0.591
0.6
0.609
V
Output Voltage Line Regulation
2.75V < VIN < 9.8V (Note 5)
0.01
0.04
%/V
Output Voltage Load Regulation
ITH = 0.9V (Note 5)
ITH = 1.7V
0.1
–0.1
0.5
–0.5
%
%
VFB Input Current
(Note 5)
9
50
nA
Overvoltage Protect Threshold
Measured at VFB
0.68
0.7
V
RUN = 0V
VIN = UVLO Threshold – 200mV
Shutdown Threshold of RUN Pin
0.66
Overvoltage Protect Hysteresis
20
Auxiliary Feedback Threshold
0.325
0.4
mV
0.475
V
Top Gate (TG) Drive Rise Time
CL = 3000pF
40
ns
Top Gate (TG) Drive Fall Time
CL = 3000pF
40
ns
Bottom Gate (BG) Drive Rise Time
CL = 3000pF
50
ns
Bottom Gate (BG) Drive Fall Time
CL = 3000pF
40
ns
Maximum Current Sense Voltage (ΔVSENSE(MAX))
(VIN – SW)
IPRG = Floating (Note 6)
IPRG = 0V (Note 6)
IPRG = VIN (Note 6)
Soft-Start Time (Internal)
l
l
l
110
70
185
125
85
204
140
100
223
mV
mV
mV
Time for VFB to Ramp from 0.05V to 0.55V
0.5
0.74
0.9
ms
Unsynchronized (SYNC/MODE Not Clocked)
PLLLPF = Floating
PLLLPF = 0V
PLLLPF = VIN
480
260
650
550
300
750
600
340
825
kHz
kHz
kHz
SYNC/MODE Clocked
Minimum Synchronizable Frequency
Maximum Synchronizible Frequency
200
1000
250
750
kHz
kHz
Oscillator and Phase-Locked Loop
Oscillator Frequency
Phase-Locked Loop Lock Range
Phase Detector Output Current
Sinking
Sourcing
fOSC > fSYNC/MODE
fOSC < fSYNC/MODE
–3
3
μA
μA
Spread Spectrum Frequency Range
Minimum Switching Frequency
Maximum Switching Frequency
460
635
kHz
kHz
SYNC/MODE Pull-Down Current
SYNC/MODE = 2.2V
2.6
μA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3809E is guaranteed to meet specified performance from
0°C to 85°C. Specifications over the –40°C to 85°C operating range are
assured by design characterization, and correlation with statistical process
controls.
Note 3: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formula:
TJ = TA + (PD • θJA °C/W)
Note 4: Dynamic supply current is higher due to gate charge being
delivered at the switching frequency.
Note 5: The LTC3809 is tested in a feedback loop that servos ITH to a
specified voltage and measures the resultant VFB voltage.
Note 6: Peak current sense voltage is reduced dependent on duty cycle to
a percentage of value as shown in Figure 1.
3809fc
3
LTC3809
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise noted.
Efficiency vs Load Current
FIGURE 10 CIRCUIT
FIGURE 10 CIRCUIT
95 VIN = 5V, VOUT = 2.5V
95
EFFICIENCY (%)
EFFICIENCY (%)
85
VOUT = 1.2V
80
VOUT = 1.8V
75
85
BURST MODE
(SYNC/MODE =
VIN)
80
75
70
65
70
FORCED
CONTINUOUS
(SYNC/MODE = 0V)
60
65
SYNC/MODE = VIN
VIN = 5V
60
1
10
100
1k
LOAD CURRENT (mA)
10k
40
20
–20
50
1
10
100
1k
LOAD CURRENT (mA)
3809 G01
10k
0.5
1
1.5
ITH VOLTAGE (V)
3809 G02
2
3809 G03
Load Step
(Forced Continuous Mode)
Load Step
(Burst Mode Operation)
VOUT
200mV/DIV
AC COUPLED
VOUT
200mV/DIV
AC COUPLED
IL
2A/DIV
IL
2A/DIV
100μs/DIV
VIN = 3.3V
VOUT = 1.8V
ILOAD = 300mA TO 3A
SYNC/MODE = VIN
FIGURE 10 CIRCUIT
60
0
PULSE SKIPPING
(SYNC/MODE = 0.6V)
55
Burst Mode OPERATION
(ITH RISING)
Burst Mode OPERATION
(ITH FALLING)
FORCED CONTINUOUS
MODE
PULSE SKIPPING
MODE
80
90
VOUT = 3.3V
90
100
100
VOUT = 2.5V
CURRENT LIMIT (%)
100
Maximum Current Sense Voltage
vs ITH Pin Voltage
Efficiency vs Load Current
3809 G04
Load Step (Pulse-Skipping Mode)
100μs/DIV
VIN = 3.3V
VOUT = 1.8V
ILOAD = 300mA TO 3A
SYNC/MODE = 0V
FIGURE 10 CIRCUIT
3809 G05
Start-Up with Internal Soft-Start
VOUT
200mV/DIV
AC COUPLED
VOUT
1.8V
500mV/DIV
IL
2A/DIV
100μs/DIV
VIN = 3.3V
VOUT = 1.8V
ILOAD = 300mA TO 3A
SYNC/MODE = VFB
FIGURE 10 CIRCUIT
3809 G06
200μs/DIV
VIN = 4.2V
RLOAD = 1Ω
FIGURE 10 CIRCUIT
3809 G07
3809fc
4
LTC3809
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise noted.
Regulated Feedback Voltage
vs Temperature
Undervoltage Lockout Threshold
vs Temperature
2.55
0.606
1.20
2.50
0.604
VIN RISING
1.15
0.602
0.600
0.598
RUN VOLTAGE (V)
2.45
INPUT VOLTAGE (V)
FEEDBACK VOLTAGE (V)
Shutdown (RUN) Threshold
vs Temperature
2.40
2.35
2.30
VIN FALLING
1.10
1.05
2.25
0.596
2.20
0.594
–60 –40 –20 0
20 40 60
TEMPERATURE (°C)
80
2.15
20 40 60
–60 –40 –20 0
TEMPERATURE (°C)
100
80
3809 G08
3809 G09
125
120
115
20 40 60
–60 –40 –20 0
TEMPERATURE (°C)
80
100
10
8
2.75
NORMALIZED FREQUENCY (%)
130
2.70
2.65
2.60
2.55
2.50
2.45
80
3809 G11
2
0
–2
–4
–6
–10
20 40 60
–60 –40 –20 0
TEMPERATURE (°C)
100
3809 G12
5
18
4
16
80
100
3809 G13
Shutdown Quiescent Current
vs Input Voltage
Sleep Current vs Input Voltage
130
120
2
1
0
–1
–2
–3
14
SLEEP CURRENT (μA)
3
SHUTDOWN CURRENT (μA)
NORMALIZED FREQUENCY SHIFT (%)
6
4
–8
2.40
20 40 60
–60 –40 –20 0
TEMPERATURE (°C)
Oscillator Frequency
vs Input Voltage
100
Oscillator Frequency
vs Temperature
2.80
IPRG = FLOAT
80
3809 G10
SYNC/MODE Pull-Down Current
vs Temperature
SYNC/MODE PULL-DOWN CURRENT (μA)
MAXIMUM CURRENT SENSE THRESHOLD (mV)
Maximum Current Sense
Threshold vs Temperature
135
1.00
20 40 60
–60 –40 –20 0
TEMPERATURE (°C)
100
12
10
8
6
110
100
90
4
80
2
–4
–5
2
3
4
7
8
5
6
INPUT VOLTAGE (V)
0
9
10
3809 G14
2
3
4
8
7
6
5
INPUT VOLTAGE (V)
70
9
10
3809 G15
2
3
4
7
8
5
6
INPUT VOLTAGE (V)
9
10
3809 G16
3809fc
5
LTC3809
PIN FUNCTIONS
PLLLPF (Pin 1): Frequency Set/PLL Lowpass Filter. When
synchronizing to an external clock, this pin serves as the
lowpass filter point for the phase-locked loop. Normally,
a series RC is connected between this pin and ground.
RUN (Pin 5): Run Control Input. Forcing this pin below
1.1V shuts down the chip. Driving this pin to VIN or releasing this pin enables the chip to start-up with the internal
soft-start.
When not synchronizing to an external clock, this pin serves
as the frequency select input. Tying this pin to GND selects
300kHz operation; tying this pin to VIN selects 750kHz
operation. Floating this pin selects 550kHz operation.
IPRG (Pin 6): Three-State Pin to Select Maximum Peak
Sense Voltage Threshold. This pin selects the maximum
allowed voltage drop between the VIN and SW pins (i.e.,
the maximum allowed drop across the external P-channel
MOSFET). Tie to VIN, GND or float to select 204mV, 85mV
or 125mV respectively.
Connect a 2.2nF capacitor between this pin and GND, and
a 1000pF capacitor between this pin and the SYNC/MODE
when using spread spectrum modulation operation.
SYNC/MODE (Pin 2): This pin performs four functions:
1) auxiliary winding feedback input, 2) external clock
synchronization input for phase-locked loop, 3) Burst
Mode, pulse-skipping or forced continuous mode select,
and 4) enable spread spectrum modulation operation in
pulse-skipping mode. Applying a clock with frequency
between 250kHz to 750kHz causes the internal oscillator
to phase-lock to the external clock and disables Burst
Mode operation but allows pulse-skipping at low load
currents.
To select Burst Mode operation at light loads, tie this
pin to VIN . Grounding this pin selects forced continuous
operation, which allows the inductor current to reverse.
Tying this pin to VFB selects pulse-skipping mode. In these
cases, the frequency of the internal oscillator is set by the
voltage on the PLLLPF pin. Tying to a voltage between
1.35V to VIN – 0.5V enables spread spectrum modulation
operation. In this case, an internal 2.6μA pull-down current
source helps to set the voltage at this pin by tying a resistor
with appropriate value between this pin and VIN. Do not
leave this pin floating.
BG (Pin 7): Bottom (NMOS) Gate Drive Output. This pin
drives the gate of the external N-channel MOSFET. This
pin has an output swing from PGND to VIN.
TG (Pin 8): Top (PMOS) Gate Drive Output. This pin drives
the gate of the external P-channel MOSFET. This pin has
an output swing from PGND to VIN.
VIN (Pin 9): Chip Signal Power Supply. This pin powers
the entire chip, the gate drivers and serves as the positive
input to the differential current comparator.
SW (Pin 10): Switch Node Connection to Inductor. This
pin is also the negative input to the differential current
comparator and an input to the reverse current comparator.
Normally this pin is connected to the drain of the external
P-channel MOSFET, the drain of the external N-channel
MOSFET and the inductor.
GND (Pin 11): Exposed Pad. The Exposed Pad is ground
and must be soldered to the PCB ground for electrical
contact and optimum thermal performance.
VFB (Pin 3): Feedback Pin. This pin receives the remotely
sensed feedback voltage for the controller from an external
resistor divider across the output.
ITH (Pin 4): Current Threshold and Error Amplifier
Compensation Point. Nominal operating range on this pin
is from 0.7V to 2V. The voltage on this pin determines the
threshold of the main current comparator.
3809fc
6
LTC3809
FUNCTIONAL DIAGRAM
VIN
CIN
9 VIN
VOLTAGE
REFERENCE
VREF
0.6V
6 IPRG
SLOPE
CLK
+
UNDERVOLTAGE
LOCKOUT
8
Q
R
ICMP
SENSE+
S
VIN
ANTI-SHOOTTHROUGH
5
7
RUN
+
t = 1ms
INTERNAL
SOFT-START
0.15V
–
2
CLOCK DETECT
0.4V
–
0.68V
RB
BURSTDIS
FCB
PHASE
DETECTOR
+
0.54V
–
VFB
UV
+
2.6μA
MN
+
0.3V
SYNC/MODE BURST DEFEAT
BG
OV
BURSTDIS
GND
VOUT
FCB
SLEEP
IREV
SS
L
SW
COUT
UVSD
VIN
11
10
PVIN
VIN
0.7μA
MP
GND
SWITCHING
LOGIC AND
BLANKING
CIRCUIT
–
TG
4
ITH
RC
+
EAMP +
–
–
1
PLLLPF
VREF
0.6V
SS
3
CC
VFB
RA
VCO
3809 FD
CLK
IREV
+
SW
–
GND
RICMP
3809fc
7
LTC3809
OPERATION (Refer to Functional Diagram)
Main Control Loop
The LTC3809 uses a constant frequency, current mode
architecture. During normal operation, the top external
P-channel power MOSFET is turned on when the clock
sets the RS latch, and is turned off when the current
comparator (ICMP) resets the latch. The peak inductor
current at which ICMP resets the RS latch is determined
by the voltage on the ITH pin, which is driven by the output
of the error amplifier (EAMP). The VFB pin receives the
output voltage feedback signal from an external resistor
divider. This feedback signal is compared to the internal
0.6V reference voltage by the EAMP. When the load current increases, it causes a slight decrease in VFB relative
to the 0.6V reference, which in turn causes the ITH voltage
to increase until the average inductor current matches the
new load current. While the top P-channel MOSFET is off,
the bottom N-channel MOSFET is turned on until either
the inductor current starts to reverse, as indicated by the
current reversal comparator IRCMP, or the beginning of
the next cycle.
Shutdown and Soft-Start (RUN Pin)
The LTC3809 is shut down by pulling the RUN pin low.
In shutdown, all controller functions are disabled and the
chip draws only 9μA. The TG output is held high (off) and
the BG output low (off) in shutdown. Releasing the RUN
pin allows an internal 0.7μA current source to pull up the
RUN pin to VIN. The controller is enabled when the RUN
pin reaches 1.1V.
The start-up of VOUT is controlled by the LTC3809’s internal soft-start. During soft-start, the error amplifier EAMP
compares the feedback signal VFB to the internal soft-start
ramp (instead of the 0.6V reference), which rises linearly
from 0V to 0.6V in about 1ms. This allows the output
voltage to rise smoothly from 0V to its final value while
maintaining control of the inductor current.
Light Load Operation (Burst Mode Operation,
Continuous Conduction or Pulse-Skipping Mode)
(SYNC/MODE Pin)
The LTC3809 can be programmed for either high efficiency
Burst Mode operation, forced continuous conduction
mode or pulse-skipping mode at low load currents. To
select Burst Mode operation, tie the SYNC/MODE pin
to VIN. To select forced continuous operation, tie the
SYNC/MODE pin to a DC voltage below 0.4V (e.g., GND).
Tying the SYNC/MODE to a DC voltage above 0.4V and
below 1.2V (e.g., VFB) enables pulse-skipping mode. The
0.4V threshold between forced continuous operation and
pulse-skipping mode can be used in secondary winding
regulation as described in the Auxiliary Winding Control
Using SYNC/MODE Pin discussion in the Applications
Information section.
When the LTC3809 is in Burst Mode operation, the peak
current in the inductor is set to approximately one-fourth
of the maximum sense voltage even though the voltage on
the ITH pin indicates a lower value. If the average inductor
current is higher than the load current, the EAMP will
decrease the voltage on the ITH pin. When the ITH voltage
drops below 0.85V, the internal SLEEP signal goes high
and the external MOSFET is turned off.
In sleep mode, much of the internal circuitry is turned off,
reducing the quiescent current that the LTC3809 draws.
The load current is supplied by the output capacitor. As
the output voltage decreases, the EAMP increases the
ITH voltage. When the ITH voltage reaches 0.925V, the
SLEEP signal goes low and the controller resumes normal
operation by turning on the external P-channel MOSFET
on the next cycle of the internal oscillator.
When the controller is enabled for Burst Mode or pulseskipping operation, the inductor current is not allowed to
reverse. Hence, the controller operates discontinuously.
3809fc
8
LTC3809
OPERATION (Refer to Functional Diagram)
The reverse current comparator RICMP senses the drain-tosource voltage of the bottom external N-channel MOSFET.
This MOSFET is turned off just before the inductor current
reaches zero, preventing it from going negative.
In forced continuous operation, the inductor current is
allowed to reverse at light loads or under large transient
conditions. The peak inductor current is determined by the
voltage on the ITH pin. The P-channel MOSFET is turned
on every cycle (constant frequency) regardless of the ITH
pin voltage. In this mode, the efficiency at light loads is
lower than in Burst Mode operation. However, continuous
mode has the advantages of lower output ripple and no
noise at audio frequencies.
When the SYNC/MODE pin is clocked by an external
clock source to use the phase-locked loop (see Frequency
Selection and Phase-Locked Loop), or is set to a DC
voltage between 0.4V and several hundred mV below
VIN, the LTC3809 operates in PWM pulse-skipping mode
at light loads. In this mode, the current comparator
ICMP may remain tripped for several cycles and force
the external P-channel MOSFET to stay off for the same
number of cycles. The inductor current is not allowed
to reverse (discontinuous operation). This mode, like
forced continuous operation, exhibits low output ripple
as well as low audio noise and reduced RF interference as
compared to Burst Mode operation. However, it provides
low current efficiency higher than forced continuous
mode, but not nearly as high as Burst Mode operation.
During start-up or an undervoltage condition (VFB ≤
0.54V), the LTC3809 operates in pulse-skipping mode
(no current reversal allowed), regardless of the state of
the SYNC/MODE pin.
Short-Circuit and Current Limit Protection
The LTC3809 monitors the voltage drop ΔVSC (between
the GND and SW pins) across the external N-channel
MOSFET with the short-circuit current limit comparator.
The allowed voltage is determined by:
ΔVSC(MAX) = A • 90mV
where A is a constant determined by the state of the IPRG
pin. Floating the IPRG pin selects A = 1; tying IPRG to VIN
selects A = 5/3; tying IPRG to GND selects A = 2/3.
The inductor current limit for short-circuit protection is
determined by ΔVSC(MAX) and the on-resistance of the
external N-channel MOSFET:
ISC =
ΔVSC(MAX)
RDS(ON)
Once the inductor current exceeds ISC, the short current
comparator will shut off the external P-channel MOSFET
until the inductor current drops below ISC.
Output Overvoltage Protection
As further protection, the overvoltage comparator (OVP)
guards against transient overshoots, as well as other more
serious conditions that may overvoltage the output. When
the feedback voltage on the VFB pin has risen 13.33%
above the reference voltage of 0.6V, the external P-channel MOSFET is turned off and the N-channel MOSFET is
turned on until the overvoltage is cleared.
3809fc
9
LTC3809
OPERATION (Refer to Functional Diagram)
Frequency Selection and Phase-Locked Loop
(PLLLPF and SYNC/MODE Pins)
The selection of switching frequency is a tradeoff between
efficiency and component size. Low frequency operation
increases efficiency by reducing MOSFET switching
losses, but requires larger inductance and/or capacitance
to maintain low output ripple voltage.
The switching frequency of the LTC3809’s controllers can
be selected using the PLLLPF pin. If the SYNC/MODE is
not being driven by an external clock source, the PLLLPF
can be floated, tied to VIN or tied to GND to select 550kHz,
750kHz or 300kHz, respectively.
A phase-locked loop (PLL) is available on the LTC3809
to synchronize the internal oscillator to an external clock
source that connects to the SYNC/MODE pin. In this case,
a series RC should be connected between the PLLLPF pin
and GND to serve as the PLL’s loop filter. The LTC3809
phase detector adjusts the voltage on the PLLLPF pin to
align the turn-on of the external P-channel MOSFET to
the rising edge of the synchronizing signal.
The typical capture range of the LTC3809’s phase-locked
loop is from approximately 200kHz to 1MHz.
Spread Spectrum Modulation (SYNC/MODE and
PLLLPF Pins)
Connecting the SYNC/MODE pin to a DC voltage above
1.35V and several hundred mV below VIN enables spread
spectrum modulation (SSM) operation. An internal 2.6μA
pull-down current source at SYNC/MODE helps to set the
voltage at the SYNC/MODE pin for this operation by tying a
resistor with appropriate value between SYNC/MODE and
VIN. This mode of operation spreads the internal oscillator
frequency fOSC (= 550kHz) over a wider range (460kHz to
635kHz), reducing the peaks of the harmonic output on a
spectral analysis of the output noise. In this case, a 2.2nF
filter cap should be connected between the PLLLPF pin
and GND and another 1000pF cap should be connected
between PLLLPF and the SYNC/MODE pin. The controller
operates in PWM pulse-skipping mode at light loads when
spread spectrum modulation is selected. See the discussion
of Spread Spectrum Modulation with SYNC/MODE and
PLLLPF Pins in the Applications Information section.
Dropout Operation
When the input supply voltage (VIN) approaches the output
voltage, the rate of change of the inductor current while the
external P-channel MOSFET is on (ON cycle) decreases.
This reduction means that the P-channel MOSFET will
remain on for more than one oscillator cycle if the inductor
current has not ramped up to the threshold set by the
EAMP on the ITH pin. Further reduction in the input supply
voltage will eventually cause the P-channel MOSFET to be
turned on 100%; i.e., DC. The output voltage will then be
determined by the input voltage minus the voltage drop
across the P-channel MOSFET and the inductor.
Undervoltage Lockout
To prevent operation of the P-channel MOSFET below
safe input voltage levels, an undervoltage lockout is
incorporated in the LTC3809. When the input supply
voltage (VIN) drops below 2.25V, the external P- and
N-channel MOSFETs and all internal circuits are turned
off except for the undervoltage block, which draws only
a few microamperes.
3809fc
10
LTC3809
OPERATION (Refer to Functional Diagram)
Peak Current Sense Voltage Selection and Slope
Compensation (IPRG Pin)
When the LTC3809 controller is operating below 20%
duty cycle, the peak current sense voltage (between the
VIN and SW pins) allowed across the external P-channel
MOSFET is determined by:
ΔVSENSE(MAX) = A •
VITH – 0.7 V
10
where A is a constant determined by the state of the IPRG
pin. Floating the IPRG pin selects A = 1; tying IPRG to VIN
selects A = 5/3; tying IPRG to GND selects A = 2/3. The
maximum value of VITH is typically about 1.98V, so the
maximum sense voltage allowed across the external Pchannel MOSFET is 125mV, 85mV or 204mV for the three
respective states of the IPRG pin.
However, once the controller’s duty cycle exceeds 20%,
slope compensation begins and effectively reduces the
peak sense voltage by a scale factor (SF) given by the
curve in Figure 1.
The peak inductor current is determined by the peak sense
voltage and the on-resistance of the external P-channel
MOSFET:
IPK =
ΔVSENSE(MAX)
RDS(ON)
110
100
90
SF = I/IMAX (%)
80
70
60
50
40
30
20
10
0
0
10 20 30 40 50 60 70 80 90 100
DUTY CYCLE (%)
3809 F01
Figure 1. Maximum Peak Current vs Duty Cycle
3809fc
11
LTC3809
APPLICATIONS INFORMATION
The typical LTC3809 application circuit is shown in Figure 10. External component selection for the controller
is driven by the load requirement and begins with the
selection of the inductor and the power MOSFETs.
Power MOSFET Selection
The LTC3809’s controller requires two external power
MOSFETs: a P-channel MOSFET for the topside (main)
switch and a N-channel MOSFET for the bottom (synchronous) switch. The main selection criteria for the power
MOSFETs are the breakdown voltage VBR(DSS), threshold
voltage VGS(TH), on-resistance RDS(ON), reverse transfer
capacitance CRSS, turn-off delay tD(OFF) and the total gate
charge QG.
The gate drive voltage is the input supply voltage. Since
the LTC3809 is designed for operation down to low input
voltages, a sublogic level MOSFET (RDS(ON) guaranteed at
VGS = 2.5V) is required for applications that work close to
this voltage. When these MOSFETs are used, make sure that
the input supply to the LTC3809 is less than the absolute
maximum MOSFET VGS rating, which is typically 8V.
The P-channel MOSFET’s on-resistance is chosen based
on the required load current. The maximum average load
current IOUT(MAX) is equal to the peak inductor current
minus half the peak-to-peak ripple current IRIPPLE. The
LTC3809’s current comparator monitors the drain-tosource voltage VDS of the top P-channel MOSFET, which
is sensed between the VIN and SW pins. The peak inductor current is limited by the current threshold, set by the
voltage on the ITH pin, of the current comparator. The
voltage on the ITH pin is internally clamped, which limits
the maximum current sense threshold ΔVSENSE(MAX) to
approximately 125mV when IPRG is floating (85mV when
IPRG is tied low; 204mV when IPRG is tied high).
The output current that the LTC3809 can provide is given
by:
IOUT(MAX) =
ΔVSENSE(MAX) IRIPPLE
–
RDS(ON)
2
where IRIPPLE is the inductor peak-to-peak ripple current
(see Inductor Value Calculation).
A reasonable starting point is setting ripple current IRIPPLE
to be 40% of IOUT(MAX). Rearranging the above equation
yields:
RDS(ON)MAX =
5 ΔVSENSE(MAX)
•
for Duty Cycle < 20%
6
IOUT(MAX)
However, for operation above 20% duty cycle, slope
compensation has to be taken into consideration to select
the appropriate value of RDS(ON) to provide the required
amount of load current:
RDS(ON)MAX =
ΔVSENSE(MAX)
5
• SF •
6
IOUT(MAX)
where SF is a scale factor whose value is obtained from
the curve in Figure 1.
These must be further derated to take into account the
significant variation in on-resistance with temperature.
The following equation is a good guide for determining the
required RDS(ON)MAX at 25°C (manufacturer’s specification), allowing some margin for variations in the LTC3809
and external component values:
RDS(ON)MAX =
ΔVSENSE(MAX)
5
• 0.9 • SF •
6
IOUT(MAX) • ρT
The ρT is a normalizing term accounting for the temperature
variation in on-resistance, which is typically about 0.4%/°C,
as shown in Figure 2. Junction-to-case temperature TJC is
about 10°C in most applications. For a maximum ambient temperature of 70°C, using ρ80°C ~ 1.3 in the above
equation is a reasonable choice.
The N-channel MOSFET’s on resistance is chosen based
on the short-circuit current limit (ISC). The LTC3809’s
short-circuit current limit comparator monitors the drainto-source voltage VDS of the bottom N-channel MOSFET,
which is sensed between the GND and SW pins. The
3809fc
12
LTC3809
APPLICATIONS INFORMATION
VOUT
VIN
V –V
Bottom N-Channel Duty Cycle = IN OUT
VIN
2.0
RT NORMALIZED ON RESISTANCE
Top P-Channel Duty Cycle =
1.5
1.0
The MOSFET power dissipations at maximum output
current are:
0.5
0
–50
50
100
0
JUNCTION TEMPERATURE (°C)
Figure 2. RDS(ON) vs Temperature
short-circuit current sense threshold ΔVSC is set approximately 90mV when IPRG is floating (60mV when IPRG is
tied low; 150mV when IPRG is tied high). The on-resistance
of N-channel MOSFET is determined by:
ΔVSC
ISC(PEAK)
The short-circuit current limit (ISC(PEAK)) should be larger
than the IOUT(MAX) with some margin to avoid interfering
with the peak current sensing loop. On the other hand,
in order to prevent the MOSFETs from excessive heating
and the inductor from saturation, ISC(PEAK) should be
smaller than the minimum value of their current ratings.
A reasonable range is:
IOUT(MAX) < ISC(PEAK) < IRATING(MIN)
Therefore, the on-resistance of N-channel MOSFET should
be chosen within the following range:
ΔVSC
IRATING(MIN)
< RDS(ON) <
VOUT
• IOUT (MAX)2 • ρT • RDS(ON) + 2 • VIN2
VIN
• IOUT (MAX) • C RSS • f
PBOT =
VIN – VOUT
• IOUT (MAX)2 • ρT • RDS(ON)
VIN
150
3809 F02
RDS(ON)MAX =
PTOP =
ΔVSC
IOUT(MAX)
where ΔVSC is 90mV, 60mV or 150mV with IPRG being
floated, tied to GND or VIN respectively.
The power dissipated in the MOSFET strongly depends
on its respective duty cycles and load current. When the
LTC3809 is operating in continuous mode, the duty cycles
for the MOSFETs are:
Both MOSFETs have I2R losses and the PTOP equation
includes an additional term for transition losses, which are
largest at high input voltages. The bottom MOSFET losses
are greatest at high input voltage or during a short-circuit
when the bottom duty cycle is 100%.
The LTC3809 utilizes a non-overlapping, anti-shootthrough gate drive control scheme to ensure that the
P- and N-channel MOSFETs are not turned on at the same
time. To function properly, the control scheme requires
that the MOSFETs used are intended for DC/DC switching
applications. Many power MOSFETs, particularly P-channel
MOSFETs, are intended to be used as static switches and
therefore are slow to turn on or off.
Reasonable starting criteria for selecting the P-channel
MOSFET are that it must typically have a gate charge (QG)
less than 25nC to 30nC (at 4.5VGS) and a turn-off delay
(tD(OFF)) of less than approximately 140ns. However, due
to differences in test and specification methods of various
MOSFET manufacturers, and in the variations in QG and
tD(OFF) with gate drive (VIN) voltage, the P-channel MOSFET
ultimately should be evaluated in the actual LTC3809
application circuit to ensure proper operation.
Shoot-through between the P-channel and N-channel
MOSFETs can most easily be spotted by monitoring the
input supply current. As the input supply voltage increases,
if the input supply current increases dramatically, then the
likely cause is shoot-through. Note that some MOSFETs
3809fc
13
LTC3809
APPLICATIONS INFORMATION
that do not work well at high input voltages (e.g., VIN >
5V) may work fine at lower voltages (e.g., 3.3V).
Selecting the N-channel MOSFET is typically easier, since
for a given RDS(ON), the gate charge and turn-on and turn-off
delays are much smaller than for a P-channel MOSFET.
Operating Frequency and Synchronization
The choice of operating frequency, fOSC, is a trade-off
between efficiency and component size. Low frequency
operation improves efficiency by reducing MOSFET
switching losses, both gate charge loss and transition
loss. However, lower frequency operation requires more
inductance for a given amount of ripple current.
The internal oscillator for the LTC3809’s controller runs
at a nominal 550kHz frequency when the PLLLPF pin is
left floating and the SYNC/MODE pin is not configured
for spread spectrum operation. Pulling the PLLLPF to
VIN selects 750kHz operation; pulling the PLLLPF to GND
selects 300kHz operation.
Alternatively, the LTC3809 will phase-lock to a clock
signal applied to the SYNC/MODE pin with a frequency
between 250kHz and 750kHz (see Phase-Locked Loop
and Frequency Synchronization).
To further reduce EMI, the nominal 550kHz frequency will
be spread over a range with frequencies between 460kHz
and 635kHz when spread spectrum modulation is enabled
(see Spread Spectrum Modulation with SYNC/MODE and
PLLLPF Pins).
Inductor Value Calculation
Given the desired input and output voltages, the inductor
value and operating frequency, fOSC , directly determine
the inductor’s peak-to-peak ripple current:
IRIPPLE =
VOUT VIN – VOUT
•
VIN
fOSC • L
Lower ripple current reduces core losses in the inductor,
ESR losses in the output capacitors and output voltage
ripple. Thus, highest efficiency operation is obtained at
low frequency with a small ripple current. Achieving this,
however, requires a large inductor.
A reasonable starting point is to choose a ripple current
that is about 40% of IOUT(MAX). Note that the largest ripple
current occurs at the highest input voltage. To guarantee
that ripple current does not exceed a specified maximum,
the inductor should be chosen according to:
L≥
VIN – VOUT VOUT
•
fOSC • IRIPPLE VIN
Burst Mode Operation Considerations
The choice of RDS(ON) and inductor value also determines
the load current at which the LTC3809 enters Burst Mode
operation. When bursting, the controller clamps the peak
inductor current to approximately:
IBURST(PEAK) =
1 ΔVSENSE(MAX)
•
4
RDS(ON)
The corresponding average current depends on the
amount of ripple current. Lower inductor values (higher
IRIPPLE) will reduce the load current at which Burst Mode
operation begins.
The ripple current is normally set so that the inductor current is continuous during the burst periods. Therefore,
IRIPPLE ≤ IBURST(PEAK)
This implies a minimum inductance of:
LMIN ≤
VIN – VOUT
V
• OUT
fOSC • IBURST(PEAK) VIN
A smaller value than L MIN could be used in the circuit,
although the inductor current will not be continuous
during burst periods, which will result in slightly lower
efficiency. In general, though, it is a good idea to keep
IRIPPLE comparable to IBURST(PEAK).
Inductor Core Selection
Once the value of L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite, molypermalloy
or Kool Mμ® cores. Actual core loss is independent of core
3809fc
14
LTC3809
APPLICATIONS INFORMATION
size for a fixed inductor value, but is very dependent on
the inductance selected. As inductance increases, core
losses go down. Unfortunately, increased inductance
requires more turns of wire and therefore copper losses
will increase.
sized for the maximum RMS current must be used. The
maximum RMS capacitor current is given by:
Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can
concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard”, which means that
inductance collapses abruptly when the peak design current
is exceeded. Core saturation results in an abrupt increase
in inductor ripple current and consequent output voltage
ripple. Do not allow the core to saturate!
This formula has a maximum value at VIN = 2VOUT,
where IRMS = IOUT/2. This simple worst-case condition
is commonly used for design because even significant
deviations do not offer much relief. Note that capacitor
manufacturer’s ripple current ratings are often based on
2000 hours of life. This makes it advisable to further derate
the capacitor or to choose a capacitor rated at a higher
temperature than required. Several capacitors may be
paralleled to meet the size or height requirements in the
design. Due to the high operating frequency of the LTC3809,
ceramic capacitors can also be used for CIN. Always consult
the manufacturer if there is any question.
Molypermalloy (from Magnetics, Inc.) is a very good,
low loss core material for toroids, but is more expensive
than ferrite. A reasonable compromise from the same
manufacturer is Kool Mμ. Toroids are very space efficient,
especially when several layers of wire can be used, while
inductors wound on bobbins are generally easier to surface mount. However, designs for surface mount that do
not increase the height significantly are available from
Coiltronics, Coilcraft, Dale and Sumida.
Schottky Diode Selection (Optional)
The schottky diode D in Figure 11 conducts current during the dead time between the conduction of the power
MOSFETs. This prevents the body diode of the bottom
N-channel MOSFET from turning on and storing charge
during the dead time, which could cost as much as 1%
in efficiency. A 1A Schottky diode is generally a good
size for most LTC3809 applications, since it conducts
a relatively small average current. Larger diode results
in additional transition losses due to its larger junction
capacitance. This diode may be omitted if the efficiency
loss can be tolerated.
CIN and COUT Selection
In continuous mode, the source current of the P-channel
MOSFET is a square wave of duty cycle (VOUT/VIN). To
prevent large voltage transients, a low ESR input capacitor
VOUT • ( VIN – VOUT )
CIN Re quiredIRMS ≈ IMAX •
VIN
1/ 2
The selection of COUT is driven by the effective series
resistance (ESR). Typically, once the ESR requirement
is satisfied, the capacitance is adequate for filtering. The
output ripple (ΔVOUT) is approximated by:
⎛
⎞
1
ΔVOUT ≈ IRIPPLE • ⎜ ESR +
⎟
⎝
8 • f • C OUT ⎠
where f is the operating frequency, COUT is the output
capacitance and IRIPPLE is the ripple current in the inductor. The output ripple is highest at maximum input voltage
since IRIPPLE increase with input voltage.
Setting Output Voltage
The LTC3809 output voltage is set by an external feedback resistor divider carefully placed across the output,
as shown in Figure 3. The regulated output voltage is
determined by:
⎛ R ⎞
VOUT = 0.6 V • ⎜ 1 + B ⎟
⎝ RA ⎠
3809fc
15
LTC3809
APPLICATIONS INFORMATION
is an edge sensitive digital type that provides zero degrees
phase shift between the external and internal oscillators.
This type of phase detector does not exhibit false lock to
harmonics of the external clock.
LTC3809
RB
CFF
VFB
RA
3809 F03
Figure 3. Settling Output Voltage
For most applications, a 59k resistor is suggested for RA.
In applications where minimizing the quiescent current is
critical, RA should be made bigger to limit the feedback
divider current. If RB then results in very high impedance,
it may be beneficial to bypass RB with a 50pF to 100pF
capacitor CFF .
Run and Soft-Start Functions
The LTC3809 has a low power shutdown mode which is
controlled by the RUN pin. Pulling the RUN pin below 1.1V
puts the LTC3809 into a low quiescent current shutdown
mode (IQ = 9μA). Releasing the RUN pin, an internal 0.7μA
(at VIN = 4.2V) current source will pull the RUN pin up
to VIN, which enables the controller. The RUN pin can be
driven directly from logic as showed in Figure 4.
The output of the phase detector is a pair of complementary
current sources that charge or discharge the external filter
network connected to the PLLLPF pin. The relationship
between the voltage on the PLLLPF pin and operating
frequency, when there is a clock signal applied to SYNC/
MODE, is shown in Figure 5 and specified in the electrical
characteristics table. Note that the LTC3809 can only be
synchronized to an external clock whose frequency is within
range of the LTC3809’s internal VCO, which is nominally
200kHz to 1MHz. This is guaranteed, over temperature and
process variations, to be between 250kHz and 750kHz. A
simplified block diagram is shown in Figure 6.
1200
1000
FREQUENCY (kHz)
VOUT
Once the controller is enabled, the start-up of VOUT is
controlled by the internal soft-start, which slowly ramps
the positive reference to the error amplifier from 0V to 0.6V,
allowing VOUT to rise smoothly from 0V to its final value.
The default internal soft-start time is around 1ms.
3.3V OR 5V
LTC3809
RUN
LTC3809
RUN
800
600
400
200
0
0.2
0.7
1.2
1.7
PLLLPF PIN VOLTAGE (V)
2.2
3809 F05
Figure 5. Relationship Between Oscillator Frequency
and Voltage at the PLLLPF Pin When Synchronizing to
an External Clock
2.4V
3809 F04
RLP
CLP
Figure 4. RUN Pin Interfacing
Phase-Locked Loop and Frequency Synchronization
The LTC3809 has a phase-locked loop (PLL) comprised of
an internal voltage-controlled oscillator (VCO) and a phase
detector. This allows the turn-on of the external P-channel
MOSFET to be locked to the rising edge of an external clock
signal applied to the SYNC/MODE pin. The phase detector
SYNC/
MODE
EXTERNAL
OSCILLATOR
PLLLPF
DIGITAL
PHASE/
FREQUENCY
DETECTOR
OSCILLATOR
3809 F06
Figure 6. Phase-Locked Loop Block Diagram
3809fc
16
LTC3809
APPLICATIONS INFORMATION
If the external clock frequency is greater than the internal
oscillator’s frequency, fOSC, then current is sourced continuously from the phase detector output, pulling up the
PLLLPF pin. When the external clock frequency is less
than fOSC, current is sunk continuously, pulling down
the PLLLPF pin. If the external and internal frequencies
are the same but exhibit a phase difference, the current
sources turn on for an amount of time corresponding to
the phase difference. The voltage on the PLLLPF pin is
adjusted until the phase and frequency of the internal and
external oscillators are identical. At the stable operating
point, the phase detector output is high impedance and
the filter capacitor CLP holds the voltage.
The loop filter components, CLP and RLP , smooth out
the current pulses from the phase detector and provide a
stable input to the voltage-controlled oscillator. The filter
components CLP and RLP determine how fast the loop
acquires lock. Typically RLP = 10k and CLP is 2200pF to
0.01μF.
Typically, the external clock (on SYNC/MODE pin) input
high level is 1.6V, while the input low level is 1.2V.
Table 1 summarizes the different states in which the
PLLLPF pin can be used.
Table 1. The States of the PLLLPF Pin
PLLLPF PIN
SYNC/MODE PIN
FREQUENCY
0V
DC Voltage (<1.2V or VIN)
300kHz
Floating
DC Voltage (<1.2V or VIN)
550kHz
VIN
DC Voltage (<1.2V or VIN)
750kHz
RC Loop Filter
Clock Signal
Phase-Locked to
External Clock
Filter Caps
DC Voltage (>1.35V and <VIN – 0.5V) Spread Spectrum
460kHz to 635kHz
and/or the VIN/VOUT ratio is close to unity, the synchronous MOSFET may not be on for a sufficient amount of
time to transfer power from the output capacitor to the
auxiliary load. Forced continuous operation will support an auxiliary winding as long as there is a sufficient
synchronous MOSFET duty factor. The SYNC/MODE
input pin removes the requirement that power must be
drawn from the transformer primary side in order to
extract power from the auxiliary winding. With the loop
in continuous mode, the auxiliary output may nominally
be loaded without regard to the primary output load.
The auxiliary output voltage VAUX is normally set, as shown
in Figure 7, by the turns ratio N of the transformer:
VAUX = (N + 1) • VOUT
However, if the controller goes into pulse-skipping operation
and halts switching due to a light primary load current, then
VAUX will droop. An external resistor divider from VAUX to
the SYNC/MODE sets a minimum voltage VAUX(MIN):
⎛ R6 ⎞
VAUX(MIN) = 0.4V • ⎜ 1 + ⎟
⎝ R5 ⎠
If VAUX drops below this value, the SYNC/MODE voltage
forces temporary continuous switching operation until
VAUX is again above its minimum.
VIN
LTC3809
R6
TG
VAUX
+
L1
1:N
1μF
VOUT
SYNC/MODE
R5
SW
BG
+
COUT
3809 F07
Auxiliary Winding Control Using SYNC/MODE Pin
Figure 7. Auxilliary Output Loop Connection
The SYNC/MODE pin can be used as an auxiliary feedback
to provide a means of regulating a flyback winding output.
When this pin drops below its ground-referenced 0.4V
threshold, continuous mode operation is forced.
Spread Spectrum Modulation with SYNC/MODE and
PLLLPF Pins
During continuous mode, current flows continuously in
the transformer primary side. The auxiliary winding draws
current only when the bottom synchronous N-channel
MOSFET is on. When primary load currents are low
Switching regulators, which operate at fixed frequency,
conduct electromagnetic interference (EMI) to their downstream load(s) with high spectral power density at this
fundamental and harmonic frequencies. The peak energy
3809fc
17
LTC3809
APPLICATIONS INFORMATION
can be lowered and distributed to other frequencies and
their harmonics by modulating the PWM frequency. The
LTC3809’s switching noise (at 550kHz) is spread between
460kHz and 635kHz in spread spectrum modulation operation. Figure 8 shows the spectral plots of the output (VOUT)
noise with/without spread spectrum modulation. Note the
significant reduction in peak output noise (>20dBm).
The spread spectrum modulation operation of the LTC3809
is enabled by setting SYNC/MODE pin to a DC voltage
between 1.35V and several hundred mV below VIN by
tying a resistor between SYNC/MODE and VIN.
VOUT Spectrum without Spread Spectrum Modulation
Table 2 summarizes the different states in which the
SYNC/MODE Pin can be used.
Table 2. The States of the SYNC/MODE Pin
SYNC/MODE PIN
CONDITION
GND (0V to 0.35V)
Forced Continuous Mode
Current Reversal Allowed
VFB (0.45V to 1.2V)
Pulse-Skipping Mode
No Current Reversal Allowed
Resistor to VIN
(1.35V to VIN – 0.5V)
Spread Spectrum Modulation
Pulse Skipping at Light Loads
No Current Reversal Allowed
VIN
Burst Mode Operation
No Current Reversal Allowed
Feedback Resistors
Regulate an Auxiliary Winding
External Clock Signal
Enable Phase-Locked Loop
(Synchronize to External Clock)
Pulse Skipping at Light Load
No Current Reversal Allowed
Fault Condition: Short-Circuit and Current Limit
NOISE (dBm)
–10dBm/DIV
START FREQ: 400kHz
RBW: 100Hz
STOP FREQ: 700kHz
3809 F08a
VOUT Spectrum with Spread Spectrum Modulation
(CSSM = 2200pF)
If the LTC3809’s load current exceeds the short-circuit
current limit (ISC), which is set by the short-circuit sense
threshold (ΔVSC) and the on resistance (RDS(ON)) of
bottom N-channel MOSFET, the top P-channel MOSFET
is turned off and will not be turned on at the next clock
cycle unless the load current decreases below ISC. In this
case, the controller’s switching frequency is decreased
and the output is regulated by short-circuit (current limit)
protection.
In a hard short (VOUT = 0V), the top P-channel MOSFET
is turned off and kept off until the short-circuit condition
is cleared. In this case, there is no current path from
input supply (VIN) to either VOUT or GND, which prevents
excessive MOSFET and inductor heating.
NOISE (dBm)
–10dBm/DIV
Low Input Supply Voltage
START FREQ: 400kHz
RBW: 100Hz
STOP FREQ: 700kHz
3809 F08b
Although the LTC3809 can function down to below 2.4V,
the maximum allowable output current is reduced as VIN
decreases below 3V. Figure 9 shows the amount of change
as the supply is reduced down to 2.4V. Also shown is the
effect on VREF .
Figure 8. Spectral Response of Spread Spectrum Modulation
3809fc
18
LTC3809
APPLICATIONS INFORMATION
limiting efficiency and which change would produce the
most improvement. Efficiency can be expressed as:
NORMALIZED VOLTAGE OR CURRENT (%)
105
VREF
100
Efficiency = 100% – (L1 + L2 + L3 + …)
95
MAXIMUM
SENSE VOLTAGE
where L1, L2, etc. are the individual losses as a percentage of input power.
90
85
80
75
2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0
INPUT VOLTAGE (V)
3809 F09
Figure 9. Line Regulation of VREF and Maximum Sense Voltage
Minimum On-Time Considerations
Minimum on-time, tON(MIN) is the smallest amount of time
that the LTC3809 is capable of turning the top P-channel
MOSFET on. It is determined by internal timing delays and
the gate charge required to turn on the top MOSFET. Low
duty cycle and high frequency applications may approach
the minimum on-time limit and care should be taken to
ensure that:
tON(MIN) <
VOUT
fOSC • VIN
If the duty cycle falls below what can be accommodated
by the minimum on-time, the LTC3809 will begin to skip
cycles (unless forced continuous mode is selected). The
output voltage will continue to be regulated, but the ripple
current and ripple voltage will increase. The minimum ontime for the LTC3809 is typically about 210ns. However,
as the peak sense voltage (IL(PEAK) • RDS(ON)) decreases,
the minimum on-time gradually increases up to about
260ns. This is of particular concern in forced continuous applications with low ripple current at light loads. If
forced continuous mode is selected and the duty cycle
falls below the minimum on time requirement, the output
will be regulated by overvoltage protection.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC3809 circuits: 1) LTC3809 DC bias current,
2) MOSFET gate-charge current, 3) I2R losses and
4) transition losses.
1) The VIN (pin) current is the DC supply current, given
in the Electrical Characteristics, which excludes MOSFET
driver currents. VIN current results in a small loss that
increases with VIN.
2) MOSFET gate-charge current results from switching
the gate capacitance of the power MOSFET. Each time a
MOSFET gate is switched from low to high to low again,
a packet of charge dQ moves from VIN to ground. The
resulting dQ/dt is a current out of VIN , which is typically
much larger than the DC supply current. In continuous
mode, IGATECHG = f • QP.
3) I2R losses are calculated from the DC resistances of the
MOSFETs, inductor and/or sense resistor. In continuous
mode, the average output current flows through L but is
“chopped” between the top P-channel MOSFET and the
bottom N-channel MOSFET. The MOSFET RDS(ON) multiplied by duty cycle can be summed with the resistance
of L to obtain I2R losses.
4) Transition losses apply to the external MOSFET and
increase with higher operating frequencies and input
voltages. Transition losses can be estimated from:
Transition Loss = 2 • VIN2 • IO(MAX) • CRSS • f
Other losses, including CIN and COUT ESR dissipative losses
and inductor core losses, generally account for less than
2% total additional loss.
Checking Transient Response
Efficiency Considerations
The efficiency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
3809fc
19
LTC3809
APPLICATIONS INFORMATION
equal to (ΔILOAD) • (ESR), where ESR is the effective series resistance of COUT. ΔILOAD also begins to charge or
discharge COUT generating a feedback error signal used
by the regulator to return VOUT to its steady-state value.
During this recovery time, VOUT can be monitored for
overshoot or ringing that would indicate a stability problem.
OPTI-LOOP compensation allows the transient response
to be optimized over a wide range of output capacitance
and ESR values.
The ITH series RC-CC filter (see Functional Diagram) sets
the dominant pole-zero loop compensation.
The ITH external components showed in the figure on the
first page of this data sheet will provide adequate compensation for most applications. The values can be modified
slightly (from 0.2 to 5 times their suggested values) to
optimize transient response once the final PC layout is done
and the particular output capacitor type and value have
been determined. The output capacitor needs to be decided
upon because the various types and values determine the
loop feedback factor gain and phase. An output current
pulse of 20% to 100% of full load current having a rise
time of 1μs to 10μs will produce output voltage and ITH
pin waveforms that will give a sense of the overall loop
stability. The gain of the loop will be increased by increasing RC and the bandwidth of the loop will be increased
by decreasing CC. The output voltage settling behavior is
related to the stability of the closed-loop system and will
demonstrate the actual overall supply performance. For
a detailed explanation of optimizing the compensation
components, including a review of control loop theory,
refer to Application Note 76.
A second, more severe transient is caused by switching
in loads with large (>1μF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with COUT, causing a rapid drop in VOUT. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25) • (CLOAD).
Thus a 10μF capacitor would be require a 250μs rise time,
limiting the charging current to about 200mA.
Design Example
As a design example, assume VIN will be operating from a
maximum of 4.2V down to a minimum of 2.75V (powered
by a single lithium-ion battery). Load current requirement
is a maximum of 2A, but most of the time it will be in a
standby mode requiring only 2mA. Efficiency at both low
and high load currents is important. Burst Mode operation
at light loads is desired. Output voltage is 1.8V. The IPRG
pin will be left floating, so the maximum current sense
threshold ΔVSENSE(MAX) is approximately 125mV.
MaximumDuty Cycle =
VOUT
= 65.5%
VIN(MIN)
From Figure 1, SF = 82%.
RDS(ON)MAX =
ΔVSENSE(MAX)
5
• 0.9 • SF •
= 0.032Ω
6
IOUT(MAX) • ρT
A 0.032Ω P-channel MOSFET in Si7540DP is close to
this value.
The N-channel MOSFET in Si7540DP has 0.017Ω RDS(ON).
The short circuit current is:
ISC =
90mV
= 5.3A
0.017Ω
So the inductor current rating should be higher than
5.3A.
The PLLLPF pin will be left floating, so the LTC3809 will
operate at its default frequency of 550kHz. For continuous
Burst Mode operation with 600mA IRIPPLE, the required
minimum inductor value is:
LMIN =
1.8 V
1.8 V ⎞
⎛
• ⎜ 1−
⎟ = 1.88μH
550kHz • 600mA ⎝ 2.75V ⎠
A 6A 2.2μH inductor works well for this application.
CIN will require an RMS current rating of at least 1A at
temperature. A COUT with 0.1Ω ESR will cause approximately 60mV output ripple.
3809fc
20
LTC3809
APPLICATIONS INFORMATION
PC Board Layout Checklist
When laying out the printed circuit board, use the following
checklist to ensure proper operation of the LTC3809.
• The power loop (input capacitor, MOSFET, inductor,
output capacitor) should be as small as possible and
isolated as much as possible from LTC3809.
• The current sense traces should be Kelvin connections
right at the P-channel MOSFET source and drain.
• Keeping the switch node (SW) and the gate driver nodes
(TG, BG) away from the small-signal components, especially the feedback resistors, and ITH compensation
components.
• Put the feedback resistors close to the VFB pins. The ITH
compensation components should also be very close
to the LTC3809.
2
SYNC/MODE
1
6
CITH
220pF RITH
15k
10μF
s2
PLLLPF
VIN
IPRG
TG
9
8
LTC3809EDD
4
ITH
SW
BG
187k
3
VFB
RUN
GND
VIN
2.75V TO 8V
MP
Si7540DP
10
7
L
1.5μH
MN
Si7540DP
5
COUT
150μF
VOUT
2.5V
(5A AT 5VIN)
+
11
59k
100pF
3809 F10
L: VISHAY IHLP-2525CZ-01
COUT: SANYO 4TPB150MC
Figure 10. 550kHz, Synchronizable DC/DC Converter with Internal Soft-Start
2
10nF
10k 1
6
470pF
15k
4
100pF
10μF
s2
SYNC/MODE
PLLLPF
VIN
IPRG
TG
LTC3809EDD
ITH
SW
BG
118k
3
59k
VFB
GND
11
100pF
L: VISHAY IHLP-2525CZ-01
D: ON SEMI MBRM120L (OPTIONAL)
RUN
VIN
2.75V TO 8V
9
8
MP
Si7540DP
10
7
5
L
1.5μH
VOUT
1.8V
(5A AT 5VIN)
MN
Si7540DP
COUT
22μF
s2
D
OPT
3809 F11
Figure 11. Synchronizable DC/DC Converter with Ceramic Output Capacitors
3809fc
21
LTC3809
TYPICAL APPLICATIONS
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699)
0.675 p0.05
3.50 p0.05
1.65 p0.05
2.15 p0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 p 0.05
0.50
BSC
2.38 p0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
TYP
6
3.00 p0.10
(4 SIDES)
0.38 p 0.10
10
1.65 p 0.10
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
(DD10) DFN 1103
5
0.200 REF
1
0.25 p 0.05
0.50 BSC
0.75 p0.05
0.00 – 0.05
2.38 p0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3809fc
22
LTC3809
PACKAGE DESCRIPTION
MSE Package
10-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1664 Rev C)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.794 p 0.102
(.110 p .004)
5.23
(.206)
MIN
0.889 p 0.127
(.035 p .005)
1
0.05 REF
10
DETAIL “B”
CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
3.00 p 0.102
(.118 p .004)
(NOTE 3)
10 9 8 7 6
DETAIL “A”
0o – 6o TYP
1 2 3 4 5
GAUGE PLANE
0.53 p 0.152
(.021 p .006)
DETAIL “A”
0.18
(.007)
0.497 p 0.076
(.0196 p .003)
REF
3.00 p 0.102
(.118 p .004)
(NOTE 4)
4.90 p 0.152
(.193 p .006)
0.254
(.010)
0.29
REF
1.83 p 0.102
(.072 p .004)
2.083 p 0.102 3.20 – 3.45
(.082 p .004) (.126 – .136)
0.50
0.305 p 0.038
(.0197)
(.0120 p .0015)
BSC
TYP
RECOMMENDED SOLDER PAD LAYOUT
2.06 p 0.102
(.081 p .004)
SEATING
PLANE
0.86
(.034)
REF
1.10
(.043)
MAX
0.17 – 0.27
(.007 – .011)
TYP
0.50
(.0197)
BSC
0.1016 p 0.0508
(.004 p .002)
MSOP (MSE) 0908 REV C
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
3809fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LTC3809
TYPICAL APPLICATION
Synchronous DC/DC Converter with Spread Spectrum Modulation
300k
2
SYNCH/MODE
9
VIN
3.3V
LTC3809EDD
1000pF
1
2200pF 100pF
6
15k
470pF
VIN
CIN
22μF
4
187k
3
TG
PLLLPF
IPRG
SW
ITH
VFB
BG
GND
59k
RUN
8
MP
Si3447BDV
10
7
5
L
1.5μH
VOUT
2.5V
2A
MN
Si3460DV
11
COUT
22μF
3809 TA04
L: VISHAY IHLP-2525CZ-01
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1628/LTC3728
Dual High Efficiency, 2-Phase Synchronous
Step Down Controllers
Constant Frequency, Standby, 5V and 3.3V LDOs, VIN to 36V,
28-Lead SSOP
LTC1735
High Efficiency Synchronous Step-Down Controller
Burst Mode Operation, 16-Pin Narrow SSOP, Fault Protection,
3.5V ≤ VIN ≤ 36V
LTC1778
No RSENSE, Synchronous Step-Down Controller
Current Mode Operation Without Sense Resistor,
Fast Transient Response, 4V ≤ VIN ≤ 36V
LTC3411
1.25A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter
95% Efficiency, VIN: 2.5V to 5.5V, VOUT ≥ 0.8V, IQ = 60μA,
ISD = <1μA, MS Package
LTC3412
2.5A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter
95% Efficiency, VIN: 2.5V to 5.5V, VOUT ≥ 0.8V, IQ = 60μA,
ISD = <1μA, TSSOP-16E Package
LTC3416
4A, 4MHz, Monolithic Synchronous Step-Down Regulator
Tracking Input to Provide Easy Supply Sequencing,
2.25V ≤ VIN ≤ 5.5V, 20-Lead TSSOP Package
LTC3418
8A, 4MHz, Synchronous Step-Down Regulator
Tracking Input to Provide Easy Supply Sequencing,
2.25V ≤ VIN ≤ 5.5V, QFN Package
LTC3708
2-Phase, No RSENSE, Dual Synchronous Controller with
Output Tracking
Constant On-Time Dual Controller, VIN Up to 36V, Very Low
Duty Cycle Operation, 5mm × 5mm QFN Package
LTC3736/LTC3736-2 2-Phase, No RSENSE, Dual Synchronous Controller with
Output Tracking
2.75V ≤ VIN ≤ 9.8V, 0.6V ≤ VOUT ≤ VIN, 4mm × 4mm QFN
LTC3736-1
Low EMI 2-Phase, Dual Synchronous Controller with
Output Tracking
Integrated Spread Spectrum for 20dB Lower “Noise,”
2.75V ≤ VIN ≤ 9.8V
LTC3737
2-Phase, No RSENSE, Dual DC/DC Controller with Output Tracking
2.75V ≤ VIN ≤ 9.8V, 0.6V ≤ VOUT ≤ VIN , 4mm × 4mm QFN
LTC3772
Micropower No RSENSE Step-Down DC/DC Controller
2.75V ≤ VIN ≤ 9.8V, 3mm × 2mm DFN or 8-Lead SOT-23,
550kHz, IQ = 40μA, Current Mode
LTC3776
Dual, 2-Phase, No RSENSE Synchronous Controller for
DDR/QDR Memory Termination
Provides VDDQ and VTT with One IC, 2.75V ≤ VIN ≤ 9.8V,
Adjustable Constant Frequency with PLL Up to 850kHz,
Spread Spectrum Operation, 4mm × 4mm QFN and
24-Lead SSOP Packages
LTC3808
Low EMI, Synchronous Controller with Output Tracking
2.75V ≤ VIN ≤ 9.8V, 4mm × 3mm DFN, Spread Spectrum for
20dB Lower Peak Noise
LTC3809-1
No RSENSE Synchronous Controller with Output Tracking
2.75V ≤ VIN ≤ 9.8V, 3mm × 3mm DFN and 10-Lead MSOPE
Packages
PolyPhase is a trademark of Linear Technology Corporation.
3809fc
24 Linear Technology Corporation
LT 1108 REV C • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2005
Similar pages