Holtek HT1660 96x32 lcd controller for i/o mcu Datasheet

HT1660
96´32 LCD Controller for I/O MCU
PATENTED
PAT No. : 099352
Technical Document
· Tools Information
· FAQs
· Application Note
Features
· Operating voltage: 2.7V~5.2V
· Six-wire interface (four data wires)
· Built-in 32kHz RC oscillator
· Eight kinds of time base/WDT selection
· External 32.768kHz crystal oscillator or 32kHz fre-
· Time base or WDT overflow output
quency source input
· R/W address auto increment
· Standby current: <1mA at 3V, <2mA at 5V
· Built-in buzzer driver (2kHz/4kHz)
· Internal resistor type: 1/6 bias or 1/5 bias, 1/32 duty,
· Power down command reduces power consumption
or 1/16 duty
· Software configuration feature
· Three selectable LCD frame frequencies: 64Hz,
· Data mode and Command mode instructions
89Hz or 170Hz
· Three data accessing modes
· Max. 96´32 patterns, 96 segments and 32 commons
· Provides VLCD pin to adjust LCD operating voltage
· 112 segments and 16 commons selectable by com-
and max. VLCD voltage up to 7V
mand method
· Provides three kinds of bias current programming
· Built-in bit-map display RAM: 3072 bits (=96´32 bits)
· Control of TN-type and STN-type LCDs
· Built-in internal resistor type bias generator
· 208-pin QFP package
Applications
· Leisure products
· Cellular phone
· Games
· Global positioning system
· Personal digital assistant
· Consumer electronics
General Description
HT1660 is a peripheral device specially designed for I/O
type MCU used to expand the display capability. The
max. display segment of the device are 3072 patterns
(96 segments and 32 commons). It also supports four
data bits interface, buzzer sound, Watchdog Timer or
time base timer functions. The HT1660 is a memory
mapping and multi-function LCD controller. Since the
Rev. 1.70
HT1660 can control TN-type (Twisted Nematic) or
STN-type (Super Twisted Nematic) LCDs. The software
configuration feature of the HT1660 make it suitable for
multiple LCD applications including LCD modules and
display subsystems. Only six lines (CS, WR, DB0~DB3)
are required for the interface between the host controller
and the HT1660.
1
November 9, 2010
PATENTED
HT1660
Block Diagram
O S C O
D is p la y R A M
O S C I
C S
C o n tro l
&
T im in g
C ir c u it
R D
W R
D B 0
C O M 0
C O M 3 1
L C D D r iv e r /
B ia s C ir c u it
S E G 0
D B 3
S E G 9 5
V D D
V L C D
V S S
B Z
W a tc h d o g T im e r
&
T im e B a s e G e n e r a to r
T o n e F re q u e n c y
G e n e ra to r
B Z
N o te : C S : C h ip s
B Z , B Z : T o
W R , R D : W
D B 0 ~ D B 3 :
C O M 0 ~ C O
IR Q : T im e
IR Q
e le c tio n
n e o u tp u ts
R IT E c lo c k , R E A D c lo c k
D a ta b u s
M 3 1 , S E G 0 ~ S E G 9 5 : L C D o u tp u ts
b a s e o r W D T o v e r flo w o u tp u t
Pin Assignment
S E
S E
S E
S E
S E
S E
S E
S E
S E
S E
S E
S E
S E
S E
S E
S E
S E
S E
S E
S E
S E
S E
S E
S E
S E
S E
S E
C O
C O
C O
C O
C O
C O
C O
C O
C O
G 6
G 7
G 7
G 7
G 7
G 7
G 7
G 7
G 7
G 7
G 7
G 8
G 8
G 8
G 8
G 8
G 8
G 8
G 8
G 8
G 8
G 9
G 9
G 9
G 9
G 9
G 9
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
M 3
M 3
M 2
M 2
M 2
M 2
M 2
M 2
M 2
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
9
0
1
2
3
4
5
6
7
8
9
0
1
2
3
4
5
6
7
8
9
0
1
2
3
4
5
1
0
9
8
7
6
5
4
3
C O M
C O M
C O M
C O M
C O M
C O M
C O M
1
2 0
3
208 207 206 205 204 203 202 201 200 199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 159 158 157
2 2
4
1 9
5
1 8
6
1 7
1 6
N C
N C
N C
N C
N C
N C
N C
N C
N C
C S
R D
W R
D B 0
D B 1
D B 2
D B 3
V S S
O S C I
O S C O
V D D
V L C D
IR Q
B Z
B Z
T 1
T 2
T 3
T 4
T 0 0 0
V L C D
N C
N C
N C
N C
N C
N C
N C
N C
C O M 0
C O M 1
C O M 2
C O M 3
C O M 4
C O M 5
C O M 6
1 5 6
1 5 5
1 5 4
1 5 3
1 5 2
1 5 1
1 5 0
1 4 9
1 4 8
1 4 7
1 4 6
1 4 5
1 4 4
1 4 3
1 4 2
1 4 1
1 4 0
1 3 9
1 3 8
1 3 7
1 3 6
1 3 5
1 3 4
1 3 3
1 3 2
1 3 1
1 3 0
1 2 9
1 2 8
1 2 7
1 2 6
1 2 5
1 2 4
1 2 3
1 2 2
1 2 1
1 2 0
1 1 9
1 1 8
1 1 7
1 1 6
1 1 5
1 1 4
1 1 3
1 1 2
1 1 1
1 1 0
1 0 9
1 0 8
1 0 7
1 0 6
1 0 5
2
2 1
7
8
9
1 0
1 1
1 2
1 3
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
2 3
2 4
2 5
H T 1 6 6 0
2 0 8 Q F P -A
2 6
2 7
2 8
2 9
3 0
3 1
3 2
3 3
3 4
3 5
3 6
3 7
3 8
3 9
4 0
4 1
4 2
4 3
4 4
4 5
4 6
4 7
4 8
4 9
5 0
5 1
5 2
53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
N C
N C
N C
N C
N C
N C
N C
N C
N C
N C
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
6 8
6 7
6 6
6 5
6 4
6 3
6 2
6 1
6 0
5 9
5 8
5 7
5 6
5 5
5 4
5 3
5 2
5 1
5 0
4 9
4 8
4 7
4 6
4 5
4 4
4 3
4 2
4 1
4 0
3 9
3 8
3 7
3 6
3 5
3 4
3 3
3 2
3 1
3 0
2 9
2 8
2 7
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
N C
N C
N C
N C
N C
N C
N C
N C
N C
N C
N C
N C
N C
N C
N C
N C
C O M
C O M
C O M
C O M
C O M
C O M
C O M
C O M
C O M
2 6
2 5
2 4
2 3
2 2
2 1
2 0
1 9
1 8
1 7
1 6
1 5
1 4
1 3
1 2
1 1
8
7
1 0
9
6
5
4
3
2
2
1
0
1 5
1 4
1 3
1 2
1 1
1 0
9
8
7
Rev. 1.70
November 9, 2010
PATENTED
HT1660
Pad Assignment
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
4
6 8
6
6 7
5
6 9
7
7 4
7 5
7 6
7 7
7 8
7 9
8 0
8 1
8 2
8 3
8 4
8 5
8 6
8 7
8 8
8 9
9 0
9 1
9 2
9 3
9 4
9 5
3 1
3 0
2 9
2 8
2 7
2 6
2 5
2 4
2 3
2 2
2 1
2 0
1 9
7 4
7 3
C O M 2
1 1 4
1 1 3
1 1 2
1 1 1
8
1 1 0
9
1 0 9
1 0
1 0 8
1 1
1 0 7
1 2
1 0 6
1 3
1 0 5
1 4
1 0 4
1 5
1 0 3
1 6
1 0 2
1 7
1 0 1
1 8
1 0 0
1 9
9 9
2 0
2 1
9 8
(0 ,0 )
2 2
9 7
9 6
2 3
9 5
2 4
9 4
2 5
9 3
2 6
9 2
2 7
9 1
2 8
9 0
2 9
8 9
3 0
8 8
3 1
8 7
3 2
8 6
3 3
8 5
3 4
8 4
3 5
8 3
3 6
8 2
3 7
8 1
3 8
8 0
3 9
7 9
4 0
7 8
4 1
7 7
4 2
7 6
4 3
7 5
4 4
4 5
4 6
5 0 5 1 5 2 5 3 5 4
5 5 5 6 5 7 5 8 5 9
4 7 4 8 4 9
6 1
6 0
6 2 6 3 6 4 6 5
6 6
6 7
6 8
6 9
7 0
7 1 7 2
S E G 3 0
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S G E
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
C O M
C O M
C O M
C O M
C O M
C O M
C O M
C O M
C O M
C O M
C O M
C O M
C O M
1 1 5
7 0
7 3
1 2 6 1 2 5 1 2 4 1 2 3 1 2 2 1 2 1 1 2 0 1 1 9 1 1 8
1 1 6
3
7 2
1 4 1 1 4 0 1 3 9 1 3 8 1 3 7 1 3 6 1 3 5 1 3 4 1 3 3 1 3 2 1 3 1 1 3 0 1 2 9 1 2 8 1 2 7
1 1 7
6 5
7 1
3 1
3 2
3 3
3 4
3 5
3 6
3 7
3 8
3 9
4 0
4 1
4 2
4 3
4 4
4 5
4 6
4 7
4 8
4 9
5 0
5 1
6 6
5 2
2
5 3
6 4
1 4 3 1 4 2
5 4
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
S E G
C O M
C O M
C O M
C O M
C O M
C O M
C O M
C O M
C O M
C O M
C O M
C O M
C O M
5 5
1
5 6
5 7
5 8
5 9
6 0
6 1
6 2
1 4 9 1 4 8 1 4 7 1 4 6 1 4 5 1 4 4
S E G 6 3
2 9
2 8
2 7
2 6
2 5
2 4
2 3
2 2
2 1
2 0
1 9
1 8
1 7
1 6
1 5
1 4
1 3
1 2
1 1
1 0
9
8
7
6
5
4
3
2
1
0
1 5
1 4
1 3
1 2
1 1
1 0
9
8
7
6
5
4
3
C O M 1
C O M 0
V L C D
T 0 0 0
T 4
T 3
T 2
T 1
B Z
B Z
IR Q
V L C D
V D D
O S C O
O S C I
V S S
D D 3
D D 2
D D 1
D D 0
W R
R D
C S
C O M 1 6
C O M 1 7
C O M 1 8
Chip size: 3555´5000 (mm)2
* The IC substrate should be connected to VSS in the PCB layout artwork.
Rev. 1.70
3
November 9, 2010
PATENTED
HT1660
Pad Coordinates
Unit: mm
Pad No.
X
Y
Pad No.
X
Y
Pad No.
X
Y
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1672.500
-1208.250
-1113.250
-1018.250
-895.500
2305.000
1901.700
1806.700
1711.700
1616.700
1521.700
1426.700
1331.700
1236.700
1141.700
1046.700
951.700
856.700
761.700
666.700
571.700
476.700
381.700
286.700
191.700
96.700
1.700
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
-789.900
-694.900
-589.300
-494.300
-388.700
-293.700
-190.500
-95.000
5.300
111.400
185.650
308.850
414.450
509.450
630.250
743.850
857.450
971.050
1084.650
1201.050
1323.050
1419.550
1666.450
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
-2299.900
-2299.900
-2299.900
-2299.900
-2299.900
-2299.900
-2299.900
-2299.900
-2299.900
-2368.850
-2268.850
-2309.400
-2309.400
-2309.400
-2285.250
-2285.250
-2285.250
-2285.250
-2285.250
-2368.850
-2395.000
-2395.000
-2395.000
-2159.100
-2064.100
-1969.100
-1874.100
-1779.100
-1684.100
-1589.100
-1494.100
-1399.100
-1304.100
-1209.100
-1114.100
-1019.100
-924.100
-829.100
-734.100
-639.100
-544.100
-449.100
-354.100
-259.100
-164.100
-69.100
25.900
120.900
215.900
310.900
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1672.500
1484.800
1389.800
1294.800
1199.800
1104.800
1009.800
914.800
819.800
724.800
629.800
534.800
439.800
344.800
249.800
154.800
59.800
405.900
500.900
595.900
690.900
785.900
880.900
975.900
1070.900
1165.900
1260.900
1355.900
1450.900
1545.900
1640.900
1735.900
1830.900
2305.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
2395.000
Rev. 1.70
-93.300
-188.300
-283.300
-378.300
-473.300
-568.300
-663.300
-758.300
-853.300
-948.300
-1043.300
-1138.300
-1233.300
-1328.300
-1423.300
-1518.300
-1613.300
-1708.300
-1803.300
-1898.300
-1993.300
-2088.300
-2183.300
-2278.300
-2395.000
-2395.000
-2395.000
-2299.900
4
-35.200
-130.200
-225.200
-320.200
-415.200
-510.200
-605.200
-700.200
-795.200
-890.200
-985.200
-1080.200
-1175.200
-1270.200
-1365.200
-1460.200
November 9, 2010
PATENTED
HT1660
Pad Description
Pad No.
Pad Name
I/O
Description
1~33
87~149
SEG63~SEG95
SEG0~SEG62
O
LCD segment outputs
34~49
71~86
COM31~COM16
COM0~COM15
O
LCD common outputs, under 112´16 command mode, COM16~COM31 will
share to SEG96~SEG111. COM31/SEG96, COM30/SEG97, COM29/
SEG98....., COM18/SEG109, COM17/SEG110, COM16/SEG111
I
Chip selection input with pull-high resistor. When the CS is logic high, the
data and command read from or write to the HT1660 are disabled. The serial
interface circuit is also reset. But if the CS is at a logic low level and is input to
the CS pad, the data and command transmission between the host controller
and the HT1660 are all enabled.
50
CS
51
RD
I
READ clock input with pull-high resistor. Data in the RAM of the HT1660 are
clocked out on the falling edge of the RD signal. The clocked out data will appear on the data line. The host controller can use the next rising edge to latch
the clocked out data.
52
WR
I
WRITE clock input with pull-high resistor. Data on the DATA line are latched
into the HT1660 on the rising edge of the WR signal.
53~56
DB0~DB3
I/O
Parallel data input/output with a pull-high resistor
57
VSS
¾
Negative power supply for logic circuit, ground
58
59
OSCI
OSCO
I
O
The OSCI and OSCO pads are connected to a 32.768kHz crystal in order to
generate a system clock. If the system clock comes from an external clock
source, the external clock source should be connected to the OSCI pad. But
if an on-chip RC oscillator is selected, the OSCI and OSCO pads can be left
open.
60
VDD
¾
Positive power supply for logic circuit
61
VLCD
I
Power supply for LCD driver circuit
62
IRQ
O
Time base or Watchdog Timer overflow flag, NMOS open drain output.
63, 64
BZ, BZ
O
2kHz or 4kHz frequency output pair (tristate output buffer)
65~69
T1~T4, T000
I
Vary bias current pin
It is usually not connected
Absolute Maximum Ratings
Supply Voltage ...........................VSS-0.3V to VSS+5.5V
Storage Temperature ............................-50°C to 125°C
Input Voltage.............................VSS-0.3V to VDD+0.3V
Operating Temperature...........................-25°C to 75°C
Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed
in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.
Rev. 1.70
5
November 9, 2010
PATENTED
HT1660
D.C. Characteristics
Symbol
VDD
IDD1
IDD2
IDD11
IDD22
ISTB
VIL
VIH
IOL1
IOH1
IOL2
IOH2
IOL3
IOH3
IOL4
IOH4
RPH
Rev. 1.70
Parameter
Operating Voltage
Operating Current
Operating Current
Operating Current
Operating Current
Standby Current
Input Low Voltage
Input High Voltage
BZ, BZ, IRQ Sink Current
BZ, BZ Source Current
DB0~DB3 Sink Current
DB0~DB3 Source Current
LCD Common Sink Current
LCD Common Source Current
LCD Segment Sink Current
LCD Segment Source Current
Pull-high Resistor
Ta=25°C
Test Conditions
VDD
Conditions
¾
¾
3V
5V
3V
5V
3V
5V
3V
5V
3V
5V
3V
5V
3V
5V
Min.
Typ.
Max.
Unit
2.7
¾
5.2
V
No load/LCD ON
On-chip RC oscillator
¾
150
250
mA
¾
250
370
mA
No load/LCD ON
Crystal oscillator
¾
135
200
mA
¾
200
300
mA
No load/LCD OFF
On-chip RC oscillator
¾
15
30
mA
¾
50
70
mA
No load/LCD OFF
Crystal oscillator
¾
2
10
mA
¾
3
10
mA
¾
¾
1
mA
¾
¾
2
mA
0
¾
0.6
V
0
¾
1.0
V
2.4
¾
3
V
No load, Power down mode
DB0~DB3, WR, CS, RD
DB0~DB3, WR, CS, RD
4.0
¾
5
V
1.2
2.5
¾
mA
3
6
¾
mA
-0.9
-1.8
¾
mA
3V
VOL=0.3V
5V
VOL=0.5V
3V
VOH=2.7V
5V
VOH=4.5V
-2
-4
¾
mA
3V
VOL=0.3V
1.2
2.5
¾
mA
5V
VOL=0.5V
3
6
¾
mA
3V
VOH=2.7V
-0.9
-1.8
¾
mA
5V
VOH=4.5V
-2
-4
¾
mA
3V
VOL=0.3V
80
160
¾
mA
5V
VOL=0.5V
180
360
¾
mA
3V
VOH=2.7V
-40
-80
¾
mA
5V
VOH=4.5V
-90
-180
¾
mA
3V
VOL=0.3V
50
100
¾
mA
5V
VOL=0.5V
120
240
¾
mA
3V
VOH=2.7V
-30
-60
¾
mA
5V
VOH=4.5V
-70
-140
¾
mA
150
250
410
kW
60
125
210
kW
3V
5V
DB0~DB3, WR, CS, RD
6
November 9, 2010
PATENTED
HT1660
A.C. Characteristics
Symbol
Parameter
Ta=25°C
Test Conditions
VDD
Conditions
Min.
Typ.
Max.
Unit
fSYS1
System Clock
5V
On-chip RC oscillator
24
32
40
kHz
fSYS2
System Clock
¾
Crystal oscillator
¾
32768
¾
Hz
fSYS3
System Clock
¾
External clock source
¾
32768
¾
Hz
fLCD1
LCD Frame Frequency
5V
On-chip RC oscillator 61/117
fLCD2
LCD Frame Frequency
¾
Crystal oscillator
¾
fLCD3
External clock source
n: Number of COM
LCD Frame Frequency
¾
tCOM
LCD Common Period
¾
fCLK1
4-Bit Data Clock (WR Pin)
¾
Hz
¾
64
¾
Hz
¾
n/fLCD
¾
sec
¾
¾
150
kHz
¾
¾
300
kHz
¾
¾
75
kHz
¾
¾
150
kHz
CS
150
250
¾
ns
Write mode
3.34
Read mode
6.67
¾
¾
ms
Write mode
1.67
Read mode
3.34
¾
¾
ms
Duty cycle 50%
5V
3V
4-Bit Data Clock (RD Pin)
Duty cycle 50%
5V
tCS
4-Bit Interface Reset Pulse Width
(Figure 3)
¾
3V
tCLK
WR, RD Input Pulse Width (Figure 1)
5V
tr, tf
Rise/Fall Time Serial Data Clock
Width (Figure 1)
tsu
Setup Time for DB to WR, RD Clock
Width (Figure 2)
th
Hold Time for DB to WR, RD Clock
Width (Figure 2)
tsu1
Setup Time for CS to WR, RD Clock
Width (Figure 3)
th1
Setup Time for CS to WR, RD Clock
Width (Figure 3)
ftone2k
Tone Frequency
ftone4k
Tone Frequency
Rev. 1.70
Hz
64
3V
fCLK2
89/170 111/213
¾
¾
¾
120
160
ns
¾
80
120
¾
ns
¾
60
120
¾
ns
¾
50
100
¾
ns
¾
50
100
¾
ns
5V
On-chip RC oscillator
1.5
2
2.5
kHz
5V
On-chip RC oscillator
3
4
5
kHz
¾
¾
¾
¾
¾
¾
¾
¾
¾
7
November 9, 2010
PATENTED
HT1660
V a lid D a ta
tf
W R , R D
C lo c k
9 0 %
5 0 %
1 0 %
D B
tr
tC
V
tC
L K
ts
D D
G N D
W R , R D
C lo c k
L K
tC
5 0 %
ts
W R , R D
C lo c k
th
u 1
1
S
F ir s t
C lo c k
L a s t
C lo c k
5 0 %
G N D
V
D D
G N D
V
5 0 %
th
u
D D
G N D
Figure 2
Figure 1
C S
V
5 0 %
D D
G N D
Figure 3
Functional Description
The LCD OFF command is used to turn the LCD bias
generator off. After the LCD bias generator switches off
by issuing the LCD OFF command, using the SYS DIS
command reduces power consumption, thus serving as
a system power down command. But if the external
clock source is chosen as the system clock, using the
SYS DIS command can neither turn the oscillator off nor
carry out the power down mode. The crystal oscillator
option can be applied to connect an external frequency
source of 32kHz to the OSCI pin. In this case, the system fails to enter the power down mode, similar to the
case in the external 32kHz clock source operation. At
the initial system power on, the HT1660 is at the SYS
DIS state.
System Oscillator
The HT1660 system clock is used to generate the time
base/Watchdog Timer (WDT) clock frequency, LCD
driving clock, and tone frequency. The clock source
may be from an on-chip RC oscillator (32kHz), a crystal
oscillator (32.768kHz), or an external 32kHz clock by
the S/W setting. The configuration of the system oscillator is as shown. After the SYS DIS command is executed, the system clock will stop and the LCD bias
generator will turn off. That command is available only
for the on-chip RC oscillator or for the crystal oscillator.
Once the system clock stops, the LCD display will become blank, and the time base/WDT loses its function
as well.
O S C I
O S C O
C r y s ta l O s c illa to r
3 2 7 6 8 H z
E x te r n a l C lo c k S o u r c e
3 2 k H z
S y s te m
C lo c k
O n - c h ip R C O s c illa to r
3 2 k H z
System Oscillator Configuration
Rev. 1.70
8
November 9, 2010
PATENTED
HT1660
Display Memory - RAM Structure
The static display RAM is organized into 768´4 bits and stores the display data. The contents of the RAM are directly
mapped to the contents of the LCD driver. Data in the RAM can be accessed by the READ, WRITE and
READ-MODIFY-WRITE commands. The following is a mapping from the RAM to the LCD patterns.
00H
08H
10H
2E8H
2F0H
2F8H
COM0
Bit0
Bit0
Bit0
Bit0
Bit0
Bit0
COM1
Bit1
Bit1
Bit1
Bit1
Bit1
Bit1
COM2
Bit2
Bit2
Bit2
Bit2
Bit2
Bit2
COM3
Bit3
Bit3
Bit3
01H
09H
11H
COM4
Bit0
Bit0
COM5
Bit1
COM6
Bit2
COM7
2E0H
Bit3
Bit3
Bit3
2F1H
2F9H
Bit0
Bit0
Bit0
Bit0
Bit1
Bit1
Bit1
Bit1
Bit1
Bit2
Bit2
Bit2
Bit2
Bit2
Bit3
Bit3
Bit3
0AH
12H
COM8
Bit0
Bit0
COM9
Bit1
COM10
Bit2
19H
21H - - - - - - - - - 2D9H
2E1H
Bit3
Bit3
Bit3
2EAH
2F2H
2FAH
Bit0
Bit0
Bit0
Bit0
Bit1
Bit1
Bit1
Bit1
Bit1
Bit2
Bit2
Bit2
Bit2
Bit2
Bit3
Bit3
Bit03
03H
0BH
13H
COM12
Bit0
Bit0
COM13
Bit1
Bit1
COM14
Bit2
Bit2
COM15
20H - - - - - - - - - 2D8H
2E9H
02H
COM11
18H
1AH
22H- - - - - - - - - 2DAH
2E2H
Bit3
Bit3
Bit3
2EBH
2F3H
2FBH
Bit0
Bit0
Bit0
Bit0
Bit1
Bit1
Bit1
Bit1
Bit2
Bit2
Bit2
Bit2
Bit3
Bit3
Bit3
04H
0CH
14H
COM16
Bit0
Bit0
COM17
Bit1
Bit1
COM18
Bit2
COM19
Bit3
1BH
23H- - - - - - - - - 2DBH
2E3H
Bit3
Bit3
Bit3
2ECH
2F4H
2FCH
Bit0
Bit0
Bit0
Bit0
Bit1
Bit1
Bit1
Bit1
Bit2
Bit2
Bit2
Bit2
Bit2
Bit3
Bit3
Bit3
Bit3
Bit3
05H
0DH
15H
2EDH
2F5H
2FDH
COM20
Bit0
Bit0
Bit0
Bit0
Bit0
Bit0
COM21
Bit1
Bit1
Bit1
Bit1
Bit1
Bit1
COM22
Bit2
Bit2
Bit2
Bit2
Bit2
Bit2
COM23
Bit3
Bit3
Bit3
Bit3
Bit3
Bit3
06H
0EH
16H
2EEH
2F6H
2FEH
COM24
Bit0
Bit0
Bit0
Bit0
Bit0
Bit0
COM25
Bit1
Bit1
Bit1
Bit1
Bit1
Bit1
COM26
Bit2
Bit2
Bit2
Bit2
Bit2
Bit2
COM27
Bit3
Bit3
Bit3
Bit3
Bit3
Bit3
1CH
1DH
1EH
1FH
24H- - - - - - - - - 2DCH
25H- - - - - - - - - 2DDH
26H- - - - - - - - - 2DEH
2E4H
2E5H
2E6H
07H
0FH
17H
2EFH
2F7H
2FFH
COM28
Bit0
Bit0
Bit0
Bit0
Bit0
Bit0
COM29
Bit1
Bit1
Bit1
Bit1
Bit1
Bit1
COM30
Bit2
Bit2
Bit2
Bit2
Bit2
Bit2
COM31
Bit3
Bit3
Bit3
Bit3
Bit3
Bit3
SEG0
SEG1
SEG2
SEG93
SEG94
SEG95
27H - - - - - - - - - 2DFH
SEG3
2E7H
SEG92
96´32 Selection Mode RAM Mapping Table
Rev. 1.70
9
November 9, 2010
PATENTED
00H
04H
08H
COM0
Bit0
Bit0
COM1
Bit1
Bit1
COM2
Bit2
COM3
0CH
HT1660
1B4H
1B8H
1BCH
Bit0
Bit0
Bit0
Bit0
Bit1
Bit1
Bit1
Bit1
Bit2
Bit2
Bit2
Bit2
Bit2
Bit3
Bit3
Bit3
Bit3
Bit3
Bit3
01H
05H
09H
1B5H
1B9H
1BDH
COM4
Bit0
Bit0
Bit0
Bit0
Bit0
Bit0
COM5
Bit1
Bit1
Bit1
Bit1
Bit1
Bit1
COM6
Bit2
Bit2
Bit2
Bit2
Bit2
Bit2
COM7
Bit3
Bit3
Bit3
Bit3
Bit3
Bit3
02H
06H
0AH
1B6H
1BAH
1BEH
COM8
Bit0
Bit0
Bit0
Bit0
Bit0
Bit0
COM9
Bit1
Bit1
Bit1
Bit1
Bit1
Bit1
COM10
Bit2
Bit2
Bit2
Bit2
Bit2
Bit2
COM11
Bit3
Bit3
Bit3s
Bit3
Bit3
Bit3
03H
07H
0BH
1B7H
1BBH
1BFH
COM12
Bit0
Bit0
Bit0
Bit0
Bit0
Bit0
COM13
Bit1
Bit1
Bit1
Bit1
Bit1
Bit1
COM14
Bit2
Bit2
Bit2
Bit2
Bit2
Bit2
COM15
Bit3
Bit3
Bit3
Bit3
Bit3
Bit3
SEG0
SEG1
SEG2
0DH
0EH
0FH
10H- - - - - - - - - 1ACH
11H- - - - - - - - - 1ADH
12H- - - - - - - - - 1AEH
13H - - - - - - - - - 1AFH
SEG3
1B0H
1B1H
1B2H
1B3H
SEG108 SEG109 SEG110 SEG111
112´16 Selection Mode RAM Mapping Table
Name
112´16 Mode
Command Code
X100-0001-1111-XXXX
Function
Change segment from 96 to 112 and common from 32 to 16
The default value after power ON reset is 96´32 mode, set ²Normal² command will change 112´16 mode to 96´32
mode.
Frame Frequency
HT1660 provides three kinds of frame frequency option by command code; 64Hz, 89Hz and 170Hz respectively. FRAME
64Hz provides 64Hz frame frequency. FRAME 89Hz provides 89Hz frame frequency. FRAME 170Hz provides 170Hz
frame frequency.
Name
Command Code
Function
FRAME 170Hz
X100-0001-1000-XXXX
Select 170Hz frame frequency
FRAME 89Hz
X100-0001-1101-XXXX
Select 89Hz frame frequency
FRAME 64Hz
X100-0001-1110-XXXX
Select 64Hz frame frequency
Frame Frequency Selection Command Code
Time Base and Watchdog Timer - WDT
The time base generator and WDT share the same counter which is divided by 256. The IRQ clock can be programmed as
1Hz, 2Hz, ...., 128Hz output. TIMER DIS/EN/CLR, WDT DIS/EN/CLR and IRQ EN/DIS are independent from each other.
Once the WDT time-out occurs, the IRQ pin will remain at a logic low level until the CLR WDT or the IRQ DIS command
is issued.
If an external clock is selected as the system frequency source, the SYS DIS command turns out invalid and the power
down mode fails to be carried out until the external clock source is removed.
Rev. 1.70
10
November 9, 2010
PATENTED
HT1660
command, a system frequency selection command, an
LCD configuration command, a tone frequency selection command, a bias current selection command, a
timer/WDT setting command, and an operating command. The data mode, on the other hand, includes
READ, WRITE, and READ-MODIFY-WRITE operations.
Buzzer Tone Output
A simple tone generator is implemented in the HT1660.
The tone generator can output a pair of differential driving signals on the BZ and BZ which are used to generate
a single tone.
By executing the TONE 4K and TONE 2K commands
there are two tone frequency outputs selectable that can
turn on the tone output. The TONE 4K and TONE 2K
commands set the tone frequency to 4kHz and 2kHz, respectively. The tone output can be turned off by invoking
the TONE OFF command. The tone outputs, namely BZ
and BZ, are a pair of differential driving outputs used to
drive a piezo buzzer. Once the system is disabled or the
tone output is inhibited, the BZ and the BZ outputs will
remain at low level.
The following are the data mode ID and the command
mode ID:
Operation
Mode
ID
READ
Data
110
WRITE
Data
101
READ-MODIFY-WRITE
Data
101
Command
100
COMMAND
Command Format
If successive commands have been issued, the command mode ID can be omitted. While the system is operating in the non-successive command or the
non-successive address data mode, the CS pin should
be set to ²1² and the previous operation mode will also
be reset. The CS pin returns to ²0², so a new operation
mode ID should be issued first.
The HT1660 can be configured by software setting.
There are two mode commands to configure the
HT1660 resource and to transfer the LCD display data.
The configuration mode of the HT1660 is called command mode, and its command mode ID is 100. The
command mode consists of a system configuration
T im e B a s e
C lo c k S o u r c e
V
C L R
IR Q
T IM E R E N /D IS
¸ 2 5 6
T im e r
W D T
¸ 4
W D T E N /D IS
D D
Q
D
C K
IR Q
E N /D IS
R
C L R W D T
Time Base and WDT Configurations
Name
Command Code
Function
TONE OFF
X100-0000-1000-XXXX
Turn-off tone output
TONE 4K
X100-0001-0000-XXXX
Turn-on tone output, tone frequency is 4kHz
TONE 2K
X100-0001-0001-XXXX
Turn-on tone output, tone frequency is 2kHz
Buzzer Tone Output Command Code
The following are the data mode ID and the command ID:
Mode
ID
READ
Operation
Data
110
WRITE
Data
101
READ-MODIFY-WRITE
Data
101
Command
100
COMMAND
If successive commands have been issued, the command mode ID can be omitted. While the system is operating in the
non-successive address data mode, the CS pin should be set 1 and the previous operation mode will also be reset. The
CS pin returns to 0, so a new operation mode ID should be issued first.
Rev. 1.70
11
November 9, 2010
PATENTED
Bias Generator
data and command issued between the host controller
and the HT1660 are first disabled and then initialized.
Before issuing a mode command or mode switching, a
high level pulse is required to initialize the serial interface of the HT1660. The DB0~DB3 are the 4-bit parallel
data input/output lines. Data to be read or written or
commands to be written have to pass through the
DB0~DB3 lines. The RD line is the READ clock input.
Data in the RAM are clocked out on the falling edge of the
RD signal, and the clocked out data will then appear on
the DB0~DB3 lines. It is recommended that the host
controller read correct data during the interval between
the rising edge and the next falling edge of the RD signal.
The WR line is the WRITE clock input. The data, address, and command on the DB0~DB3 lines are all
clocked into the HT1660 on the rising edge of the WR
signal. There is an optional IRQ line to be used as an interface between the host controller and the HT1660.
The IRQ pin can be selected as a timer output or a WDT
overflow flag output by the S/W setting. The host controller can perform the time base or the WDT function by
connecting with the IRQ pin of the HT1660.
The HT1660 bias voltage belongs to internal resistor
type. It provides two kinds of bias option named 1/6 bias
and 1/5 bias respectively. It also provides three kinds of
bias current option by programming to suitably drive an
LCD panel. The three kinds of bias current are large,
middle, and small, respectively. Usually, large panel
LCD can be excellently displayed by large bias current.
Relatively, it consumes large current when LCD ON
command is used. Small bias current provides low
power consumption during on condition when the LCD
is normally displayed. The following are the reference
value table.
When the bias current for LCD is more than Large Bias
Current setting. It is recommended to add external circuit to increase driving current.
Interfacing
Only six lines are required to interface with the HT1660.
The CS line is used to initialize the serial interface circuit
and to terminate the communication between the host
controller and the HT1660. If the CS pin is set to 1, the
Bias
HT1660
VLCD
Large Bias Current
Middle Bias Current
Small Bias Current
3V
165mA
70mA
30mA
5V
270mA
110mA
50mA
3V
140mA
55mA
25mA
5V
225mA
90mA
40mA
1/5
1/6
P o w e r
P o w e r
V R
V L C D
V R
V L C D
R
R
(T 1 ) V 1
(T 1 ) V 1
R
R
(T 2 ) V 2
(T 2 ) V 2
R
R
V 3
V 3
R
V
V 4
R
L C D
V
V 4
R
L C D
R
(T 3 ) V 5
(T 3 ) V 5
R
R
(T 4 ) V 6
(T 4 ) V 6
R
R
V S S
1 /5 B ia s
V S S
1 /6 B ia s
Internal Resistor Type Bias Generator Configurations
Note:
The voltage applied to VLCD pin must be equal to or lower than 7V.
Adjust VR to fit LCD display.
Rev. 1.70
12
November 9, 2010
PATENTED
V
V
HT1660
V
L C D
V
L C D
L C D
L C D
R
R
T 1
T 1
C
R
T 2
B ia s
B lo c k
C
R
T 3
T 0 0 0
R
B ia s
B lo c k
C
R
T 0 0 0
1 /5 B ia s
C
R
T 4
C
C
2 R
T 3
C
R
T 4
C
R
T 2
1 /6 B ia s
Increase Driver Current Configurations
Note:
The external resistors are used to increment the driving current.
And the external capacitors are used to keep the bias voltage stable.
Timing Diagrams
READ Mode (Command ID Code: 1 1 0)
C S
W R
R D
D B 3
X
A 7
A 3
D 3
X
X
X
A 7
A 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
1
X
A 6
A 2
D 2
1
X
A 6
A 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D B 1
1
A 9
A 5
A 1
D 1
1
A 9
A 5
A 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D B 0
0
A 8
A 4
A 0
D 0
0
A 8
A 4
A 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
C o m m a n d ID
A d d re s s (M A )
A d d re s s (M A )
M e m o ry
D a ta (M A )
C o m m a n d ID c o d e
A d d re s s (M A )
A d d re s s (M A )
M e m o ry
D a ta (M A )
D a ta (M A + 1 )
D a ta (M A + 2 )
D a ta (M A + 3 )
D a ta (M A + 4 )
D a ta (M A + 5 )
D a ta (M A + 6 )
D a ta (M A + 7 )
D a ta (M A + 8 )
D a ta (M A + 9 )
D a ta (M A + 1 0 )
D a ta (M A + 1 1 )
D a ta (M A + 1 2 )
D a ta (M A + 1 3 )
D a ta (M A + 1 4 )
D a ta (M A + 1 5 )
c o d e
D B 2
( S u c c e s s iv e a d d r e s s r e a d in g )
( S in g le a d d r e s s r e a d in g )
Rev. 1.70
13
November 9, 2010
PATENTED
HT1660
WRITE Mode (Command ID Code: 1 0 1)
C S
W R
R D
X
A 7
A 3
D 3
X
D B 3
X
X
A 7
A 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
1
X
A 6
A 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D B 1
0
A 9
A 5
A 1
D 1
0
A 9
A 5
A 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D B 0
1
A 8
A 4
A 0
D 0
1
A 8
A 4
A 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
C o m m a n d ID
A d d re s s (M A )
A d d re s s (M A )
M e m o ry
D a ta (M A )
C o m m a n d ID
A d d re s s (M A )
A d d re s s (M A )
M e m o ry
D a ta (M A )
D a ta (M A + 1 )
D a ta (M A + 2 )
D a ta (M A + 3 )
D a ta (M A + 4 )
D a ta (M A + 5 )
D a ta (M A + 6 )
D a ta (M A + 7 )
D a ta (M A + 8 )
D a ta (M A + 9 )
A 7
A 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
D 3
c o d e
c o d e
D a ta (M A + 1 5 )
D 2
D a ta (M A + 1 4 )
A 2
D a ta (M A + 1 3 )
A 6
D a ta (M A + 1 2 )
X
D a ta (M A + 1 1 )
1
D a ta (M A + 1 0 )
D B 2
( S u c c e s s iv e a d d r e s s r e a d in g )
( S in g le a d d r e s s r e a d in g )
READ-MODIFY-WRITE Mode (Command ID Code: 1 0 1)
C S
W R
R D
D B 3
X
A 7
A 3
D 3
D 3
X
X
X
D B 2
1
X
A 6
A 2
D 2
D 2
1
X
A 6
A 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D 2
D B 1
0
A 9
A 5
A 1
D 1
D 1
0
A 9
A 5
A 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D 1
D B 0
1
A 8
A 4
A 0
D 0
D 0
1
A 8
A 4
A 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
D 0
C o m m a n d ID
A d d re s s (M A )
A d d re s s (M A )
M e m o ry
D a ta (M A )
C o m m a n d ID
A d d re s s (M A )
A d d re s s (M A )
M e m o ry
D a ta (M A )
D a ta (M A )
D a ta (M A + 1 )
D a ta (M A + 1 )
D a ta (M A + 2 )
D a ta (M A + 2 )
D a ta (M A + 3 )
D a ta (M A + 3 )
D a ta (M A + 4 )
D a ta (M A + 4 )
D a ta (M A + 5 )
D a ta (M A + 5 )
D a ta (M A + 6 )
D a ta (M A + 6 )
D a ta (M A + 7 )
D a ta (M A + 7 )
c o d e
c o d e
( S u c c e s s iv e a d d r e s s r e a d in g )
( S in g le a d d r e s s r e a d in g )
Rev. 1.70
14
November 9, 2010
PATENTED
HT1660
Command Mode (Command ID Code: 1 0 0)
C S
W R
R D
X
D B 3
C 7
1
D B 2
0
D B 1
0
D B 0
X
C 3
C 6
C 2
C 5
C 1
C 4
C 0
X
X
X
1
X
0
X
X
X
0
X
C 7
C 3
X
X
C 7
C 3
X
X
C 7
C 3
X
X
C 7
C 3
X
X
C 7
C 3
C 6
C 2
X
X
C 6
C 2
X
X
C 6
C 2
X
X
C 6
C 2
X
X
C 6
C 2
C 5
C 1
X
X
C 5
C 1
X
X
C 5
C 1
X
X
C 5
C 1
X
X
C 5
C 1
C 4
C 0
X
X
C 4
C 0
X
X
C 4
C 0
X
X
C 4
C 0
X
X
C 4
C 0
C o m m a n d 5
C o m m a n d 4
C o m m a n d 3
C o m m a n d 2
C o m m a n d 1
C o m m a n d ID
C o m m a n d
C o m m a n d ID
c o d e
c o d e
( S in g le c o m m a n d )
( S u c c e s s iv e c o m m a n d )
Note: ²X² stands for don¢t care
Application Circuits
Host Controller With an HT1660 Display System
M a x .
7 V
C S
*
R D
*V R
W R
D B 0 ~ D B 3
M C U
*R
V L C D
H T 1 6 6 0
B Z
P ie z o
IR Q
B Z
O S C I
C lo c k O u t
O S C O
C O M 0 ~ C O M 3 1
S E G 0 ~ S E G 9 5
E x te r n a l C lo c k 1 ( 3 2 k H z )
* 1 /6 B ia s o r 1 /5 B ia s ,
1 /3 2 D u ty o r 1 /1 6 D u ty
E x te r n a l C lo c k 2 ( 3 2 k H z )
O n - c h ip O S C
* L C D
P a n e l
C ry s ta l
3 2 7 6 8 H z
*Note: The connection of IRQ and RD pin can be selected depending on the MCU.
Adjust VR to fit LCD display
Adjust R (external pull-high resistance) to fit user¢s time base clock.
It is recommended that the internal equivalent capacitance between SEG and COM of LCD panel should be
lower than 10pF. (LCR meter test condition: frequency in 1KHz)
Rev. 1.70
15
November 9, 2010
PATENTED
HT1660
Instruction Set Summary
Name
Command Code
D/C
Function
Def.
READ
X110-XXA9A8-A7A6A5A4-A3A2A1A0D3D2D1D0
D
Read data from the RAM
WRITE
X101-XXA9A8-A7A6A5A4-A3A2A1A0D3D2D1D0
D
Write data to the RAM
READ-MODIFY- X101-XXA9A8-A7A6A5A4-A3A2A1A0WRITE
D3D2D1D0
D
Read and Write data to the RAM
SYS DIS
X100-0000-0000-XXXX-XXXX
C
Turn Off both system oscillator and LCD bias
Yes
generator
SYS EN
X100-0000-0001-XXXX-XXXX
C
Turn On system oscillator
LCD OFF
X100-0000-0010-XXXX-XXXX
C
Turn Off LCD display
LCD ON
X100-0000-0011-XXXX-XXXX
C
Turn On LCD display
TIMER DIS
X100-0000-0100-XXXX-XXXX
C
Disable time base output
Yes
WDT DIS
X100-0000-0101-XXXX-XXXX
C
Disable WDT time-out flag output
Yes
TIMER EN
X100-0000-0110-XXXX-XXXX
C
Enable time base output
WDT EN
X100-0000-0111-XXXX-XXXX
C
Enable WDT time-out flag output
Yes
TONE OFF
X100-0000-1000-XXXX-XXXX
C
Turn Off tone outputs
CLR TIMER
X100-0000-1101-XXXX-XXXX
C
Clear the contents of the time base generator
Yes
CLR WDT
X100-0000-1111-XXXX-XXXX
C
Clear the contents of the WDT stage
TONE 4K
X100-0001-0000-XXXX-XXXX
C
Turn on tone output, tone frequency output:
4kHz
TONE 2K
X100-0001-0001-XXXX-XXXX
C
Turn on tone output, tone frequency output:
2kHz
IRQ DIS
X100-0001-0010-XXXX-XXXX
C
Disable IRQ output
IRQ EN
X100-0001-0011-XXXX-XXXX
C
Enable IRQ output
RC 32K
X100-0001-0100-XXXX-XXXX
C
System clock source, on-chip RC oscillator
EXT (X¢TAL)
X100-0001-0101-XXXX-XXXX
C
System clock source, external 32kHz clock
source or crystal oscillator 32.768kHz
LARGE BIAS
X100-0001-0110-XXXX-XXXX
C
Large bias current option
MIDDLE BIAS
X100-0001-0111-XXXX-XXXX
C
Middle bias current option
SMALL BIAS
X100-0001-1000-XXXX-XXXX
C
Small bias current option
BIAS 1/6
X100-0001-1010-XXXX-XXXX
C
LCD 1/6 bias option
BIAS 1/5
X100-0001-1001-XXXX-XXXX
C
LCD 1/5 bias option
FRAME 170Hz
X100-0001-1100-XXXX-XXXX
C
Selects 170Hz frame frequency
FRAME 89Hz
X100-0001-1101-XXXX-XXXX
C
Selects 89Hz frame frequency
FRAME 64Hz
X100-0001-1110-XXXX-XXXX
C
Selects 64Hz frame frequency
Select 112´16
X100-0001-1111-XXXX-XXXX
C
This command will change segment from 96
to 112 and common from 32 to 16
F1
X100-1010-0000-XXXX-XXXX
C
Time base clock output: 1Hz
The WDT time-out flag after: 4s
F2
X100-1010-0001-XXXX-XXXX
C
Time base clock output: 2Hz
The WDT time-out flag after: 2s
F4
X100-1010-0010-XXXX-XXXX
C
Time base clock output: 4Hz
The WDT time-out flag after: 1s
Rev. 1.70
16
Yes
Yes
Yes
Yes
Yes
November 9, 2010
PATENTED
Name
Command Code
D/C
HT1660
Function
Def.
F8
X100-1010-0011-XXXX-XXXX
C
Time base clock output: 8Hz
The WDT time-out flag after: 1/2s
F16
X100-1010-0100-XXXX-XXXX
C
Time base clock output: 16Hz
The WDT time-out flag after: 1/4s
F32
X100-1010-0101-XXXX-XXXX
C
Time base clock output: 32Hz
The WDT time-out flag after: 1/8s
F64
X100-1010-0110-XXXX-XXXX
C
Time base clock output: 96Hz
The time-out flag after: 1/16s
F128
X100-1010-0111-XXXX-XXXX
C
Time base clock output: 128Hz
The WDT time-out flag after: 1/32s
TEST
X100-1111-1111-XXXX-XXXX
C
Test mode, user don¢t use.
NORMAL
X100-1111-1110-XXXX-XXXX
C
Normal mode, 96´32 mode will be set
Note:
Yes
Yes
²X² stands for don¢t care
A9~A0: RAM address
D3~D0: RAM data
D/C: Data/Command mode
Def.: Power-on reset default
All the bold forms, namely 1 1 0, 1 0 1, and 1 0 0, are mode commands. Of these, 1 0 0 indicates the command
mode ID. If successive commands have been issued, the command mode ID except for the first command will
be omitted. The tone frequency source and the time base/WDT clock frequency source can be derived from an
on-chip 32kHz RC oscillator, a 32.768kHz crystal oscillator, or an external 32kHz clock. Calculation of the frequency is based on the system frequency sources as stated above. It is recommended that the host controller
should initialize the HT1660 after power-on reset, otherwise, power on reset may fail, which in turn leads to the
malfunctioning of the HT1660.
Rev. 1.70
17
November 9, 2010
PATENTED
HT1660
Package Information
208-pin QFP (28mm´28mm) Outline Dimensions
C
D
1 5 6
G
1 0 5
H
I
1 5 7
A
1 0 4
B
F
E
5 3
2 0 8
K
1
Symbol
Rev. 1.70
a
J
5 2
Dimensions in inch
Min.
Nom.
Max.
A
1.220
¾
1.236
B
1.098
¾
1.106
C
1.220
¾
1.236
D
1.098
¾
1.106
E
¾
0.020
¾
F
¾
0.008
¾
G
0.098
¾
0.122
H
¾
¾
0.134
I
¾
0.004
¾
J
0.014
¾
0.026
K
0.004
¾
0.008
a
0°
¾
7°
18
November 9, 2010
PATENTED
Symbol
Rev. 1.70
HT1660
Dimensions in mm
Min.
Nom.
Max.
A
31.00
¾
31.40
B
27.90
¾
28.10
C
31.00
¾
31.40
D
27.90
¾
28.10
E
¾
0.50
¾
F
¾
0.20
¾
G
3.10
¾
3.40
H
¾
¾
3.70
I
¾
0.10
¾
J
0.35
¾
0.65
K
0.10
¾
0.20
a
0°
¾
7°
19
November 9, 2010
PATENTED
HT1660
Holtek Semiconductor Inc. (Headquarters)
No.3, Creation Rd. II, Science Park, Hsinchu, Taiwan
Tel: 886-3-563-1999
Fax: 886-3-563-1189
http://www.holtek.com.tw
Holtek Semiconductor Inc. (Taipei Sales Office)
4F-2, No. 3-2, YuanQu St., Nankang Software Park, Taipei 115, Taiwan
Tel: 886-2-2655-7070
Fax: 886-2-2655-7373
Fax: 886-2-2655-7383 (International sales hotline)
Holtek Semiconductor Inc. (Shenzhen Sales Office)
5F, Unit A, Productivity Building, No.5 Gaoxin M 2nd Road, Nanshan District, Shenzhen, China 518057
Tel: 86-755-8616-9908, 86-755-8616-9308
Fax: 86-755-8616-9722
Holtek Semiconductor (USA), Inc. (North America Sales Office)
46729 Fremont Blvd., Fremont, CA 94538, USA
Tel: 1-510-252-9880
Fax: 1-510-252-9885
http://www.holtek.com
Copyright Ó 2010 by HOLTEK SEMICONDUCTOR INC.
The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used
solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable
without further modification, nor recommends the use of its products for application that may present a risk to human life
due to malfunction or otherwise. Holtek¢s products are not authorized for use as critical components in life support devices
or systems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information,
please visit our web site at http://www.holtek.com.tw.
Rev. 1.70
20
November 9, 2010
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