NSC CD4013BM

CD4013BM/CD4013BC Dual D Flip-Flop
General Description
Features
The CD4013B dual D flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and
P-channel enhancement mode transistors. Each flip-flop
has independent data, set, reset, and clock inputs and ‘‘Q’’
and ‘‘Q’’ outputs. These devices can be used for shift register applications, and by connecting ‘‘Q’’ output to the data
input, for counter and toggle applications. The logic level
present at the ‘‘D’’ input is transferred to the Q output during
the positive-going transition of the clock pulse. Setting or
resetting is independent of the clock and is accomplished
by a high level on the set or reset line respectively.
Y
Y
Y
Wide supply voltage range
High noise immunity
Low power TTL
compatibility
3.0V to 15V
0.45 VDD (typ.)
fan out of 2 driving 74L
or 1 driving 74LS
Applications
Y
Y
Y
Y
Automotive
Data terminals
Instrumentation
Medical electronics
Y
Y
Y
Y
Alarm system
Industrial electronics
Remote metering
Computers
Connection Diagram
Dual-In-Line Package
Order Number CD4013B
TL/F/5946 – 1
Top View
Truth Table
CL ²
D
R
S
Q
Q
L
L
K
x
x
x
0
1
x
x
x
x
0
0
0
1
0
1
0
0
0
0
1
1
0
1
Q
0
1
1
1
0
Q
1
0
1
No change
² e Level change
x e Don’t care case
C1995 National Semiconductor Corporation
TL/F/5946
RRD-B30M105/Printed in U. S. A.
CD4013BM/CD4013BC Dual D Flip-Flop
February 1988
Absolute Maximum Ratings (Notes 1 & 2)
Recommended Operating
Conditions (Note 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
DC Supply Voltage (VDD)
Input Voltage (VIN)
Storage Temp. Range (TS)
Power Dissipation (PD)
Dual-In-Line
Small Outline
Lead Temperature (TL)
(Soldering, 10 seconds)
DC Supply Voltage (VDD)
Input Voltage (VIN)
Operating Temperature Range (TA)
CD4013BM
CD4013BC
b 0.5 VDC to a 18 VDC
b 0.5 VDC to VDD a 0.5 VDC
b 65§ C to a 150§ C
a 3 VDC to a 15 VDC
0 VDC to VDD VDC
b 55§ C to a 125§ C
b 40§ C to a 85§ C
700 mW
500 mW
260§ C
DC Electrical Characteristics CD4013BM (Note 2)
Symbol
Parameter
b 55§ C
Conditions
Min
a 25§ C
Max
Min
Typ
a 125§ C
Max
Min
Units
Max
IDD
Quiescent Device
Current
VDD e 5V, VIN e VDD or VSS
VDD e 10V, VIN e VDD or VSS
VDD e 15V, VIN e VDD or VSS
1.0
2.0
4.0
1.0
2.0
4.0
30
60
120
mA
mA
mA
VOL
Low Level
Output Voltage
lIOl k 1.0 mA
VDD e 5V
VDD e 10V
VDD e 15V
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
V
V
V
High Level
Output Voltage
lIOl k 1.0 mA
VDD e 5V
VDD e 10V
VDD e 15V
Low Level
Input Voltage
lIOl k 1.0 mA
VDD e 5V, VO e 0.5V or 4.5V
VDD e 10V, VO e 1.0V or 9.0V
VDD e 15V, VO e 1.5V or 13.5V
High Level
Input Voltage
lIOl k 1.0 mA
VDD e 5V, VO e 0.5V or 4.5V
VDD e 10V, VO e 1.0V or 9.0V
VDD e 15V, VO e 1.5V or 13.5V
3.5
7.0
11.0
3.5
7.0
11.0
IOL
Low Level Output
Current (Note 3)
VDD e 5V, VO e 0.4V
VDD e 10V, VO e 0.5V
VDD e 15V, VO e 1.5V
0.64
1.6
4.2
0.51
1.3
3.4
IOH
High Level Output
Current (Note 3)
VDD e 5V, VO e 4.6V
VDD e 10V, VO e 9.5V
VDD e 15V, VO e 13.5V
b 0.64
b 1.6
b 4.2
b 0.51
b 1.3
b 3.4
IIN
Input Current
VDD e 15V, VIN e 0V
VDD e 15V, VIN e 15V
VOH
VIL
VIH
4.95
9.95
14.95
4.95
9.95
14.95
4.95
9.95
14.95
1.5
3.0
4.0
V
V
V
1.5
3.0
4.0
1.5
3.0
4.0
V
V
V
3.5
7.0
11.0
V
V
V
0.88
2.25
8.8
0.36
0.9
2.4
mA
mA
mA
b 0.88
b 2.25
b 8.8
b 0.36
b 0.9
b 2.4
mA
mA
mA
b 0.1
b 10 b 5
b 0.1
b 1.0
0.1
10b5
0.1
1.0
mA
mA
DC Electrical Characteristics CD4013BC (Note 2)
Symbol
Parameter
b 40§ C
Conditions
Min
Max
a 25§ C
Min
Typ
a 85§ C
Max
Min
Units
Max
IDD
Quiescent Device
Current
VDD e 5V, VIN e VDD or VSS
VDD e 10V, VIN e VDD or VSS
VDD e 15V, VIN e VDD or VSS
4.0
8.0
16.0
4.0
8.0
16.0
30
60
120
mA
mA
mA
VOL
Low Level
Output Voltage
lIOl k 1.0 mA
VDD e 5V
VDD e 10V
VDD e 15V
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
V
V
V
High Level
Output Voltage
lIOl k 1.0 mA
VDD e 5V
VDD e 10V
VDD e 15V
Low Level
Input Voltage
lIOl k 1.0 mA
VDD e 5V, VO e 0.5V or 4.5V
VDD e 10V, VO e 1.0V or 9.0V
VDD e 15V, VO e 1.5V or 13.5V
VOH
VIL
4.95
9.95
14.95
2
4.95
9.95
14.95
1.5
3.0
4.0
4.95
9.95
14.95
1.5
3.0
4.0
V
V
V
1.5
3.0
4.0
V
V
V
DC Electrical Characteristics CD4013BC (Note 2) (Continued)
Symbol
Parameter
b 40§ C
Conditions
Min
Max
a 25§ C
Min
High Level
Input Voltage
lIOl k 1.0 mA
VDD e 5V, VO e 0.5V or 4.5V
VDD e 10V, VO e 1.0V or 9.0V
VDD e 15V, VO e 1.5V or 13.5V
3.5
7.0
11.0
3.5
7.0
11.0
IOL
Low Level Output
Current (Note 3)
VDD e 5V, VO e 0.4V
VDD e 10V, VO e 0.5V
VDD e 15V, VO e 1.5V
0.52
1.3
3.6
0.44
1.1
3.0
IOH
High Level Output
Current (Note 3)
VDD e 5V, VO e 4.6V
VDD e 10V, VO e 9.5V
VDD e 15V, VO e 13.5V
b 0.52
b 1.3
b 3.6
b 0.44
b 1.1
b 3.0
IIN
Input Current
VDD e 15V, VIN e 0V
VDD e 15V, VIN e 15V
VIH
Typ
a 85§ C
Max
Min
Units
Max
3.5
7.0
11.0
V
V
V
0.88
2.25
8.8
0.36
0.9
2.4
mA
mA
mA
b 0.88
b 2.25
b 8.8
b 0.36
b 0.9
b 2.4
mA
mA
mA
b 0.3
b 10 b 5
b 0.3
b 1.0
0.3
10b5
0.3
1.0
mA
mA
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed, they are not meant to imply that the devices
should be operated at these limits. The tables of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provide conditions for actual device
operation.
Note 2: VSS e 0V unless otherwise specified.
Note 3: IOH and IOL are measured one output at a time.
AC Electrical Characteristics* TA e 25§ C, CL e 50 pF, RL e 200k, unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CLOCK OPERATION
tPHL, tPLH
Propagation Delay Time
VDD e 5V
VDD e 10V
VDD e 15V
200
80
65
350
160
120
ns
ns
ns
tTHL, tTLH
Transition Time
VDD e 5V
VDD e 10V
VDD e 15V
100
50
40
200
100
80
ns
ns
ns
tWL, tWH
Minimum Clock
Pulse Width
VDD e 5V
VDD e 10V
VDD e 15V
100
40
32
200
80
65
ns
ns
ns
tRCL, tFCL
Maximum Clock Rise and
Fall Time
VDD e 5V
VDD e 10V
VDD e 15V
15
10
5
ms
ms
ms
tSU
Minimum Set-Up Time
VDD e 5V
VDD e 10V
VDD e 15V
40
30
25
ns
ns
ns
fCL
Maximum Clock
Frequency
VDD e 5V
VDD e 10V
VDD e 15V
20
15
12
2.5
6.2
7.6
5
12.5
15.5
MHz
MHz
MHz
SET AND RESET OPERATION
tPHL(R),
tPLH(S)
Propagation Delay Time
VDD e 5V
VDD e 10V
VDD e 15V
150
65
45
300
130
90
ns
ns
ns
tWH(R),
tWH(S)
Minimum Set and
Reset Pulse Width
VDD e 5V
VDD e 10V
VDD e 15V
90
40
25
180
80
50
ns
ns
ns
CIN
Average Input Capacitance
Any Input
5
7.5
pF
*AC Parameters are guaranteed by DC correlated testing.
3
Schematic Diagram
TL/F/5946 – 3
TL/F/5946 – 2
TL/F/5946–4
4
Logic Diagram
TL/F/5946 – 5
Switching Time Waveforms
TL/F/5946 – 6
5
CD4013BM/CD4013BC Dual D Flip-Flop
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number CD4013BMJ or CD4013BCJ
NS Package Number J14A
Molded Dual-In-Line Package (N)
Order Number CD4013BMN or CD4013BCN
NS Package Number N14A
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failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
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