Revised April 1999 74VCX16240 Low Voltage 16-Bit Inverting Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs General Description Features The VCX16240 contains sixteen inverting buffers with 3STATE outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is nibble (4-bit) controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation. The 74VCX16240 is designed for low voltage (1.65V to 3.6V) VCC applications with I/O capability up to 3.6V. The 74VCX16240 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation. ■ 1.65V–3.6V VCC supply operation ■ 3.6V tolerant inputs and outputs ■ tPD 2.5 ns max for 3.0V to 3.6V VCC 3.0 ns max for 2.3V to 2.7V VCC 6.0 ns max for 1.65V to 1.95V VCC ■ Power-off high impedance inputs and outputs ■ Supports live insertion and withdrawal (Note 1) ■ Static Drive (IOH/IOL) ±24 mA @ 3.0V VCC ±18 mA @ 2.3V VCC ±6 mA @ 1.65V VCC ■ Uses patented noise/EMI reduction circuitry ■ Latch-up performance exceeds 300 mA ■ ESD performance: Human body model > 2000V Machine model > 200V Note 1: To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. Ordering Code: Order Number Package Number Package Descriptions 74VCX16240MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Pin Descriptions Pin Names © 1999 Fairchild Semiconductor Corporation DS500099.prf Description OEn Output Enable Input (Active LOW) I0–I15 Inputs O0–O15 Outputs www.fairchildsemi.com 74VCX16240 Low Voltage 16-Bit Inverting Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs January 1998 74VCX16240 Connection Diagram Truth Tables Inputs Outputs OE1 I0–I3 O0–O3 L L H L H L H X Z Inputs Outputs I4–I7 O4–O7 L L H L H L H X Z OE2 Inputs Outputs OE3 I8–I11 O8–O11 L L H L H L H X Z I12–I15 O12–O15 L L H L H L H X Z Inputs OE4 Outputs H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial (HIGH or LOW, inputs may not float) Z = High Impedance Functional Description The 74VCX16240 contains sixteen inverting buffers with 3STATE outputs. The device is nibble (4 bits) controlled with each nibble functioning identically, but independent of each other. The control pins may be shorted together to obtain full 16-bit operation.The 3-STATE outputs are controlled by an Output Enable (OEn) input. When OEn is LOW, the outputs are in the 2-state mode. When OEn is HIGH, the standard outputs are in the high impedance mode but this does not interfere with entering new data into the inputs. Logic Diagram www.fairchildsemi.com 2 Supply Voltage (VCC) −0.5V to +4.6V DC Input Voltage (VI) −0.5V to +4.6V Recommended Operating Conditions (Note 4) Power Supply Output Voltage (VO) Operating Outputs 3-STATED Outputs Active (Note 3) DC Input Diode Current (IIK) VI < 0V −0.5V to +4.6V −0.5V to VCC +0.5V −50 mA Output Voltage (VO) Output in Active States VO < 0V −50 mA VO > VCC +50 mA 0.0V to 3.6V Output Current in IOH/IOL ±50 mA VCC = 3.0V to 3.6V ±24 mA VCC = 2.3V to 2.7V ±18 mA VCC = 1.65V to 2.3V DC VCC or GND Current per Storage Temperature Range (TSTG) 0V to VCC Output in 3-State DC Output Source/Sink Current Supply Pin (ICC or GND) 1.2V to 3.6V −0.3V to +3.6V Input Voltage DC Output Diode Current (IOK) (IOH/IOL) 1.65V to 3.6V Data Retention Only ±100 mA ±6 mA Free Air Operating Temperature (TA) −65°C to +150°C −40°C to +85°C Minimum Input Edge Rate (∆t/∆V) VIN = 0.8V to 2.0V, VCC = 3.0V 10 ns/V Note 2: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 3: IO Absolute Maximum Rating must be observed. Note 4: Floating or unused inputs must be held HIGH or LOW. DC Electrical Characteristics (2.7V < VCC ≤ 3.6V) Symbol Parameter Conditions VCC (V) VIH HIGH Level Input Voltage 2.7 − 3.6 VIL LOW Level Input Voltage 2.7 − 3.6 VOH HIGH Level Output Voltage VOL LOW Level Output Voltage Min Max 2.0 Units V 0.8 V IOH = −100 µA 2.7 − 3.6 VCC − 0.2 V IOH = −12 mA 2.7 2.2 V IOH = −18 mA 3.0 2.4 V IOH = −24 mA 3.0 2.2 IOL = 100 µA 2.7 − 3.6 0.2 V IOL = 12 mA 2.7 0.4 V IOL = 18 mA 3.0 0.4 V IOL = 24 mA 3.0 0.55 V 2.7 − 3.6 ±5.0 µA 2.7 − 3.6 ±10 µA II Input Leakage Current 0 ≤ VI ≤ 3.6V IOZ 3-STATE Output Leakage 0 ≤ VO ≤ 3.6V VI = VIH or VIL V IOFF Power-OFF Leakage Current 0 ≤ (VI, VO) ≤ 3.6V 0 10 µA ICC Quiescent Supply Current VI = VCC or GND 2.7 − 3.6 20 µA VCC ≤ (VI, VO) ≤ 3.6V (Note 5) 2.7 − 3.6 ±20 µA VIH = VCC −0.6V 2.7 − 3.6 750 µA ∆ICC Increase in ICC per Input Note 5: Outputs disabled or 3-STATE only. 3 www.fairchildsemi.com 74VCX16240 Absolute Maximum Ratings(Note 2) 74VCX16240 DC Electrical Characteristics (2.3V ≤ VCC ≤ 2.7V) Symbol Parameter VCC Conditions (V) VIH HIGH Level Input Voltage 2.3 − 2.7 VIL LOW Level Input Voltage 2.3 − 2.7 VOH HIGH Level Output Voltage VOL LOW Level Output Voltage IOH = −100 µA Min Max 1.6 Units V 0.7 V 2.3 − 2.7 VCC − 0.2 V IOH = −6 mA 2.3 2.0 V IOH = −12 mA 2.3 1.8 V IOH = −18 mA 2.3 1.7 IOL = 100 µA 2.3 − 2.7 0.2 V IOL = 12 mA 2.3 0.4 V IOL = 18 mA 2.3 0.6 V 2.3 − 2.7 ±5.0 µA 2.3 − 2.7 ±10 µA µA II Input Leakage Current 0 ≤ VI ≤ 3.6V IOZ 3-STATE Output Leakage 0 ≤ VO ≤ 3.6V VI = VIH or VIL V IOFF Power-OFF Leakage Current 0 ≤ (VI, VO) ≤ 3.6V 0 10 ICC Quiescent Supply Current VI = VCC or GND 2.3 − 2.7 20 µA VCC ≤ (VI, VO) ≤ 3.6V (Note 6) 2.3 − 2.7 ±20 µA Max Units Note 6: Outputs disabled or 3-STATE only. DC Electrical Characteristics (1.65V ≤ VCC < 2.3V) Symbol Parameter Conditions VCC (V) VIH HIGH Level Input Voltage 1.65 - 2.3 VIL LOW Level Input Voltage 1.65 - 2.3 VOH HIGH Level Output Voltage IOH = −100 µA Min 0.65 × VCC 1.65 - 2.3 VCC − 0.2 IOH = −6 mA 1.65 1.25 IOL = 100 µA 1.65 - 2.3 VOL LOW Level Output Voltage II Input Leakage Current 0 ≤ VI ≤ 3.6V IOZ 3-STATE Output Leakage 0 ≤ VO ≤ 3.6V IOL = 6 mA VI = VIH or VIL V 0.35 × VCC V V V 0.2 V 1.65 0.3 V 1.65 - 2.3 ±5.0 µA 1.65 - 2.3 ±10 µA µA IOFF Power-OFF Leakage Current 0 ≤ (VI, VO) ≤ 3.6V 0 10 ICC Quiescent Supply Current VI = VCC or GND 1.65 - 2.3 20 µA VCC ≤ (VI, VO) ≤ 3.6V (Note 7) 1.65 − 2.3 ±20 µA Note 7: Outputs disabled or 3-STATE only. www.fairchildsemi.com 4 TA = −40°C to +85°C, CL = 30 pF, RL = 500Ω Symbol Parameter VCC = 3.3V ± 0.3V Min VCC = 2.5V ± 0.2V Max Min VCC = 1.8V ± 0.15V Max Min Units Max tPHL, tPLH Prop Delay 0.8 2.5 1.0 3.0 1.5 6.0 ns tPZL, tPZH Output Enable Time 0.8 3.5 1.0 4.1 1.5 8.2 ns tPLZ, tPHZ Output Disable Time 0.8 3.5 1.0 3.8 1.5 7.6 ns tOSHL Output to Output Skew tOSLH (Note 9) 0.75 ns 0.5 0.5 Note 8: For CL = 50PF, add approximately 300 ps to the AC maximum specification. Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Dynamic Switching Characteristics Symbol VOLP VOLV VOHV Parameter Quiet Output Dynamic Peak VOL Quiet Output Dynamic Valley VOL Quiet Output Dynamic Valley VOH Conditions CL = 30 pF, VIH = VCC, VIL = 0V CL = 30 pF, VIH = VCC, VIL = 0V CL = 30 pF, VIH = VCC, VIL = 0V VCC TA = +25°C (V) Typical 1.8 0.25 2.5 0.6 3.3 0.8 1.8 −0.25 2.5 −0.6 3.3 −0.8 1.8 1.5 2.5 1.9 3.3 2.2 Units V V V Capacitance Symbol Parameter Conditions TA = +25°C Units Typical CIN Input Capacitance VCC = 1.8, 2.5V or 3.3V, VI = 0V or VCC 6 pF COUT Output Capacitance VI = 0V or VCC, VCC = 1.8V, 2.5V or 3.3V 7 pF CPD Power Dissipation Capacitance VI = 0V or VCC, f = 10 MHz, VCC = 1.8V, 2.5V or 3.3V 20 pF 5 www.fairchildsemi.com 74VCX16240 AC Electrical Characteristics (Note 8) 74VCX16240 AC Loading and Waveforms TEST SWITCH tPLH, tPHL Open tPZL, tPLZ 6V at VCC = 3.3 ± 0.3V; VCC x 2 at VCC = 2.5 ± 0.2V; 1.8V ± 0.15V tPZH, tPHZ GND FIGURE 1. AC Test Circuit FIGURE 2. Waveform for Inverting and Non-Inverting Functions FIGURE 3. 3-STATE Output High Enable and Disable Times for Low Voltage Logic FIGURE 4. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic Symbol VCC 3.3V ± 0.3V 2.5V ± 0.2V 1.8V ± 0.15V Vmi 1.5V VCC/2 VCC/2 Vmo 1.5V VCC/2 VCC/2 VX VOL +0.3V VOL +0.15V VOL +0.15V VY VOH −0.3V VOH −0.15V VOH −0.15V www.fairchildsemi.com 6 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Package Number MTD48 LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 74VCX16240 Low Voltage 16-Bit Inverting Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs Physical Dimensions inches (millimeters) unless otherwise noted