NJRC NJU3554FA1 4-bit single chip otp micro controller Datasheet

NJU3554
PRELIMINARY
4-BIT SINGLE CHIP OTP MICRO CONTROLLER
■ PACKAGE OUTLINE
■ GENERAL DESCRIPTION
The NJU3554 is the C-MOS 4-bit Single Chip OTP type
Micro Controller with programmable Flash Memory.
It is completely compatible with the NJU3504 in function
and the pin configuration. Therefore, the NJU3554 is
suitable for the final evaluation before NJU3504 mask
generation, the small quantity production and short leadtime.
*
In this data sheet, only OTP programming and the
difference between NJU3554 and NJU3504 are
mentioned mainly.
Therefore the detail function and specification should
be referred on the NJU3504 data sheet.
NJU3554FA1
NJU3554L
■ FEATURES
●
●
●
●
●
Internal One Time Programmable ROM 4,096 X 8bits
Internal Data RAM
256 X 4bits
Wide operating voltage range
2.7V ~ 5.5V
Package outline
QFP44-A1 / SDIP42 (Compatible with NJU3504)
ROM programmer “SUPERPRO/L” by XELTEK co,.
■ PIN CONFIGURATION IN OTP PROGRAMMING MODE
[ QFP44-A1 ]
D6
34
D7
35
36
37
38
39
Open
CNT1
40
41
42
CNT1
CNT2
1
33
VDD
2
32
Open
3
31
D5
4
30
D4
29
D3
28
D2
5
NJU3554FA1
6
D0
REQ
10
24
11
23
Open
VDD
Open
VSS
VSS
22
25
21
9
20
CLK
19
D1
18
26
17
8
16
PROM
15
Open
14
27
13
7
12
RESET
Open
RESET
PROM
CLK
REQ
VSS
VSS
Open
Open
VDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
NJU3554L
Open
43
44
Open
CNT2
[ SDIP42 ]
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
Open
D7
D6
VDD
Open
D5
D4
D3
D2
Open
D1
D0
Open
Note) The pin configuration in Normal operating mode is the same as NJU3504.
-1-
-2-
AVss
AVDD
ADCK/PJ1
VREF/PJ0
AIN3/PI3
AIN2/PI2
AIN1/PI1
AIN0/PI0
SDI(O)/PL1
SDO/PL0
A/D
SIO
TIMER2
TIMER1
PC
PORT_A
PORT_B
ID
IR
4096 x 8 bits
OTP ROM
MUX
TLU addr
STACK
Logic
ALU
PORT_C
PORT_D
Y’ Reg
Y Reg
256 x 4 bits
RAM
X’ Reg
X Reg
CPU CORE
AC
PORT_F
PORT_E
STANDBY
CONTROLLER
CPU
TIMING
GENERATOR
PF2
PE3
PC1
PC0
PB3
PB2
PB1
PB0
PA3
PA2
PA1
PA0
* Refer [INPUT OUTPUT TERMINAL TYPE]
INT4
INT3
INT2
Interrupt
PORT_G
OSC
PRESCALER
PORT_H
OSC2
OSC1
RESET
TEST
VSS
VDD
■ BLOCK DIAGRAM
CNTI/PK1
EXTI/PK0
INT1
NJU3554
NJU3554
PH1
PH0
PG1
PG0
PF1
PF0
PE2
PE1
PE0
PD3
PD2
PD1
PD0
NJU3554
■ TERMINAL DESCRIPTION IN OTP PROGRAMMING MODE
No.
NJU
NJU
3554F 3554L
7
SYMBOL
INPUT /
OUTPUT
FUNCTION
RESET
INPUT
RESET terminal.
When the low-level input-signal, the system is initialized.
10
25, 26, 28, 29,
28-31, 31-34,
34, 35 37, 38
1
40,
2
41
10
13
9
12
8
11
18, 33 21, 36
11, 12 14, 15
Note 1)
2)
D0 - D7
INPUT/OUTPUT Data bus
CNT1
CNT2
REQ
CLK
PROM
VDD
VSS
INPUT
INPUT
OUTPUT
INPUT
INPUT
-
OTP control input terminal
Request output terminal
Clock input terminal
OTP programming enable terminal
Power Source (5V)
Power Source (0V)
Use at VDD=5V in OTP programming mode.
Non connect anything to the other terminals.
■ Difference between NJU3554 (OTP version) and NJU3504 (MASK version)
●
Operating mode
NJU3554 has two operating modes. One is ”Normal operating mode” and the other is “OTP programming
mode”.
●
•
Normal operating mode
The ”TEST” terminal is set to low level. (The terminal is recommended to connect to GND.)
Operating voltage range; 2.7V ~ 5.5V.
•
OTP Programming mode
User program is read out from or written into the OTP by the universal programmer “SUPERPRO/L” and
converting adapter made by XELTEK co,.(USA).
Reset Terminal Type
NJU3554
With Pull-up
Internal Pull-up Resistance
●
NJU3504
Without Pull-up
Option information set in the initialization
When the initialization is performed(RESET terminal is “L”), the operation information stored in option area is
set as shown in the following timing chart . The option information is set in the term of 1 / fOSC x 512clock after
RESET releasing and oscillation stability time. After information set, the program counter is set to 0000H and
the NJU3554 operates in normal.
[ TIMING CHART ]
Oscillation
Stability
Time
Option information setting
1/fOSCx512clock
Normal
Operation
Oscillator
Clock
Oscillation
Start
RESET
PC=0000H
fOSC=4MHz
about 128µsec
-3-
NJU3554
■ ABSOLUTE MAXIMUM RATINGS
(Ta=25°C)
PARAMETER
SYMBOL
RATINGS
UNIT
Supply Voltage
VDD
-0.3 ~ +7.0
V
Input Voltage
VIN
-0.3 ~ VDD + 0.3
V
Output Voltage
VOUT
-0.3 ~ VDD + 0.3
V
Analog Supply Voltage
AVDD
-0.3 ~ VDD + 0.3
V
Analog Reference Voltage
VREF
-0.3 ~ AVDD + 0.3
V
AIN0 ~ AIN3
-0.3 ~ AVDD + 0.3
V
Analog Input Voltage
Operating Temperature
Topr
-20 ~ +75
°C
Storage Temperature
Tstg
-55 ~ +125
°C
Note)
The difference of electrical characteristics between NJU3554 (OTP version) and NJU3504
(MASK version)
NJU3504
NJU3554
Supply Voltage (VDD) MIN.
2.4V
→
2.7V
Supply Current
5V (IDD1) Max.
(IDD2) Max.
(IDD3) Max.
(IDD4) Max.
(IDD5) Max.
4.0mA
4.0mA
3.8mA
5.2mA
4.0µA
→
→
→
30mA
30mA
30mA
30mA
20µA
2.0mA
2.0mA
1.8mA
1.4mA
2.0µA
→
→
•
•
3V
-4-
(IDD1) Max.
(IDD2) Max.
(IDD3) Max.
(IDD4) Max.
(IDD5) Max.
→
→
→
20mA
20mA
20mA
20mA
20µA
NJU3554
■ ELECTRICAL CHARACTERISTICS
DC CHARACTERISTICS 1-1
(VDD=3.6~5.5V, VSS=0V, Ta=-20~75°C)
PARAMETER
Supply Voltage
SYM
BOL
VDD
CONDITIONS
VDD
VDD
IDD1
VDD=5V, fOSC=2MHz
X’tal Oscillation in Reset
VDD
IDD2
VDD=5V, fOSC=2MHz
Ceramic Oscillation in Reset
VDD
IDD3
VDD=5V, fOSC=2MHz
Supply Current
CR Oscillation in Reset
VDD
IDD4
VDD=5V, fOSC=4MHz
Operating (Except ADC)
VDD
IDD5
VDD=5V, STANDBY Mode
AVDD
IADD
AVDD=VDD=5V, ADCK=225kHz
PA0~PA3, PB0~PB3, PC0, PC1,
PD0~PD3, PE0~PE3,
VIH1
AIN0/PI0~AIN3/PI3, SDI(O)/PL1,
SCK/CKOUT
High-Level
Input Voltage
PF0~PF2, PG0, PG1, PH0, PH1,
VIH2
VREF/PJ0, ADCK/PJ1, EXTI/PK0,
CNTI/PK1, RESET
OSC1
VIH3
PA0~PA3, PB0~PB3, PC0, PC1,
PD0~PD3, PE0~PE3,
VIL1
AIN0/PI0~AIN3/PI3, SDI(O)/PL1,
SCK/CKOUT
Low-level
Input Voltage
PF0~PF2, PG0, PG1, PH0, PH1,
VIL2
VREF/PJ0, ADCK/PJ1, EXTI/PK0,
CNTI/PK1, RESET
OSC1
VIL3
*1 Input/output port is set as an Input terminal.
*2 Input/output port is set as an Output terminal.
*3 Except the current through Pull-up resister.
MIN
TYP
3.6
MAX
UNIT NOTE
5.5
V
30
mA
*3
30
mA
*3
30
mA
*3
30
mA
*3
20
µA
*3
5.0
mA
*3
0.7VDD
VDD
V
*1
0.8VDD
VDD
V
*1
VDD-1.0
VDD
V
0
0.3VDD
V
*1
0
0.2VDD
V
*1
0
1.0
V
3.0
-5-
NJU3554
■ ELECTRICAL CHARACTERISTICS
DC CHARACTERISTICS 1-2
(VDD=3.6~5.5V, VSS=0V, Ta=-20~75°C)
PARAMETER
High-Level
Input Current
SYM
BOL
IIH
IIL1
Low-Level
Input Current
IIL2
High-Level
Output Voltage
Low-Level
Output Voltage
VOH
VOL1
VOL2
Output
Leakage
Current
IOD
CONDITIONS
VDD=5.5V, VIN=5.5V
PA0~PA3, PB0~PB3, PC0, PC1,
PD0~PD3, PE0~PE3, PF0~PF2,
PG0, PG1, PH0, PH1,
AIN0/PI0~AIN3/PI3, VREF/PJ0,
ADCK/PJ1, EXTI/PK0, CNTI/PK1,
SDI(O)/PL1, RESET, SCK/CKOUT
VDD=5.5V, VIN=0V
Without pull-up resistance
PA0~PA3, PB0~PB3, PC0, PC1,
PD0~PD3, PE0~PE3, PF0~PF2,
PG0, PG1, PH0, PH1,
AIN0/PI0~AIN3/PI3, VREF/PJ0,
ADCK/PJ1, EXTI/PK0, CNTI/PK1,
SDI(O)/PL1, SCK/CKOUT
VDD=5.5V, VIN=0V
With pull-up resistance
PA0~PA3, PB0~PB3, PC0, PC1,
PD0~PD3, PE0~PE3, PF0~PF2,
PG0, PG1, PH0, PH1,
AIN0/PI0~AIN3/PI3, VREF/PJ0,
ADCK/PJ1, EXTI/PK0, CNTI/PK1,
SDI(O)/PL1, RESET, SCK/CKOUT
IOH=-100µA
PD0~PD3, PE0~PE3, PF0~PF2,
PG0, PG1, PH0, PH1, SDO/PL0,
SDI(O)/PL1, SCK/CKOUT
IOL1=400µA
PD0~PD3, PE0~PE3, PF0~PF2,
PG0, PG1, PH0, PH1, SDO/PL0,
SDI(O)/PL1, SCK/CKOUT
IOL2=15mA
PA0~PA3, PB0~PB3, PC0, PC1
-6-
CIN
TYP
MAX
10
UNIT NOTE
10
µA
*1
-10
µA
*1
-100
µA
*1
V
*2
0.5
V
*2
2.0
V
*2
10
µA
*2
20
pF
VDD-0.5
VDD=5.5V, VOH=5.5V
PA0~PA3, PB0~PB3, PC0, PC1
Except VDD, VSS terminals
fOSC=1MHz
Other terminals : 0V
*1 Input/output port is set as an Input terminal.
*2 Input/output port is set as an Output terminal.
*3 Except the current through Pull-up resister.
Input Capacitance
MIN
NJU3554
■ ELECTRICAL CHARACTERISTICS
DC CHARACTERISTICS 2-1
(VDD=2.7~3.6V, VSS=0V, Ta=-20~75°C)
PARAMETER
Supply Voltage
SYM
BOL
VDD
CONDITIONS
VDD
VDD
IDD1
VDD=3V, fOSC=1MHz
X’tal Oscillation in Reset
VDD
IDD2
VDD=3V, fOSC=1MHz
Ceramic Oscillation in Reset
VDD
IDD3
VDD=3V, fOSC=1MHz
Supply Current
CR Oscillation in Reset
VDD
IDD4
VDD=3V, fOSC=2MHz
Operating (Except ADC)
VDD
IDD5
VDD=3V, STANDBY Mode
AVDD
IADD
AVDD=VDD=3V, ADCK=225kHz
PA0~PA3, PB0~PB3, PC0, PC1,
PD0~PD3, PE0~PE3,
VIH1
AIN0/PI0~AIN3/PI3, SDI(O)/PL1,
SCK/CKOUT
High-Level
Input Current
PF0~PF2, PG0, PG1, PH0, PH1,
VIH2
VREF/PJ0, ADCK/PJ1, EXTI/PK0,
CNTI/PK1, RESET
OSC1
VIH3
PA0~PA3, PB0~PB3, PC0, PC1,
PD0~PD3, PE0~PE3,
VIL1
AIN0/PI0~AIN3/PI3, SDI(O)/PL1,
SCK/CKOUT
Low-Level
Input Voltage
PF0~PF2, PG0, PG1, PH0, PH1,
VIL2
VREF/PJ0, ADCK/PJ1, EXTI/PK0,
CNTI/PK1, RESET
OSC1
VIL3
*1 Input/output port is set as an Input terminal.
*2 Input/output port is set as an Output terminal.
*3 Except the current through Pull-up resister.
MIN
TYP
2.7
MAX
UNIT NOTE
3.6
V
20
mA
*3
20
mA
*3
20
mA
*3
20
mA
*3
20
µA
*3
3.5
mA
*3
0.8VDD
VDD
V
*1
0.85VDD
VDD
V
*1
VDD-0.3
VDD
V
0
0.2VDD
V
*1
0
0.15VDD
V
*1
0
0.3
V
2.5
-7-
NJU3554
■ ELECTRICAL CHARACTERISTICS
DC CHARACTERISTICS 2-2
(VDD=2.7~3.6V, VSS=0V, Ta=-20~75°C)
PARAMETER
High-Level
Input Current
SYM
BOL
IIH
IIL1
Low-Level
Input Current
IIL2
High-Level
Output Voltage
Low-Level
Output Voltage
VOH
VOL1
VOL2
Output
Leakage
Current
IOD
CONDITIONS
VDD=3.6V, VIN=3.6V
PA0~PA3, PB0~PB3, PC0, PC1,
PD0~PD3, PE0~PE3, PF0~PF2,
PG0, PG1, PH0, PH1,
AIN0/PI0~AIN3/PI3, VREF/PJ0,
ADCK/PJ1, EXTI/PK0, CNTI/PK1,
SDI(O)/PL1, RESET, SCK/CKOUT
VDD=3.6V, VIN=0V
Without pull-up resistance
PA0~PA3, PB0~PB3, PC0, PC1,
PD0~PD3, PE0~PE3, PF0~PF2,
PG0, PG1, PH0, PH1,
AIN0/PI0~AIN3/PI3, VREF/PJ0,
ADCK/PJ1, EXTI/PK0, CNTI/PK1,
SDI(O)/PL1, SCK/CKOUT
VDD=3.6V, VIN=0V
With pull-up resistance
PA0~PA3, PB0~PB3, PC0, PC1,
PD0~PD3, PE0~PE3, PF0~PF2,
PG0, PG1, PH0, PH1,
AIN0/PI0~AIN3/PI3, VREF/PJ0,
ADCK/PJ1, EXTI/PK0, CNTI/PK1,
SDI(O)/PL1, RESET, SCK/CKOUT
IOH=-80µA
PD0~PD3, PE0~PE3, PF0~PF2,
PG0, PG1, PH0, PH1, SDO/PL0,
SDI(O)/PL1, SCK/CKOUT
IOL1=350µA
PD0~PD3, PE0~PE3, PF0~PF2,
PG0, PG1, PH0, PH1, SDO/PL0,
SDI(O)/PL1, SCK/CKOUT
IOL2=5mA
PA0~PA3, PB0~PB3, PC0, PC1
-8-
CIN
TYP
MAX
10
UNIT NOTE
10
µA
*1
-10
µA
*1
-100
µA
*1
V
*2
0.5
V
*2
1.0
V
*2
10
µA
*2
20
pF
VDD-0.5
VDD=3.6V, VOH=3.6V
PA0~PA3, PB0~PB3, PC0, PC1
Except VDD, VSS terminals
fOSC=1MHz
Other terminals : 0V
*1 Input/output port is set as an Input terminal.
*2 Input/output port is set as an Output terminal.
*3 Except the current through Pull-up resister.
Input Capacitance
MIN
NJU3554
■ ELECTRICAL CHARACTERISTICS
AC CHARACTERISTICS 1
(VSS=0V, Ta= -20~75°C)
PARAMETER
SYM
BOL
CONDITIONS
VDD=2.7~3.6V
Operating
Frequency
fOSC
VDD=3.6~5.5V
Instruction Cycle
Time
External Clock
Pulse Width
External Clock
Rise Time
Fall Time
RESET Low-Level
Width
RESET Rise Time
Port Input Level
Width
Edge Detection (PH1)
Rise Time
Fall Time
Restart Signal (PH0)
Rise Time
External interrupt
input (EXTI)
Rise Time
CNTI Clock
Frequency
CNTI High-Level
Width
CNTI
Rise Time
Fall Time
X’tal Resonator
Ceramic Resonator
External Resistor
Oscillation
External Clock
X’tal Resonator
Ceramic Resonator
External Resistor
Oscillation
External Clock
MIN
TYP
MAX
0.03
0.03
2.0
2.0
0.03
1.0
0.03
0.03
0.03
2.0
4.0
4.0
0.03
2.0
0.03
4.0
6/fOSC
tC
250
125
UNIT
MHz
s
tCPH
tCPL
VDD=2.7~3.6V
VDD=3.6~5.5V
16600
16600
ns
tCPR
tCPF
VDD=2.7~5.5V
20
ns
tRST
VDD=2.7~5.5V
tRSR
VDD=2.7~5.5V
tPIN
VDD=2.7~5.5V
tEDR
tEDF
VDD=2.7~5.5V
200
ns
tSTR
VDD=2.7~5.5V
200
ns
tEXR
VDD=2.7~5.5V
200
ns
fCT
VDD=2.7~5.5V
fOSC/64
Hz
tCT
VDD=2.7~5.5V
tCTR
tCTF
VDD=2.7~5.5V
4/fOSC
s
20
6/fOSC
ms
s
6/fOSC
s
200
ns
-9-
NJU3554
■ AC CHARACTERISTICS 1
TIMING CHART
EXTERNAL CLOCK
1/fOSC
VIH3
OSC1
VIL3
tCPH
tCPF
RESET INPUT
tRST
tCPR
tCPL
tRSR
VIH2
RESET
VIL2
PORT INPUT
tPIN
VIH1, VIH2
PORT
VIL1, VIL2
EDGE DETECTOR INPUT
tEDF
tEDR
VIH2
PH1
VIL2
RESTART SIGNAL INPUT
tSTR
VIH2
PH0
VIL2
EXTERNAL INTERRUPT
tEXR
VIH2
EXTI
VIL2
TIMER2 EXTERNAL CLOCK TIMING CHART
1/fCT
VIH2
CNTI
VIL2
tCTR
- 10 -
tCT
tCTF
NJU3554
■ ELECTRICAL CHARACTERISTICS
AC CHARACTERISTICS 2
SERIAL INTERFACE
(VSS=0V, VDD=2.7~5.5V, Ta= -20~75°C)
PARAMETER
SYM
BOL
Serial Operating
Frequency
fSC
Clock Pulse Width
Low-Level
tSCL
CONDITIONS
MIN
Internal Clock
External Clock
Internal Clock
tSCH
Internal Clock
VDD=2.7~3.6V
fOSC=2MHz
VDD=3.6~5.5V
fOSC=4MHz
UNIT
3.0
µs
1.5
1.0
VDD=2.7~3.6V
fOSC=2MHz
VDD=3.6~5.5V
fOSC=4MHz
3.0
µs
1.5
External Clock
SDI setup Time
tDS
To SCK
SDI Hold time
tDH
To SCK
SDO Data
t
Fix Time To SCK DCD
* The dividing ratio of the internal clock is 1/2.
■ AC CHARACTERISTICS 2
MAX
(1/12)×fOSC*
Hz
500k
External Clock
Clock Pulse Width
High-Level
TYP
1.0
0.5
µs
0.5
µs
0.5
µs
SERIAL INTERFACE TIMING CHART
1/fSC
tSCL
tSCH
VIH1
SCK
VIL1
tDS
tDH
VIH1
SDI(O)
INPUT DATA
VIL1
tDCD
VOH
OUTPUT DATA
SDO/SDI(O)
VOL1
- 11 -
NJU3554
■ ELECTRICAL CHARACTERISTICS
A/D CONVERTER CHARACTERISTICS
(VDD=AVDD=2.7~5.5V, VSS=AVSS=0V, Ta=25°C, fOSC=4MHz)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNIT
-
8
-
bits
±2
LSB
Resolution
-
Absolute Accuracy
-
VDD=5V, AVDD=5V, VREF=5V
Conversion Time
tCONV
VDD=5V, AVDD=5V, VREF=5V
Reference Voltage
VREF
2.7
AVDD
V
VIA
AVSS
VREF
V
225
kHz
Analog Input Voltage
ADCK Frequency
- 12 -
fADCK
µs
40
NJU3554
■ OPTION as same as mask version (NJU3504)
PA0
Programmable
Input / Output
Port of Output
SYMBOL
Port of Input
1) INPUT OUTPUT Terminal Selection
All of input-output terminals select a terminal type for each port from the following table1 and table2 by
the mask option.
[ CIRCUIT TYPE TABLE 1 ]
TERMINAL TYPES
Input / Output
Terminal*1
EXTRA FUNCTION
REMARKS
IOP
IO
IOP
IO
IOP
IO
IOP
IO
IOP
IO
IOP
IO
IOP
IO
IOP
IO
PA1
PA2
PA3
PB0
PB1
PB2
PB3
PC0
ICP
IC
ONP
ON
PC1
ICP
IC
ONP
ON
PD0
ICP
OC
IC
PD1
ICP
OC
IC
PD2
ICP
OC
IC
PD3
ICP
OC
IC
PE0
ICP
OC
IC
PE1
ICP
OC
IC
PE2
ICP
OC
IC
PE3
ICP
OC
IC
Note) The symbol in the above table is the same as in mask option generator software.
*1) The symbol and the detail circuits of INPUT OUTPUT TERMINAL are written in INPUT OUTPUT
TERMINAL TYPE.
- 13 -
NJU3554
[ CIRCUIT TYPE TABLE 2 ]
TERMINAL TYPES
PF0
PF1
PF2
PG0
PG1
PH0
PH1
AIN0 / PI0
AIN1 / PI1
AIN2 / PI2
AIN3 / PI3
VREF / PJ0
ISP
IS
ISP
IS
ISP
IS
ISP
IS
ISP
IS
ISP
IS
ISP
IS
ICP
IC
ICP
IC
ICP
IC
ICP
IC
ISP
IS
ISP
IS
ISP
IS
ISP
IS
OC
Programmable
Input / Output
Port of Output
SYMBOL
Port of Input
Input / Output
Terminal*1
EXTRA FUNCTION
REMARKS
OC
OC
OC
OC
OC
Restart signal input
OC
Edge detection
AD
AD
AD
AD
AD
Analog input to ADC
(AIN0)
Analog input to ADC
(AIN1)
Analog input to ADC
(AIN2)
Analog input to ADC
(AIN3)
Reference input
(VREF)
External clock input
(ADCK)
External interrupt input
(EXTI)
External clock of Timer 2 input
(CNTI)
Serial data output
Serial data input/output
R
F
Rise edge detection
Fall edge detection
ACP
AC
IIP
R
Rise interrupt input
II
F
Fall interrupt input
IIP
CNTI / PK1
II
*2
SDO / PL0
OC
SO
MSB MSB first
SDP
LSB LSB first
SDI(O) / PL1
ICP
OC
SD
*2
IC
SCP Serial clock input/output
SCK / CKOUT
SC
*2 *3
Output clock divide
by pre-scaler
Note) The symbol in the above table is the same as in mask option generator software.
*1) The symbol and the detail circuits of INPUT OUTPUT TERMINAL are written in INPUT OUTPUT
TERMINAL TYPE.
*2) The pull-up resistance is added to the terminal selected as the extra function.
*3) When Serial INPUT-OUTPUT is selected, “SCK” is selected automatically. When it is not selected,
“CKOUT” is selected automatically.
ADCK / PJ1
*2
EXTI / PK0
*2
- 14 -
NJU3554
[MASK OPTION LIST]
SYM
BOL
SYM
BOL
FUNCTION
FUNCTION
ICP
C-MOS input with pull-up resistance
R
Rise edge detection
ISP
C-MOS Schmitt trigger input
with pull-up resistance
F
Fall edge detection
IC
C-MOS input
MSB
Serial data order MSB first
IS
C-MOS Schmitt trigger input
LSB
Serial data order LSB first
Nch-FET Open-Drain output
with pull-up resistance
1
1/2
OC
C-MOS output
2
1/4
ON
Nch-FET Open-Drain output
3
1/8
IIP
External interrupt
resistance
4
1/16
5
1/32
6
1/64
ONP
II
SDP
input
with
pull-up
External interrupt input
Serial data
resistance
input/output
with
pull-up
SD
Serial data input/output
7
1/128
SO
Serial data output
8
1/256
Serial clock input/output
with pull-up resistance
9
1/512
SC
Serial clock input/output
a
1/1024
AD
A/D converter
b
1/2048
External clock input
with pull-up resistance for ADC
c
1/4096
SCP
ACP
AC
External clock input for ADC
IOP
Programmable input/output
with pull-up resistance
IO
Programmable input/output
- 15 -
NJU3554
[ INPUT OUTPUT TERMINAL TYPE ]
Types
With Pull-up
Without Pull-up
Type ICP
Type IC
PC0, PC1,
PD0~PD3,
PE0~PE3,
AIN0/PI0~
AIN3/PI3,
SDI(O)/PL1
Type ISP
Type IS
PF0~PF2,
PG0, PG1,
PH0, PH1,
VREF/PJ0,
ADCK/PJ1,
EXTI/PK0,
CNTI/PK1
Type ON
PD0~PD3,
PE0~PE3,
PF0~PF2,
PG0, PG1,
PH0, PH1,
SDO/PL0,
SDI(O)/PL1
Type ONP
Type ON
PC0, PC1
Type IOP
Type IO
PA0~PA3,
PB0~PB3
INPUT TERMINAL
C-MOS
SCHMITT
TRIGGER
PROGRAMMABLE
INPUT OUTPUT TERMINAL
OUTPUT TERMINAL
C-MOS
- 16 -
Terminals
N-channel(Nch)
OPEN DRAIN
C-MOS INPUT /
Nch OPEN
DRAIN OUTPUT
NJU3554
2) Edge Detector Selection
PH1 terminal is added the “Edge detect function” by the mask option.
Rising edge
Falling edge
3) The data order (MSB, LSB) of the Serial Interface
The data order of the Serial Interface is selected select either MSB or LSB first by the mask option.
4) A/D Control Clock
A/D Control Clock is selected either the external clock from ADCK terminal or the internal clock from the
prescaler by the mask option.
5) Dividing ration of the internal clock
Each dividing ration of the count clocks of Timer1 and Timer2, the Internal shift clock of the Serial
Interface, the clock of the A/D control clock and the output clock through the SCK/CKOUT terminal is
selected among the following by the mask option.
The frequency of each clock is determined by the dividing ration and the 1-instruction term (1/fOSCx6).
1/2, 1/4, 1/8, 1/16, 1/32, 1/64, 1/128, 1/256, 1/512, 1/1024, 1/2048, 1/4096
Note) As Timer2 clock, the external clock or the internal is selected by the program.
As the shift clock of the serial interface, the external clock or the internal is selected by the program.
[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
the industrial rights.
- 17 -
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