Micrel MIC59P50BN 8-bit parallel-input protected latched driver Datasheet

MIC59P50
Micrel
MIC59P50
8-Bit Parallel-Input Protected Latched Driver
General Description
Features
The MIC59P50 parallel-input latched driver is a high-voltage
(80V), high-current (500mA) integrated circuit comprised of
eight CMOS data latches, a bipolar Darlington transistor
driver for each latch, and CMOS control circuitry for the
common CLEAR, STROBE, and OUTPUT ENABLE functions. Similar to the MIC5801, additional protection circuitry
supplied on this device includes thermal shutdown, under
voltage lockout (UVLO), and over-current shutdown.
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The bipolar/MOS combination provides an extremely lowpower latch with maximum interface flexibility. The MIC59P50
has open-collector outputs capable of sinking 500mA and
integral diodes for inductive load transient suppression with
a minimum output breakdown voltage rating of 80V above VEE
(50V sustaining). The drivers can be operated with a split
supply, where the negative supply is down to –20V and may
be paralleled for higher load current capability.
4.4 MHz Minimum Data Input Rate
High-Voltage, High-Current Outputs
Per-Output Over-Current Shutdown (500mA Typical)
Undervoltage Lockout
Thermal Shutdown
Output Fault Flag
Output Transient Protection Diodes
CMOS, PMOS, NMOS, and TTL Compatible Inputs
Internal Pull-Down Resistors
Low-Power CMOS Latches
Single or Split Supply Operation
Ordering Information
With a 5V logic supply, the MIC59P50 will typically operate at
better than 5MHz. With a 12V logic supply, significantly
higher speeds are obtained. The CMOS inputs are compatible with standard CMOS, PMOS, and NMOS circuits. TTL
circuits may require pull-up resistors.
Part Number
Each of these eight outputs has an independent over-current
shutdown at 500 mA. Upon current shutdown, the affected
channel will turn OFF and the flag will go low until VDD is
cycled or the ENABLE/RESET pin is pulsed high. Current
pulses less than 2µs will not activate over-current shutdown.
Temperatures above 165°C will shut down the device and
activate the open collector FLAG output at pin 1. The UVLO
circuit disables the outputs at low VDD; hysteresis of 0.5V is
provided.
Temperature Range
Package
MIC59P50BN
–40°C to +85°C
24-Pin Plastic DIP*
MIC59P50BV
–40°C to +85°C
28-Pin PLCC
MIC59P50BWM
–40°C to +85°C
24-Pin Wide SOIC
* 300-mil “skinny DIP”
Functional Diagram
Pin Configuration
(DIP and SOIC)
CLEAR FLAG ENABLE/RESET
FLAG
ISHUTDOWN
V DD
IREF
IOUT / N
–
+
2.2R
1.25V
R
IN
+
–
UVLO
ILIMIT
24 VSS
1
THERMAL
SHUTDOWN
CLEAR
2
23 OUTPUT
ENABLE/RESET
STROBE
3
22 VDD
IN 1
4
21 OUT 1
IN 2
5
20 OUT 2
IN 3
6
19 OUT 3
IN 4
7
IN 5
8
IN 6
9
16 OUT 6
IN 7 10
15 OUT 7
IN 8 11
14 OUT 8
COMMON
THERMAL
SHUTDOWN
S
Q
R
OUTPUT
R1
70k
Circuitry below dashed line is
included in each of the 8 channels.
R2
3k
LATCHES
STROBE
18 OUT 4
17 OUT 5
V EE
VEE 12
7-58
UVLO
13 COMMON
October 1998
MIC59P50
Micrel
Absolute Maximum Ratings TA = +25°C
Note 2:
Each channel. VEE connection must be designed to minimize
inductance and resistance.
Devices are input-static protected but can be damage by
extremely high static charges.
V DD
Typical Input
CLEAR
FLAG
VEE
VSS
OE/RESET
VDD
4
3
2
1
28
27
26
IN 1
5
25
OUT 1
IN 2
6
24
OUT 2
IN 3
7
23
OUT 3
IN 4
8
22
OUT 4
MIC59P50BV
OUT 7
12
13
14
15
16
17
18
OUT 8
19
COMMON
11
NC
OUT 6
IN 7
VEE
OUT 5
20
NC
21
10
NC
9
IN 6
IN 8
IN 5
Allowable Output Current
ALLOWABLE COLLECTOR CURRENT IN mA AT 50°C
Note 1:
STROBE
PLCC Pin Configuration
Output Voltage (VCE) .................................................... 80V
Supply Voltage (VDD) .................................................... 15V
(VDD – VEE) ............................................................... 25V
Input Voltage (VIN) ............................... –0.3V to VDD+0.3V
Continuous Collector Current (IC) ............................ 500mA
Protected Current ............................................ 1.5A, Note 1
Power Dissipation (PD)
Plastic DIP (N) ......................................................... 2.4W
Derate above TA = +25°C ............................24mW/°C
PLCC (V) ................................................................. 1.6W
Derate above TA = +25°C ............................16mW/°C
Wide SOIC (WM) .................................................... 1.4W
Derate above TA = +25°C ............................14mW/°C
Operating Temperature (TA)
Plastic DIP (N), PLCC (V), SOIC (WM) .. –40°C to +85°C
Storage Temperature (TS) ....................... –65°C to +150°C
Junction Temperature (TJ) ...................................... +150°C
ESD ......................................................................... Note 2
IN
MIC59P50BN
450
400
1 or 2
350
3
4
300
5
6
250
7
8
200
100
7
NUMBER OF OUTPUTS
CONDUCTING
SIMULTANEOUSLY
150
0
10
20
30
40
50
60
70
80
90
100
PERCENT DUTY CYCLE
Pin Description
Pin
Name
Description
1
FLAG
Error Flag. Open Collector Output is Low upon Overcurrent Fault or
Overtemperature Fault. OUTPUT ENABLE/RESET must be pulled high to
reset the flag and fault condition.
2
CLEAR
3
STROBE
4–11
INPUT
12
VEE
13
COMMON
Transient suppression diodes cathode common pin.
14–21
OUTPUT
Parallel Outputs, 8 through 1.
22
VDD
Logic Positive Supply voltage.
23
OUTPUT ENABLE RESET
24
VSS
October 1998
Sets All Latches OFF (open).
Input Strobe Pin. Loads output latches when High.
Parallel Inputs, 1 through 8
Output Ground (Substrate). Most negative voltage in the system connects
here.
Output Enable Reset. When Low, Outputs are active. When High, outputs
are inactive and the Flag and outputs are reset from a fault condition. An
undervoltage condition emulates a high OE input.
Logic reference (Ground) pin.
7-59
MIC59P50
Micrel
Electrical Characteristics
VDD = 5V; TA = +25°C; unless noted.
Limits
Characteristic
Symbol
Test Conditions
Output Leakage Current
ICEX
VCE = 80V, TA = +25°C
VCE = 80V, TA = +70°C
Collector-Emitter
VCE(SAT)
IC = 100 mA
IC = 200 mA
IC = 350 mA
Saturation Voltage
Input Voltage
Min.
Typ.
Max.
Units
50
100
µA
0.9
1.1
V
1.1
1.3
1.3
1.6
VIN(0)
1.0
VIN(1)
VDD = 12V
VDD = 10V
VDD = 5.0V Note 3
Input Resistance
RIN
VDD = 12V
VDD = 10V
VDD = 5.0V
Flag Output Current
IOL
Flag Output Leakage
Supply Current
V
10.5
8.5
3.5
50
50
50
200
300
600
kΩ
VOL = 0.4V
15
mA
IOH
VOH = 12.0V
50
nA
IDD(ON)
(One output
active)
VDD = 12V, Outputs Open
VDD = 10V, Outputs Open
VDD = 5.0V, Outputs Open
3.3
3.1
2.4
4.5
4.5
3.6
mA
IDD(ON)
(All outputs
active)
VDD = 12V, Outputs Open
VDD = 10V, Outputs Open
VDD = 5.0V, Outputs Open
6.4
6.0
4.7
10.0
9.0
7.5
mA
IDD(OFF)
(Total)
VDD = 12V, Outputs Open, Inputs = 0V
VDD = 5.0V, Outputs Open, Inputs = 0V
3.0
2.2
4.5
3.6
mA
Clamp Diode
Leakage Current
IR
VR = 80V, TA = +25°C
VR = 80V, TA = +70°C
50
100
µA
Over-Current Threshold
ILIM
Each Output
Start-Up Voltage
VSU
Note 4
Minimum Operating VDD
VDD MIN
Clamp Diode Forward Voltage
VF
500
IF = 350 mA
3.5
4.0
4.5
V
3.0
3.5
4.0
V
1.7
2.0
V
Thermal Shutdown
165
Thermal Shutdown Hysteresis
10
NOTE 3:
NOTE 4:
mA
°C
Operation of these devices with standard TTL or DTL may require the use of appropriate pull-up resistors to insure a minimum logic “1”.
Undervoltage lockout is guaranteed to release device at no more than 4.5V and disable the device at no less than 3.0V input logic voltage.
Truth Table
Output
OUTN
INN
Strobe
Clear
Enable
t–1
t
0
1
0
0
X
OFF
1
1
0
0
X
ON
X
X
1
X
X
OFF
X
X
X
1
X
OFF
X
0
0
0
ON
ON
X
0
0
0
OFF
OFF
Information present at an input is transferred to its latch when
the STROBE is high. A high CLEAR input will set all latches
to the output OFF condition regardless of the data or STROBE
input levels. A high OUTPUT ENABLE will set all outputs to
the off condition, regardless of any other input conditions.
When the OUTPUT ENABLE is low, the outputs depend on
the state of their respective latches. If current shutdown is
activated, the OUTPUT ENABLE must be pulsed high to
restore operation and reset the Flag. Over temperature
faults are not latched and require no reset pulse.
X = Irrelevant
t–1 = previous output state
t = present output state
7-60
October 1998
MIC59P50
Micrel
CLEAR
F
STROBE
C
A
OUTPUT
ENABLE
C
B
B
C
A
G
B
G
IN N
D
E
E
OUT N
Timing Conditions
(TA
A.
B.
C.
D.
E.
F.
G.
= +25°C, Logic Levels are VDD and VSS, VDD = 5V).
Minimum data active time before strobe enabled (data set-up time) ...................................................................... 50 ns
Minimum data active time after strobe disabled (data hold time) ............................................................................ 50 ns
Minimum strobe pulse width .................................................................................................................................. 125 ns
Typical time between strobe activation and output on to off transition .................................................................. 500 ns
Typical time between strobe activation and output off to on transition .................................................................. 500 ns
Minimum clear pulse width .................................................................................................................................... 300 ns
Minimum data pulse width ..................................................................................................................................... 225 ns
VDD = 5V to 12V
IL = 100mA
0
50
100
TEMPERATURE (°C)
5
VDD = 5V
3
2
SUPPLY CURRENT (mA)
SHUTDOWN THRESHOLD (A)
8
0.55
VDD = 5V
0.50
0.45
VDD = 12V
0.40
0.35
–50
October 1998
0
50
100
TEMPERATURE (°C)
150
ALL OUTPUTS OFF
1
Current Shutdown
Threshold vs. Temperature
0.60
ALL OUTPUTS ON
4
0
–50
150
CURRENT SHUTDOWN DELAY (µs)
0.7
0.6
–50
IL = 350mA
6
Supply Current
vs. Temperature
0
50
100
TEMPERATURE (°C)
150
Supply Current
vs. Temperature
ALL OUTPUTS ON
5
4
VDD = 12V
3
2
ALL OUTPUTS OFF
7
5
4
3
VDD = 5V
2
1
VDD = 12V
0
0.4
0.5
0.6
0.7
0.8
OUTPUT CURRENT (A)
0.9
Output Enable Delay
vs. Supply Voltage
RL = 50Ω
220
200
180
TD OFF
160
140
TD ON
120
1
0
–50
Current Shutdown
Delay vs. Output Current
6
240
7
6
7
260
OUTPUT DELAY (ns)
1.6
1.5
1.4
1.3
1.2
1.1
1
0.9
0.8
Output Saturation
Voltage vs. Temperature
SUPPLY CURRENT (mA)
SATURATION VOLTAGE (V)
Typical Characteristic Curves
100
0
50
100
TEMPERATURE (°C)
7-61
150
5 6 7 8 9 10 11 12 13 14 15
SUPPLY VOLTAGE (V)
MIC59P50
Micrel
Typical Applications
MIC59P50 Protected Relay Driver
10kΩ
FLAG
OUTPUT
STROBE
+24V
+5V
+5V
ILIMIT
24
1
THERMAL
SHUTDOWN
0.1µF 22µF
+
2
23
3
22
K1
INPUT 1
4
21
INPUT 2
5
20
INPUT 3
6
19
INPUT 4
7
INPUT 5
8
INPUT 6
9
16
INPUT 7
10
15
INPUT 8
11
14
K2
K3
LATCHES
K4
18
K5
17
K6
K7
K8
12
UVLO
7-62
13
October 1998
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