NTB5605P, NTBV5605 Power MOSFET -60 V, -18.5 A P−Channel, D2PAK http://onsemi.com Features • • • • Designed for Low RDS(on) Withstands High Energy in Avalanche and Commutation Modes AEC Q101 Qualified − NTBV5605 These Devices are Pb−Free and are RoHS Compliant V(BR)DSS RDS(on) TYP ID MAX −60 V 120 mW @ −5.0 V −18.5 A P−Channel Applications • • • • D Power Supplies PWM Motor Control Converters Power Management G MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter S Symbol Value Unit Drain−to−Source Voltage VDSS −60 V Gate−to−Source Voltage VGS $20 V Continuous Drain Current (Note 1) Steady State TA = 25°C ID −18.5 A Power Dissipation (Note 1) Steady State TA = 25°C PD 88 W IDM −55 A TJ, TSTG −55 to 175 °C EAS 338 mJ TL 260 °C Symbol Max Unit RqJC 1.7 °C/W Pulsed Drain Current tp = 10 ms Operating Junction and Storage Temperature Single Pulse Drain−to−Source Avalanche Energy (VDD = 25 V, VGS = 5.0 V, IPK = 15 A, L = 3.0 mH, RG = 25 W) Lead Temperature for Soldering Purposes (1/8 in from case for 10 s) THERMAL RESISTANCE RATINGS Parameter Junction−to−Case (Drain) – Steady State Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. When surface mounted to an FR4 board using 1″ pad size (Cu Area 1.127 in2). 2. When surface mounted to an FR4 board using the minimum recommended pad size (Cu Area 0.41 in2). © Semiconductor Components Industries, LLC, 2011 August, 2011 − Rev. 4 1 MARKING DIAGRAM & PIN ASSIGNMENT 4 Drain 4 1 NTB5605xG AYWW 2 3 D2PAK CASE 418B STYLE 2 x A Y WW G 1 Gate 2 Drain 3 Source = P or blank = Assembly Location = Year = Work Week = Pb−Free Package ORDERING INFORMATION Package Shipping† NTB5605PT4G D2PAK (Pb−Free) 800 / Tape & Reel NTBV5605T4G D2PAK (Pb−Free) 800 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Publication Order Number: NTB5605P/D NTB5605P, NTBV5605 ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(Br)DSS VGS = 0 V, ID = −250 mA −60 Drain−to−Source Breakdown Voltage Temperature Coefficient V(Br)DSS/TJ Characteristic Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current Gate−to−Source Leakage Current IDSS V −64 mV/°C VGS = 0 V TJ = 25°C −1.0 VDS = −60 V TJ = 125°C −10 IGSS VDS = 0 V, VGS = "20 V Gate Threshold Voltage VGS(th) VGS = VDS, ID = −250 mA Drain−to−Source On Resistance RDS(on) Forward Transconductance Drain−to−Source On Voltage mA "100 nA −1.5 −2.0 V VGS = −5.0 V, ID = −8.5 A VGS = −5.0 V, ID = −17 A 120 140 140 mW gFS VDS = −10 V, ID = −8.5 A 12 VDS(on) VGS = −5.0 V, ID = −8.5 A ON CHARACTERISTICS (Note 3) −1.0 S −1.3 V CHARGES, CAPACITANCES AND GATE RESISTANCE Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge VGS = 0 V, f = 1.0 MHz, VDS = −25 V QG(TOT) Gate−to−Source Charge QGS Gate−to−Drain Charge QGD VGS = −5.0 V, VDS = −48 V, ID = −17 A 730 1190 211 300 67 120 13 22 4.0 pF nC 7.0 SWITCHING CHARACTERISTICS (Note 4) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(on) tr td(off) 12.5 25 122 183 29 58 75 150 TJ = 25°C −1.55 −2.5 TJ = 125°C −1.4 VGS = −5.0 V, VDD = −30 V, ID = −17 A, RG = 9.1 W tf ns DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD Reverse Recovery Time trr Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V IS = −17 A V 60 VGS = 0 V, dIS/dt = 100 A/ms, IS = −17 A QRR 39 21 0.14 3. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 ns nC NTB5605P, NTBV5605 30 VGS = −10 V VGS = −9 V VGS = −8 V VGS = −7 V 25 TJ = 25°C −ID, DRAIN CURRENT (AMPS) 35 40 VGS = −6 V −ID, DRAIN CURRENT (AMPS) 40 VGS = −5.5 V VGS = −5 V VGS = −4.5 V 20 15 VGS = −4 V 10 VGS = −3.5 V 5 0 VDS = −10 V TJ = 25°C 30 10 VGS = −3 V 8 1 3 5 7 9 2 4 6 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) 0 0 10 6 1 2 3 4 5 7 8 −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 0 0.5 VGS = −5.0 V 0.45 0.4 0.35 0.3 TJ = 125°C 0.25 0.2 TJ = 25°C 0.15 0.1 TJ = −55°C 0.05 0 0 5 10 15 20 25 30 −ID, DRAIN CURRENT (AMPS) 0.25 TJ = 25°C 0.225 0.2 0.175 0.15 VGS = −5.0 V 0.125 0.1 VGS = −10 V 0.075 0.05 0.025 0 0 1.6 12 9 15 18 21 24 Figure 4. On−Resistance vs. Drain Current and Gate Voltage 10000 VGS = 0 V ID = −8.5 A VGS = −5.0 V −IDSS, LEAKAGE (nA) 1.8 6 3 −ID, DRAIN CURRENT (AMPS) Figure 3. On−Resistance vs. Drain Current and Temperature 2 9 Figure 2. Transfer Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) TJ = 125°C 20 Figure 1. On−Region Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) TJ = −55°C 1.4 1.2 1 0.8 0.6 0.4 TJ = 150°C 1000 TJ = 125°C 100 10 0.2 0 −50 −25 0 25 50 75 100 125 150 1 5 10 15 20 25 30 35 40 45 50 55 TJ, JUNCTION TEMPERATURE (°C) −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 3 60 VGS = 0 V VDS = 0 V TJ = 25°C Ciss 1600 1400 1200 Crss Ciss 1000 800 600 400 200 Coss Crss 0 10 5 −VGS 0 −VDS 5 10 15 20 25 GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS) −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 2400 2200 2000 1800 8 60 7 VDS 6 45 QT 5 VGS 4 3 2 15 ID = −17 A TJ = 25°C 1 0 0 4 −IS, SOURCE CURRENT (AMPS) t, TIME (ns) 20 tr tf td(on) VDD = −30 V ID = −17 A VGS = −5.0 V 1 10 100 VGS = 0 V TJ = 25°C 15 10 5 0 0 0.25 −ID, DRAIN CURRENT (AMPS) VGS = −20 V SINGLE PULSE TC = 25°C dc 10 1 0.1 0.1 10 ms 1 ms 100 ms RDS(on) Limit Thermal Limit Package Limit 1 0.75 1 1.25 1.5 1.75 10 ms 10 100 Figure 10. Diode Forward Voltage vs. Current EAS, SINGLE PULSE DRAIN−TO−SOURCE AVALANCHE ENERGY (mJ) Figure 9. Resistive Switching Time Variation vs. Gate Resistance 100 0.5 −VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) RG, GATE RESISTANCE (W) 1000 0 16 12 Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge td(off) 1 8 Qg, TOTAL GATE CHARGE (nC) 1000 10 30 QDS QGS Figure 7. Capacitance Variation 100 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) C, CAPACITANCE (pF) NTB5605P, NTBV5605 400 ID = −15 A 350 300 250 200 150 100 50 0 25 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) 50 75 100 125 TJ, STARTING JUNCTION TEMPERATURE (°C) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature http://onsemi.com 4 150 r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE (NORMALIZED) NTB5605P, NTBV5605 1 D = 0.5 0.2 0.1 SINGLE PULSE 0.1 0.0001 0.05 0.01 0.01 0.001 0.1 1 t, TIME (s) Figure 13. Thermal Response di/dt IS trr ta tb TIME 0.25 IS tp IS Figure 14. Diode Reverse Recovery Waveform http://onsemi.com 5 10 NTB5605P, NTBV5605 PACKAGE DIMENSIONS D2PAK 3 CASE 418B−04 ISSUE K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 418B−01 THRU 418B−03 OBSOLETE, NEW STANDARD 418B−04. C E V W −B− 4 1 2 A S 3 −T− SEATING PLANE K J G D W H 3 PL 0.13 (0.005) M T B M INCHES MIN MAX 0.340 0.380 0.380 0.405 0.160 0.190 0.020 0.035 0.045 0.055 0.310 0.350 0.100 BSC 0.080 0.110 0.018 0.025 0.090 0.110 0.052 0.072 0.280 0.320 0.197 REF 0.079 REF 0.039 REF 0.575 0.625 0.045 0.055 STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN VARIABLE CONFIGURATION ZONE N R P U L M DIM A B C D E F G H J K L M N P R S V L M L M F F F VIEW W−W 1 VIEW W−W 2 VIEW W−W 3 SOLDERING FOOTPRINT* 10.49 8.38 16.155 2X 3.504 2X 1.016 5.080 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 6 MILLIMETERS MIN MAX 8.64 9.65 9.65 10.29 4.06 4.83 0.51 0.89 1.14 1.40 7.87 8.89 2.54 BSC 2.03 2.79 0.46 0.64 2.29 2.79 1.32 1.83 7.11 8.13 5.00 REF 2.00 REF 0.99 REF 14.60 15.88 1.14 1.40 NTB5605P, NTBV5605 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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