AAT AAT4900IGV-T1 Buffered power half-bridge Datasheet

AAT4900
Buffered Power Half-Bridge
General Description
Features
The AAT4900 FastSwitch is a member of
AnalogicTech's Application Specific Power
MOSFET™ (ASPM™) product family. It is a
buffered power half-bridge, consisting of low on
resistance power MOSFETs with integrated control
logic. This device operates with inputs ranging
from 2.0V to 5.5V, making it ideal for 2.5V, 3V, and
5V systems. The device is protected from shootthrough current with its own control circuitry. The
AAT4900 is capable of very fast switching times
and is ideal for use in high frequency DC/DC converters. The quiescent supply current is a low 4mA
at 1MHz CLK frequency. In shutdown mode, the
supply current decreases to less than 1µA max.
•
•
•
•
•
•
•
•
FastSwitch™
2.0V to 5.5V Input Voltage Range
105mΩ (typ) Low Side Switch RDS(ON)
130mΩ (typ) High Side Switch RDS(ON)
Low Quiescent Current:
— 1μA (max) DC
— 4mA at 1MHz
Only 2.5V Needed for Control Signal Input
Break-Before-Make Shoot-Through Protection
Temperature Range: -40°C to +85°C
5-Pin SOT23 or 8-Pin SC70JW Package
Applications
The AAT4900 is available in a Pb-free 5-pin
SOT23 or 8-pin SC70JW package and is specified
over the -40°C to +85°C temperature range.
•
•
•
DC Motor Drive
High Frequency DC/DC Converters
MOSFET Driver
Typical Application
DC/DC Converter Output Stage
2.0V to 5.5V Input
IN
Control Circuit
(PWM Output)
ENABLE
CLK
EN
AAT4900
OUTPUT
LX
SOT23
GND
4900.2006.05.1.3
1
AAT4900
Buffered Power Half-Bridge
Pin Descriptions
Pin #
Symbol
Function
SOT23-5
SC70JW-8
1
2, 3
LX
2
6, 7, 8
GND
3
4
EN
Active-high enable input. A logic low signal puts the
LX output pin in high impedance mode.
4
5
CLK
Logic input signal determines the state of LX output.
5
1
IN
Supply voltage input. Input voltage range from 2.0V
to 5.5V.
Inductor connection. LX output is controlled by CLK
and EN (see Control Logic Table).
Ground connection.
Pin Configuration
SOT23-5
(Top View)
1
2
EN
3
4
CLK
IN
LX
LX
EN
Inputs
Output
IN
1
8
7
2
2
GND
5
1
LX
SC70JW-8
(Top View)
3
6
4
5
GND
GND
GND
CLK
Control Logic Table
2
CLK
EN
LX
0
0
High Impedance
0
1
VIN
1
0
High Impedance
1
1
Ground
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AAT4900
Buffered Power Half-Bridge
Absolute Maximum Ratings1
TA = 25°C, unless otherwise noted.
Symbol
Description
VIN
VEN, VCLK
VOUT
IMAX
TJ
VESD
TLEAD
IN to GND
EN, CLK to GND
OUT to GND
Maximum Continuous Switch Current
Operating Junction Temperature Range
ESD Rating2 - HBM
Maximum Soldering Temperature (at Leads)
Value
Units
-0.3 to 6
-0.3 to 6
-0.3 to VIN+0.3
2
-40 to 150
4000
300
V
V
V
A
°C
V
°C
Value
Units
190
526
°C/W
mW
Thermal Information3
Symbol
ΘJA
PD
Description
Thermal Resistance (SOT23-5, SC70JW-8)
Power Dissipation (SOT23-5, SC70JW-8)
1. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum Rating should be applied at any one time.
2. Human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin.
3. Mounted on a demo board.
4900.2006.05.1.3
3
AAT4900
Buffered Power Half-Bridge
Electrical Characteristics
VIN = 5V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = 25°C.
Symbol
VIN
IQAC
IQDC
IQ(OFF)
ISD(OFF)
RDS(ON)H
RDS(ON)L
VONL
VONH
ISINK
TBBM
TON-DLY
THIZ
Description
Conditions
Operation Voltage
AC Quiescent Current
DC Quiescent Current
Off-Supply Current
Off-Switch Current
IN = 5V, EN = IN, CLK = 1MHz, ILX = 0
IN = 5V, EN = IN, CLK = GND, ILX = 0
EN = CLK = GND, IN = LX = 5.5V
EN = GND, IN = 5.5V, VOUT = 0 or LX = IN
IN = 5V, TA = 25°C
High Side MOSFET
IN = 3V, TA = 25°C
On Resistance
IN = 2V, TA = 25°C
IN = 5V, TA = 25°C
Low Side MOSFET
IN = 3V, TA = 25°C
On Resistance
IN = 2V, TA = 25°C
CLK, EN Input Low Voltage IN = 2.7V to 5.5V
IN = 2.7V to ≤4.2V1
CLK, EN Input High Voltage
IN = >4.2V to 5V1
CLK, EN Input Leakage
CLK, EN = 5.5V
CLK Rising
Break-Before-Make Time
CLK Falling
CLK Rising
CLK to LX Delay
CLK Falling
CLK = GND
EN to OUT HiZ Delay
CLK = IN
Min
Typ
2.0
4
0.03
130
165
235
105
135
200
Max Units
5.5
9
1
1
1
165
195
mΩ
145
175
mΩ
0.8
V
2.0
2.4
V
mA
µA
µA
µA
V
0.01
5
5
30
40
40
40
1
µA
ns
ns
ns
1. For VIN outside this range, consult CLK/Enable Threshold vs. Input Voltage curve.
4
4900.2006.05.1.3
AAT4900
Buffered Power Half-Bridge
Typical Characteristics
Operating Current vs. Input Voltage
Operating Current vs. Switching Frequency
7
10.000
Operating Current (mA)
Operating Current (mA)
(FS = 1MHz)
6
5
4
3
2
1
1.000
0.001
3.5
4.0
4.5
5.0
5.5
0.000
0.0
6.0
0.1
1
100
1000
10000
Frequency (kHz)
Operating Current vs. Temperature
Operating Current vs. Temperature
(FS = 1MHz)
(FS = 1MHz)
12
10
8
VIN = 5.5V
6
4
2
VIN = 4.3V
2.4
2.2
2.0
VIN = 3.1V
1.8
1.6
1.4
VIN = 2.7V
1.2
1.0
0
-40
-20
0
20
40
60
80
100
-40
120
-20
0
20
Temperature (°C)
60
80
100
120
Low Side R DS(ON) vs. Output Current
0.16
VIN = 2.7V
0.15
VIN = 2.7V
0.14
RDS(ON) (Ω)
0.22
0.21
0.20
0.19
0.18
0.17
0.16
0.15
0.14
0.13
0.12
0.11
0.10
0.20
40
Temperature (°C)
High Side RDS(ON) vs. Output Current
RDS(ON) (Ω)
10
Input Voltage (V)
Operating Current (mA)
Operating Current (mA)
3.0
VIN = 3V
0.010
0
2.5
VIN = 5V
0.100
0.13
0.12
0.11
0.10
VIN = 5.5V
0.40
0.60
0.80
1.00
1.20
1.40
1.60
Output Current (A)
4900.2006.05.1.3
VIN = 5.5V
0.09
1.80
2.00
2.20
0.08
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
2.2
Output Current (A)
5
AAT4900
Buffered Power Half-Bridge
Typical Characteristics
High Side RDS(ON)
Low Side RDS(ON)
0.30
0.30
0.20
0.25
VIN = 2.7V,
ID = 2.2A
RDS(ON) (Ω)
RDS(ON) (Ω)
0.25
0.15
0.10
0.05
0.00
-40
VIN = 2.7V,
ID = 0.2A
VIN = 5.5V,
ID = 0.2A to 2.2A
-20
0
20
40
60
80
VIN = 2.7V,
ID = 2.2A
0.20
0.15
0.10
100
0.00
-40
120
VIN = 2.7V,
ID = 0.2A
VIN = 5.5V,
ID = 0.2A to 2.2A
0.05
-20
0
Temperature (°C)
20
40
60
80
100
120
Temperature (°C)
Propagation Delay vs. Input Voltage
CLK/Enable Threshold vs. Input Voltage
(CL = 1000pF)
Delay Time (ns)
Threshold Voltage (V)
2.4
120
tPLH
100
80
60
40
tPHL
2.2
2.0
VONH
1.8
1.6
1.4
1.2
1.0
VONL
0.8
0.6
0.4
20
1.5
2
2.5
3
3.5
4
4.5
5
5.5
Input Voltage (V)
0.2
1.5
2
2.5
3
3.5
4
4.5
5
5.5
Input Voltage (V)
RDS(ON) vs. Input Voltage
0.28
0.26
R DS(ON) (Ω)
0.24
0.22
High Side
0.20
0.18
0.16
0.14
Low Side
0.12
0.10
1.5
2
2.5
3
3.5
4
4.5
5
5.5
Input Voltage (V)
6
4900.2006.05.1.3
AAT4900
Buffered Power Half-Bridge
Functional Block Diagram
IN
CLK
Control Logic
and
Shoot-Through
Protection
LX
EN
GND
Typical Applications
force the LX output to a high impedance state under
light load conditions. This enables the output inductor to operate in discontinuous conduction mode
(DCM), improving efficiency under light load conditions. The body diode associated with the low side
switching device gives the AAT4900 inductive
switching capability, clamping the LX node at a
diode drop below GND during the break-beforemake time.
DC/DC Converter
The most common AAT4900 applications include a
DC/DC converter output power stage and a MOSFET gate drive buffer.
Figure 1 shows a common configuration when used
as a DC/DC converter power stage with synchronous rectification. The enable pin can be used to
VIN = 2.0 to 5.5V
IN
EN
DC / DC
Controller
AAT4900
CLK
GND
GND
LX
+
VOUT = 0 to VIN
IOUT = 0 to 1A
-
Figure 1: AAT4900 DC/DC Converter Power Stage.
4900.2006.05.1.3
7
AAT4900
Buffered Power Half-Bridge
Synchronous Buck DC/DC Converter
Application
The losses associated with the AAT4900 high side
switching MOSFET are due to switching losses and
conduction losses. The conduction losses are associated with the RDS(ON) characteristics of the output
switching device. At the full load condition, assuming continuous conduction mode (CCM), the on
losses can be derived from the following equations.
D=
Eq. 1:
VO
VIN
D is the duty cycle.
ΔI =
Eq. 2:
V ⎞
VO ⎛
1- O
L · FS ⎝ VIN ⎠
Eq. 5: PLOSS =
IO2 · (RDS(ON)H · VO + RDS(ON)L · (VIN -VO))
VIN
+ (tsw · FS · IO + IQ) · VIN
Substitution of the IRMS equations with IO results in
very little error when the inductor ripple current is
20% to 40% of the full load current. The equation
also includes switching and quiescent current losses where tSW is approximated at 18 nsec and IQ is
the no load quiescent current of the AAT4900.
Quiescent current losses are associated with the
gate drive of the output stage and biasing. Since
the gate drive current varies with frequency and
voltage, the bias current must be checked at the
frequency, voltage, and temperature of operation
with no load attached to the LX node. Once the
above losses have been determined, the maximum
junction temperature can be calculated.
ΔI is the peak-to-peak inductor ripple current.
High Side Switch RMS Current
Eq. 3:
IRMS(HS) =
2
⎛ 2 ΔI ⎞
·D
IO +
⎝
12 ⎠
Low Side Switch RMS Current
TJ(MAX) = PLOSS · ΘJC = TAMB
Eq. 6:
Using the above equations, the graph below shows
the current capability for some typical applications
with maximum junction temperatures of 150°C and
120°C. The increase in RDS(ON) vs. temperature is
estimated at 3.75mΩ for a 10°C increase in junction temperature.
The low side RMS current is estimated by the following equation.
Step-Down Converter Limits
(FS = 1MHz)
Eq. 4:
2
⎛ 2 ΔI ⎞
· (1 - D)
IO +
IRMS(LS) =
⎝
12 ⎠
Total Losses
A simplified form of the above results (where the
above descriptions of IRMS has been approximated
with Io) is given by:
Output Current (A)
1.75
VIN = 4.2V, VO = 2.5V
VIN = 5.0V, VO = 3.3V
TJMAX = 150°C
1.5
1.25
TJMAX = 120°C
1
VIN = 4.2V, VO = 2.5V
VIN = 5.0V, VO = 3.3V
0.75
0.5
25
35
45
55
65
75
85
Ambient Temperature (°C)
8
4900.2006.05.1.3
AAT4900
Buffered Power Half-Bridge
Gate Drive
The quiescent current was first measured over
temperature for various input voltages with no load
attached. Equation 7 was then used to derive the
maximum gate charge capability for the desired
maximum junction temperature. QG is the gate
charge required to raise the gate of the load MOSFET to the input voltage. This value is taken from
the MOSFET manufacturer's gate charge curve.
When used as a MOSFET gate driver, the breakbefore-make shoot-through protection significantly
reduces losses associated with the driver at high
frequencies. (See Figure 2.)
The low RDS(ON) of the output stage allows for a
high peak gate current and fast switching speeds.
A small package size facilitates close placement to
the power device for optimum switching performance. The logic level inputs (CLK and EN) are high
impedance inputs.
No Load Operating Current at 85°C Ambient
100
Operating Current (mA)
Gate Drive Current Ratings
An estimate of the maximum gate drive capability
with no external series resistor can be derived from
Equation 7. Note that the quiescent current varies
with the ambient temperature, frequency of operation, and input voltage. The graphs below display
the quiescent current and maximum gate charge
drive capability at 85°C ambient vs. frequency for
various input voltages.
VIN = 4.2V
VIN = 5.0V
10
VIN = 5.5V
VIN = 2.7V
1
0.1
100
1000
10000
Frequency (kHz)
1 ⎛ TJ(MAX) - TAMB
⎞
Eq. 7: QG(MAX) =
FS · ⎝ θJA · VIN(MAX) - IQ⎠
Maximum Gate Charge Load @ 85°C
(Ambient TJ(MAX) = 120°C)
1
⎛ 120°C - 85°C
⎞
= 1MHz · 190°C/W · 4.2V - 3.2mA
⎝
⎠
Gate Charge (nC)
1000
= 40nC
VIN = 2.7V
100
VIN = 4.2V
10
VIN = 5.0V
VIN = 5.5V
1
100
1000
10000
Frequency (kHz)
+5V
Load
Circuit
IN
Enable
EN
AAT4900
Clock
LX
CLK
GND
Ground
Figure 2: AAT4900 Gate Drive Configuration.
4900.2006.05.1.3
9
AAT4900
Buffered Power Half-Bridge
Motor Drive
The AAT4900 is also ideally suited for use as an efficient output driver for DC brushless motor control.
The inductive load switching capability of the
AAT4900 eliminates the need for external diodes. A
typical motor control circuit is illustrated in Figure 3.
Recommended Decoupling Layout
Pattern
Because of the extremely fast switching speed and
the high switching currents, optimum placement of
the input capacitor is critical. It is recommended
that a 0.1µF to 10µF 0805 or 1206 ceramic capacitor be placed as close as possible to the IC, as
shown in Figure 4. This helps to decouple the
switching transients from the stray inductance
present in the PC board.
Enable
+5V
IN
IN
EN
EN
LX
AAT4900
Clock
CLK
LX
CLK
DC Brushless
Motor
GND
AAT4900
GND
Ground
Figure 3: Typical Motor Control Block Diagram.
AAT4900
4 CLK
3 EN
2 GND
1 LX
5 V+
CAP
Figure 4: Recommended Decoupling Layout Pattern.
10
4900.2006.05.1.3
AAT4900
Buffered Power Half-Bridge
CLK
LX
Figure 5: Timing Diagram.
50%
CLK
50%
tPHL
tPLH
tf
90%
LX
10%
Figure 6: Switching Time Waveforms.
VIN
10μF
IN
EN
LX
1000pF
CLK
GND
Figure 7: Propagation Delay Test Circuit.
4900.2006.05.1.3
11
AAT4900
Buffered Power Half-Bridge
Ordering Information
Package
Marking1
Part Number (Tape and Reel)2
SOT23-5
ABXYY
AAT4900IGV-T1
SC70JW-8
ABXYY
AAT4900IJS-T1
All AnalogicTech products are offered in Pb-free packaging. The term “Pb-free” means
semiconductor products that are in compliance with current RoHS standards, including
the requirement that lead not exceed 0.1% by weight in homogeneous materials. For more
information, please visit our website at http://www.analogictech.com/pbfree.
Package Information
SOT23-5
2.85 ± 0.15
1.90 BSC
0.40 ± 0.10
0.075 ± 0.075
0.15 ± 0.07
4° ± 4°
10° ± 5°
1.10 ± 0.20
0.60 REF
1.20 ± 0.25
2.80 ± 0.20
1.575 ± 0.125
0.95
BSC
0.60 REF
0.45 ± 0.15
GAUGE PLANE
0.10 BSC
All dimensions in millimeters.
1. XYY = assembly and date code.
2. Sample stock is generally held on part numbers listed in BOLD.
12
4900.2006.05.1.3
AAT4900
Buffered Power Half-Bridge
SC70JW-8
2.20 ± 0.20
1.75 ± 0.10
0.50 BSC 0.50 BSC 0.50 BSC
0.225 ± 0.075
2.00 ± 0.20
0.100
7° ± 3°
0.45 ± 0.10
4° ± 4°
0.05 ± 0.05
0.15 ± 0.05
1.10 MAX
0.85 ± 0.15
0.048REF
2.10 ± 0.30
All dimensions in millimeters.
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Fax (408) 737-4611
4900.2006.05.1.3
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