Renesas HAT1043M-EL-E Silicon p channel power mos fet power switching Datasheet

HAT1043M
Silicon P Channel Power MOS FET
Power Switching
REJ03G1151-0600
(Previous: ADE-208-754D)
Rev.6.00
Sep 07, 2005
Features
•
•
•
•
Low on-resistance
Low drive current
High density mounting
2.5 V gate drive device can be driven from 3 V source
Outline
RENESAS Package code: PTSP0006FA-A
(Package name: TSOP-6)
1 2 5 6
D D D D
6
5
4
1
2
3
4
3
1, 2, 5, 6
3
G
S
4
Rev.6.00 Sep 07, 2005 page 1 of 6
Source
Gate
Drain
HAT1043M
Absolute Maximum Ratings
(Ta = 25°C)
Item
Drain to source voltage
Symbol
VDSS
Value
–20
Unit
V
VGSS
ID
±12
–4.4
V
A
–17.6
–4.4
A
A
Pch (pulse)
Note 3
Pch (continuous)
2.0
1.05
W
W
Tch
Tstg
150
–55 to +150
°C
°C
Gate to source voltage
Drain current
Note 1
Drain peak current
Body-drain diode reverse drain current
ID (pulse)
Note 2
IDR
Note 2
Channel dissipation
Channel dissipation
Channel temperature
Storage temperature
Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1%
2. When using the alumina ceramic board (50 × 50 × 0.7 mm), PW ≤ 5 s, Ta = 25°C
3. When using the alumina ceramic board (50 × 50 × 0.7 mm), Ta = 25°C
Electrical Characteristics
(Ta = 25°C)
Item
Drain to source breakdown voltage
Symbol
V (BR) DSS
Min
–20
Typ
—
Max
—
Unit
V
IGSS
IDSS
—
—
—
—
±0.1
–1
µA
µA
VGS = ±12 V, VDS = 0
VDS = –20 V, VGS = 0
Gate to source cutoff voltage
Static drain to source on state resistance
VGS (off)
RDS (on)
–0.4
—
—
55
–1.4
65
V
mΩ
ID = –1 mA, VDS = –10 V
Note 4
ID = –3 A, VGS = –4.5 V
Forward transfer admittance
RDS (on)
|yfs|
—
4
85
7
110
—
mΩ
S
ID = –3 A, VGS = –2.5 V
Note 4
ID = –3 A, VDS = –10 V
Input capacitance
Output capacitance
Ciss
Coss
—
—
750
310
—
—
pF
pF
Reverse transfer capacitance
Total gate charge
Crss
Qg
—
—
220
11
—
—
pF
nC
VDS = –10 V
VGS = 0
f = 1 MHz
Gate to source charge
Gate to drain charge
Qgs
Qgd
—
—
2
3.5
—
—
nC
nC
VDD = –10 V
VGS = –4.5 V
ID = –4.4 A
Turn-on delay time
Rise time
td (on)
tr
—
—
15
100
—
—
ns
ns
VGS = –4.5 V, ID = –3 A,
RL = 3.3 Ω
Turn-off delay time
Fall time
td (off)
tf
—
—
85
100
—
—
ns
ns
Body-drain diode forward voltage
Body-drain diode reverse recovery time
VDF
trr
—
—
–0.95
50
–1.23
—
V
ns
Gate to source leak current
Zero gate voltage drain current
Note:
4. Pulse test
Rev.6.00 Sep 07, 2005 page 2 of 6
Test Conditions
ID = –10 mA, VGS = 0
Note 4
IF = –4.4 A, VGS = 0
IF = –4.4 A, VGS = 0
diF/dt = –20 A/µs
HAT1043M
Main Characteristics
Power vs. Temperature Derating
Maximum Safe Operation Area
–100
10 µs
ID (A)
–30
1.5
Drain Current
Channel Dissipation
Pch (W)
2.0
1.0
0.5
50
100
150
Ambient Temperature
PW
1
m
=1
s
0m
Op
s(
1s
er
ho
at
ion
t)
(P
Operation in
W
≤
this area is
5
s)
limited by R
N
DC
–3
–1
–0.3
–0.1
DS (on)
–0.03 Ta = 25°C
1 shot pulse
–0.01
–1
–0.1 –0.3
0
0
–10
200
–2.5 V
Drain Current
–8
–6
–2 V
–4
–2
–4
Tc = –25°C
–2
75°C
VGS = –1.5 V
0
–2
–4
–6
–8
Drain to Source Voltage
0
0
–10
VDS (V)
–0.4
–0.3
ID = –5 A
–0.2
–2 A
–0.1
0
–1 A
0
–4
–8
–12
Gate to Source Voltage
Rev.6.00 Sep 07, 2005 page 3 of 6
–16
–20
VGS (V)
–1
–2
–3
–4
–5
VGS (V)
Static Drain to Source on State Resistance
vs. Drain Current
Drain to Source on State Resistance
RDS (on) (mΩ)
Drain to Source Saturation Voltage
VDS (on) (V)
Pulse Test
25°C
Gate to Source Voltage
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
–0.5
–100
VDS = –10 V
Pulse Test
ID (A)
–3 V
0
–30
–10
Pulse Test
–6
–10
Typical Transfer Characteristics
Drain Current
ID (A)
–8
–3
5
Note 5:
When using the alumina ceramic board
(50 × 50 × 0.7 mm)
Typical Output Characteristics
–10 V
–4 V
e
Drain to Source Voltage VDS (V)
Ta (°C)
Test Condition:
When using the alumina ceramic board
(50 × 50 × 0.7 mm), (PW ≤ 5 s)
–10
ot
100 µs
1000
Pulse Test
500
200
100
VGS = –2.5 V
50
–4.5 V
20
10
–0.1 –0.2
–0.5 –1
–2
Drain Current
–5 –10 –20
ID (A)
Static Drain to Source on State Resistance
vs. Temperature
Forward Transfer Admittance vs.
Drain Current
Forward Transfer Admittance |yfs| (S)
Static Drain to Source on State Resistance
RDS (on) (mΩ)
HAT1043M
250
Pulse Test
200
–1 A, –2 A
150
ID = –5 A
–2.5 V
100
–5 A
–1 A, –2 A
50
VGS = –4.5 V
0
–50
0
50
100
150
Case Temperature
200
50
20
Tc = –25°C
10
5
25°C
2
75°C
1
0.5
VDS = –10 V
Pulse Test
0.2
0.1
–0.1 –0.3
Tc (°C)
3000
Capacitance C (pF)
Reverse Recovery Time trr (ns)
–30 –50
–10
Typical Capacitance vs.
Drain to Source Voltage
500
200
100
50
20
di / dt = 20 A / µs
VGS = 0, Ta = 25°C
10
–0.1 –0.2
1000
Ciss
300
Coss
Crss
100
30
VGS = 0
f = 1 MHz
10
–0.5
–1
–2
Reverse Drain Current
–5
0
–10
–2
VGS
–20
–4
VDS
VDD = –5 V
–10 V
–20 V
–30
–6
–8
–40
ID = –4.4 A
–50
0
4
8
Gate Charge
Rev.6.00 Sep 07, 2005 page 4 of 6
12
16
Qg (nc)
–12
–16
–20
–10
20
1000
500
Switching Time t (ns)
–10
VGS (V)
0
VDD = –5 V
–10 V
–20 V
–8
Switching Characteristics
Gate to Source Voltage
0
–4
Drain to Source Voltage VDS (V)
IDR (A)
Dynamic Input Characteristics
VDS (V)
–3
Drain Current ID (A)
Body-Drain Diode Reverse
Recovery Time
Drain to Source Voltage
–1
tr
200
tf
100
50
20
td(off)
td(on)
10 VGS = –4.5 V, VDD = –10 V
PW = 5 µs, duty ≤ 1 %
5
–5 –10 –20
–0.1 –0.2 –0.5 –1 –2
Drain Current
ID (A)
HAT1043M
Reverse Drain Current vs.
Source to Drain Voltage
Reverse Drain Current IF (A)
–10
–8
–5 V
–6
–4
VGS = 0, 5 V
–2
Pulse Test
0
–0.4
–1.2
–1.6
Source to Drain Voltage
VSDF
0
–0.8
–2.0
(V)
Normalized Transient Thermal Impedance γ s (t)
Normalized Transient Thermal Impedance vs. Pulse Width
10
1
D=1
0.5
0.2
0.1
0.1
0.05
0.01
0.02
0.01
0.001
o
sh
1
tp
uls
θch – f (t) = γ s (t) • θch – f
θch – f = 119°C/W, Ta = 25°C
When using the alumina ceramic board
(50 × 50 × 0.7 mm)
e
D=
PDM
PW
T
PW
T
0.0001
10 µ
100 µ
1m
10 m
100 m
1
10
100
1000
10000
Pulse Width PW (S)
Switching Time Test Circuit
Switching Time Waveform
Vin
Vout
Monitor
Vin Monitor
10%
D.U.T.
90%
RL
90%
90%
Vin
10 V
50 Ω
VDD
= –10 V
Vout
td(on)
Rev.6.00 Sep 07, 2005 page 5 of 6
10%
tr
10%
td(off)
tf
HAT1043M
Package Dimensions
JEITA Package Code
RENESAS Code
SC-95 Modified
Package Name
PTSP0006FA-A
MASS[Typ.]
TSOP-6 / TSOP-6V
D
0.012g
A
e
Q
E
c
HE
L
LP
L1
A
Reference
Symbol
A3
A
x M S
b
A
e
A2
A
e1
A1
y S
S
b
b1
I1
c1
c
b2
A-A Section
Pattern of terminal position areas
A
A1
A2
A3
b
b1
c
c1
D
E
e
HE
L
L1
LP
x
y
b2
e1
I1
Q
Dimension in Millimeters
Min
0.8
0
0.8
0.25
0.1
2.8
1.45
2.6
0.3
0.1
0.2
Nom
0.9
0.25
0.32
0.3
0.13
0.11
2.95
1.6
1.0
2.8
Max
1.1
0.1
1.0
0.4
0.15
3.1
1.75
3.0
0.7
0.5
0.6
0.05
0.05
0.45
2.2
0.8
0.2
Ordering Information
Part Name
Quantity
Shipping Container
HAT1043M-EL-E
3000 pcs
Taping
Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of
production before ordering the product.
Rev.6.00 Sep 07, 2005 page 6 of 6
Sales Strategic Planning Div.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
Keep safety first in your circuit designs!
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble
may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage.
Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary
circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap.
Notes regarding these materials
1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's
application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party.
2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data,
diagrams, charts, programs, algorithms, or circuit application examples contained in these materials.
3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of
publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is
therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product
information before purchasing a product listed herein.
The information described here may contain technical inaccuracies or typographical errors.
Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors.
Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor
home page (http://www.renesas.com).
4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to
evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes
no responsibility for any damage, liability or other loss resulting from the information contained herein.
5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life
is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a
product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater
use.
6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials.
7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and
cannot be imported into a country other than the approved destination.
Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited.
8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
http://www.renesas.com
RENESAS SALES OFFICES
Refer to "http://www.renesas.com/en/network" for the latest and detailed information.
Renesas Technology America, Inc.
450 Holger Way, San Jose, CA 95134-1368, U.S.A
Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501
Renesas Technology Europe Limited
Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K.
Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900
Renesas Technology Hong Kong Ltd.
7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong
Tel: <852> 2265-6688, Fax: <852> 2730-6071
Renesas Technology Taiwan Co., Ltd.
10th Floor, No.99, Fushing North Road, Taipei, Taiwan
Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999
Renesas Technology (Shanghai) Co., Ltd.
Unit2607 Ruijing Building, No.205 Maoming Road (S), Shanghai 200020, China
Tel: <86> (21) 6472-1001, Fax: <86> (21) 6415-2952
Renesas Technology Singapore Pte. Ltd.
1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632
Tel: <65> 6213-0200, Fax: <65> 6278-8001
Renesas Technology Korea Co., Ltd.
Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea
Tel: <82> 2-796-3115, Fax: <82> 2-796-2145
Renesas Technology Malaysia Sdn. Bhd.
Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No.18, Jalan Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia
Tel: <603> 7955-9390, Fax: <603> 7955-9510
© 2005. Renesas Technology Corp., All rights reserved. Printed in Japan.
Colophon .3.0
Similar pages