TI AM26LV32E-EP Low-voltage high-speed quadruple differential line receiver with â±15-kv iec esd protection Datasheet

AM26LV32E-EP
www.ti.com............................................................................................................................................................................................ SLLS948 – NOVEMBER 2008
LOW-VOLTAGE HIGH-SPEED QUADRUPLE DIFFERENTIAL LINE RECEIVER
WITH ±15-kV IEC ESD PROTECTION
FEATURES
1
•
•
•
•
•
•
•
•
•
•
•
Meets or Exceeds Standard TIA/EIA-422-B and
ITU Recommendation V.11
Operates From a Single 3.3-V Power Supply
ESD Protection for RS422 Bus Pins
– ±15-kV Human-Body Model (HBM)
– ±8-kV IEC61000-4-2, Contact Discharge
– ±15-kV IEC61000-4-2, Air-Gap Discharge
Switching Rates up to 32 MHz
Low Power Dissipation: 27 mW Typ
Open-Circuit, Short-Circuit, and Terminated
Fail-Safe
±7-V Common-Mode Input Voltage Range With
±200-mV Sensitivity
Accepts 5-V Logic Inputs With 3.3-V Supply
(Enable Inputs)
Input Hysteresis: 35 mV Typ
Pin-to-Pin Compatible With AM26C32,
AM26LS32
Ioff Supports Partial-Power-Down Mode
Operation
SUPPORTS DEFENSE, AEROSPACE,
AND MEDICAL APPLICATIONS
•
•
•
•
•
•
•
Controlled Baseline
One Assembly/Test Site
One Fabrication Site
Available in Military (–55°C/125°C)
Temperature Range (1)
Extended Product Life Cycle
Extended Product-Change Notification
Product Traceability
D PACKAGE
(TOP VIEW)
1B
1A
1Y
G
2Y
2A
2B
GND
(1)
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
4B
4A
4Y
G
3Y
3A
3B
Additional temperature ranges are available – contact factory
DESCRIPTION/ORDERING INFORMATION
The AM26LV32E consists of quadruple differential line receivers with 3-state outputs. These differential receivers
have ±15-kV ESD (HBM and IEC61000-4-2, Air-Gap Discharge) and ±8-kV ESD (IEC61000-4-2, Contact
Discharge) protection for RS422 bus pins.
This device is designed to meet TIA/EIA-422-B and ITU recommendation V.11 drivers with reduced supply
voltage. The device is optimized for balanced bus transmission at switching rates up to 32 MHz. The 3-state
outputs permit connection directly to a bus-organized system.
The AM26LV32E has an internal fail-safe circuitry that prevents the device from putting an unknown voltage
signal at the receiver outputs. In the open fail-safe, shorted fail-safe, and terminated fail-safe, a high state is
produced at the respective output.
This device is supported for partial-power-down applications using Ioff. Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
The AM26LV32EM is characterized for operation from –55°C to 125°C.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008, Texas Instruments Incorporated
AM26LV32E-EP
SLLS948 – NOVEMBER 2008............................................................................................................................................................................................ www.ti.com
ORDERING INFORMATION
TA
–55°C to 125°C
(1)
(2)
PACKAGE
SOIC – D
(1) (2)
ORDERABLE PART NUMBER
Tape and reel
AM26LV32EMDREP
TOP-SIDE MARKING
A26LV32EMP
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
FUNCTION TABLE (1)
(each receiver)
ENABLES
DIFFERENTIAL
INPUT
VID ≥ 0.2 V
G
H
X
H
X
L
H
H
X
?
X
L
?
H
X
L
X
L
L
Open, shorted, or
terminated
H
X
H
X
L
H
X
L
H
Z
–0.2 V < VID < 0.2 V
VID ≤ –0.2 V
(1)
OUTPUT
G
H = high level, L = low level, X = irrelevant,
Z = high impedance (off), ? = indeterminate
LOGIC DIAGRAM (POSITIVE LOGIC)
G 4
12
G
1A 2
1B 1
2A 6
2B 7
3A 10
3B 9
4A 14
4B 15
2
3 1Y
5 2Y
11 3Y
13 4Y
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AM26LV32E-EP
www.ti.com............................................................................................................................................................................................ SLLS948 – NOVEMBER 2008
SCHEMATIC
EQUIVALENT OF EACH INPUT (A, B)
EQUIVALENT OF EACH
ENABLE INPUT (G, G)
TYPICAL OF EACH RECEIVER OUTPUT
VCC
VCC
VCC
2.4 kΩ
5 kΩ
7 kΩ
Enable
G, G
1.5 kΩ
A, B
200 kΩ
Output
1.5 kΩ
VCC(A)
or
GND(B)
2.4 kΩ
GND
GND
GND
All resistor values are nominal.
ABSOLUTE MAXIMUM RATINGS (1) (2)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
–0.5
6
UNIT
V
A or B inputs
–14
14
V
Enable Inputs
–0.5
6
V
–14
14
V
VCC
Supply voltage range (3)
VI
Input voltage range
VID
Differential input voltage (4)
VO
Output voltage range
IIK
Input clamp current range
VI < 0
–20
mA
IOK
Output clamp current range
VO < 0
–20
mA
lO
Maximum output current
±20
mA
TJ
Operating virtual junction temperature
150
°C
θJA
Package thermal impedance (5) (6)
73
°C/W
TA
Operating free-air temperature range
–55
125
°C
Tstg
Storage temperature range
–65
150
°C
(1)
(2)
(3)
(4)
(5)
(6)
–0.5
6
V
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
This device is designed to meet TIA/EIA-422-B and ITU.
All voltage values except differential input voltage are with respect to the network GND.
Differential input voltage is measured at the noninverting input with respect to the corresponding inverting input.
Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = (TJ(max) – TA)/θJA. Selecting the maximum of 150°C can affect reliability.
The package thermal impedance is calculated in accordance with JESD 51-7.
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3
AM26LV32E-EP
SLLS948 – NOVEMBER 2008............................................................................................................................................................................................ www.ti.com
RECOMMENDED OPERATING CONDITIONS
MIN
NOM
MAX
3.3
UNIT
VCC
Supply voltage
3
3.6
V
VIH
Enable high-level input voltage
2
5.5
V
VIL
Enable low-level input voltage
0
0.8
V
VIC
Common-mode input voltage
–7
7
mA
VID
Differential input voltage
–7
7
mA
IOH
High-level output current
–5
mA
IOL
Low-level output current
5
mA
TA
Operating free-air temperature
125
°C
–55
ELECTRICAL CHARACTERISTICS
over recommended ranges of common-mode input, supply voltage, and operating free-air temperature (unless otherwise
noted)
PARAMETER
TEST CONDITIONS
MIN
VIT+
Positive-going input threshold voltage,
differential input
VIT–
Negative-going input threshold voltage,
differential input
Vhys
Input hysteresis (VIT+ – VIT–)
VIK
Input clamp voltage, G and G
VOH
High-level output voltage
VOL
Low-level output voltage
IOZ
High-impedance state output current
VO = VCC or GND
Ioff
Output current with power off
VCC = 0 V, VO = 0 or 5.5 V
II
Line input current
Other input at 0 V
II
Enable input current, G and G
VI = VCC or GND
ri
Input resistance
VIC = –7 V to 7 V, Other input at 0 V
ICC
Supply current (total package)
G, G = VCC or GND, No load, Line inputs open
Cpd
Power dissipation capacitance (2)
One channel
4
MAX
0.2
–0.2
35
VID = –200 mV, IOL = 5 mA
V
0.17
VID = –200 mV, IOL = 100 µA
0.5
0.1
±50
µA
µA
1.5
VI = –10 V
–2.5
±1
17
8
150
V
±100
VI = 10 V
4
V
3.2
VCC –
0.1
VID = 200 mV, IOH = –100 µA
V
mV
–1.5
2.4
UNIT
V
II = –18 mA
VID = 200 mV, IOH = –5 mA
(1)
(2)
TYP (1)
mA
µA
kΩ
17
mA
pF
All typical values are at VCC = 3.3 V, TA = 25°C.
Cpd determines the no-load dynamic current consumption: IS = Cpd × VCC × f + ICC
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www.ti.com............................................................................................................................................................................................ SLLS948 – NOVEMBER 2008
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP (1)
MAX
8
16
26
ns
8
16
26
ns
UNIT
tPLH
Propagation delay time, low- to high-level output
tPHL
Propagation delay time, high- to low-level output
tt
Transition time
See Figure 1
5
tPZH
Output-enable time to high level
See Figure 2
17
40
ns
tPZL
Output-enable time to low level
See Figure 3
10
40
ns
tPHZ
Output-disable time from high level
See Figure 2
20
40
ns
tPLZ
Output-disable time from low level
See Figure 3
16
40
ns
tsk(p)
Pulse skew
See Figure 1 (2)
4
6
ns
tsk(o)
Pulse skew
See Figure 1
(3)
4
6
ns
tsk(pp)
Pulse skew (device to device)
See Figure 1 (4)
6
9
f(max)
Maximum operating frequency
See Figure 1
(1)
(2)
(3)
(4)
See Figure 1
ns
32
ns
MHz
All typical values are at VCC = 3.3 V, TA = 25°C.
tsk(p) is |tpLH – tpHL| of each channel of same device.
tsk(o) is the maximum difference in propagation delay times between any two channels of same device switching in the same direction.
tsk(pp) is the maximum difference in propagation delay times between any two channels of any two devices switching in the same
direction.
ESD PROTECTION
PARAMETER
Receiver input
TEST CONDITIONS
TYP
HBM
±15
IEC61000-4-2, Air-Gap Discharge
±15
IEC61000-4-2, Contact Discharge
±8
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UNIT
kV
5
AM26LV32E-EP
SLLS948 – NOVEMBER 2008............................................................................................................................................................................................ www.ti.com
PARAMETER MEASUREMENT INFORMATION
A
Generator
(see Note B)
Y
VO
B
50 Ω
CL = 15 pF
(see Note A)
50 Ω
A
2V
B
1V
Input
tPLH
VCC
Output
G
G
(see Note C)
tPHL
90%
50%
10%
90%
VOH
50%
10% V
OL
tr
tf
A.
CL includes probe and jig capacitance.
B.
The input pulse is supplied by a generator having the following characteristics: PRR = 10 MHz, duty cycle = 50%,
tr = tf ≤ 2ns.
C.
To test the active-low enable G, ground G and apply an inverted waveform G.
Figure 1. Test Circuit and Voltage Waveforms, tPLH and tPHL
VID = 1 V
A
Y
VO
B
CL = 15 pF
(see Note A)
RL = 2 kΩ
G
Generator
(see Note B)
50 Ω
G
VCC
(see Note C)
VCC
Input
50%
50%
0V
tPZH
Output
tPHZ
VOH
VOH - 0.3 V
Voff ≈ 0
A.
CL includes probe and jig capacitance.
B.
The input pulse is supplied by a generator having the following characteristics: PRR = 10 MHz, duty cycle = 50%,
tr = tf ≤ 2ns.
C.
To test the active-low enable G, ground G and apply an inverted waveform G.
Figure 2. Test Circuit and Voltage Waveforms, tPZH and tPHZ
6
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PARAMETER MEASUREMENT INFORMATION (continued)
VCC
RL = 2 kΩ
A
VID = 1 V
Y
VO
B
CL = 15 pF
(see Note A)
G
Generator
(see Note B)
50 Ω
G
VCC
(see Note C)
VCC
Input
50%
50%
0V
tPZL
tPLZ
Voff ≈ V CC
Output
VOL + 0.3 V
VOL
A.
CL includes probe and jig capacitance.
B.
The input pulse is supplied by a generator having the following characteristics: PRR = 10 MHz, duty cycle = 50%,
tr = tf ≤ 2ns.
C.
To test the active-low enable G, ground G and apply an inverted waveform G.
Figure 3. Test Circuit and Voltage Waveforms, tPZL and tPLZ
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Product Folder Link(s): AM26LV32E-EP
7
PACKAGE OPTION ADDENDUM
www.ti.com
17-Nov-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
AM26LV32EMDREP
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
V62/09602-01XE
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
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OTHER QUALIFIED VERSIONS OF AM26LV32E-EP :
• Catalog: AM26LV32E
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
Addendum-Page 1
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