NSC LMX2240M Intermediate frequency receiver Datasheet

LMX2240
Intermediate Frequency Receiver
General Description
Features
The LMX2240 is a monolithic, integrated intermediate frequency receiver suitable for use in Digital European Cordless Telecommunications (DECT) systems as well as other
mobile telephony and wireless communications applications. It is fabricated using National’s ABiCTM IV BiCMOS
process (fT e 15 GHz).
The LMX2240 consists of a high gain limiting amplifier, a
frequency discriminator, and a received signal strength indicator (RSSI). The high gain limiting amplifier and discriminator operate in the 40 MHz to 150 MHz frequency range, and
the limiter has approximately 70 dB of gain. The use of the
limiter and the discriminator provides a low cost, high performance demodulator for communications systems. The
RSSI output can be used for channel quality monitoring.
The LMX2240 is intended to support single conversion receivers. This device saves power, size, and cost by eliminating the second local oscillator (LO), second converter (mixer), and additional filters. The LMX2240 is recommended for
systems with channel bandwidths of 300 kHz to 2.5 MHz.
The LMX2240 is available in a 16-pin JEDEC surface mount
plastic package.
Y
Y
Y
Y
Y
Y
Y
Y
Typical operation at 110 MHz
RF sensitivity to b75 dBm; RSSI sensitivity to
b 82 dBm
High gain (70 dB) limiting amplifier
Average current consumption: 480 mA for DECT
handset (burst mode)
a 3V operation
Power down mode for increased current savings
Part of a complete receiver solution with the LMX2216
LNA/Mixer, the LMX2315/20 Phase-locked Loop, and
the LMX2411 Baseband Processor
Compliant to ARi1TM specification
Applications
Y
Y
Y
Y
Y
Digital European Cordless Telecommunications (DECT)
Portable wireless communications (PCS/PCN, cordless)
Wireless local area networks (WLANs)
Digital cellular telephone systems
Other wireless communications systems
Functional Block Diagram
TL/W/11755 – 1
ABiCTM and ARi1TM are trademarks of National Semiconductor Corporation.
C1995 National Semiconductor Corporation
TL/W/11755
RRD-B30M115/Printed in U. S. A.
LMX2240 Intermediate Frequency Receiver
April 1995
Connection Diagram
Small Outline Package
TL/W/11755 – 2
Top View
Order Number LMX2240M
See NS Package Number M16A
Pin Description
Pin No.
Pin Name
I/O
1
PD
I
Power Down; a HIGH signal switches the part to power down mode.
2
RSSI Out
O
Voltage output of the received signal strength indicator (RSSI).
3
NC
4
GND
5
GND
6
MID
O
7
Demod Out
O
8
VCC (Mixer)
Description
No connection
Ground
Ground
Mid-range output of the discriminator; can be used for comparator threshold.
Demodulated output of the discriminator.
Source voltage for the mixer (discriminator).
9
VCC (Lim.)
10
Quad In
I
Source voltage for the limiter.
11
Lim. Out
O
12
GND
Ground
13
GND
Ground
14
Comp.
Compensation pin for the limiter. See Applications Information for capacitor
value.
15
Comp.
Compensation pin for the limiter. See Applications Information for capacitor
value.
16
IF In
I
Quadrature input. A DC path from source through an inductor must be present at
this pin, but, there must be no series resistance (a parallel resistor to the inductor
is acceptable).
Limiter output to the quadrature tank.
IF input to the limiter.
2
Absolute Maximum Ratings
Recommended Operating
Conditions
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Power Supply Voltage (VCC)
Storage Temperature Range (TS)
Lead Temperature (TL)
(Soldering, 10 seconds)
Min
Supply Voltage (VCC)
3V
Operating Temperature (TA)
6.5V
b 65§ C to a 150§ C
Max
Units
2.85
3.15
V
b 10
a 70
§C
a 260§ C
Electrical Characteristics
The following specifications apply for supply voltage VCC e a 3V g 5%, fIN e 120 MHz, and TA e 25§ C unless otherwise
specified
Symbol
Parameter
IDD
Supply Current
IPD
Power Down Current
fmax
Maximum IF Input Frequency
fmin
Minimum IF Input Frequency
Conditions
Min
120
Value
Typ
Max
Units
8
10
mA
115
200
mA
150
MHz
10
MHz
IF LIMITER
NF
IF Limiter Noise Figure
11.5
12.5
dB
AV
Limiter Gain
ZL e 1000X
70
dB
sens
Limiter/Disc. Sensitivity
BER e 0.001
b 75
dBm
IFin
IF Limiter Input Impedance
IFout
IF Limiter Output Impedance
Vmax
Maximum Input Voltage Level
Vout
Output Swing
Lim
Input Limiting Point
150
350
225
X
250
X
500
mVPP
500
VPP
b 70
dBm
1.2
VPP
DISCRIMINATOR
Vout
Discriminator Output Peak-to-Peak Voltage
(Note 1)
See Test Circuit
1.0
VOS
Disc. Output DC Voltage (Pin 7)
1.4
1.7
V
MID
Mid-Range Output (Pin 6)
1.4
1.7
V
DISCin
Disc. Input Impedance
1000
X
DISCout
Disc. Output Impedance
150
X
70
dB
RSSI
RSSI
RSSIout
RSSI Dynamic Range
RSSI Output Voltage
RSSI Slope
Pin e b80 dBm
0.35
0.5
0.8
Pin e 0 dBm
1.15
1.5
1.8
11
16
mV/dB
3
dB
Pin e b70 dBm to b20 dBm
RSSI Linearity
V
V
Note 1: The discriminator output peak-to-peak voltage is measured by operating the discriminator mixer with two separate inputs (i.e., as a mixer). A beat frequency
of 1 kHz is generated, and this tone’s output swing is guaranteed to be at least 1.0 VPP. When the mixer is configured as a discriminator with the limiter and a tank
circuit, the guaranteed 1.0 VPP output translates to (1.0V *(36/180) e ) 200 mVPP demodulated output, assuming at least 36§ phase shift across the band of
interest from the tank circuit.
3
Typical Application Block Diagram
TL/W/11755 – 3
Functional Description
THE RECEIVED SIGNAL STRENGTH INDICATOR (RSSI)
The RSSI circuit has a range of 70 dB. Its output voltage is
proportional to the logarithm of the input signal level. The
RSSI circuit has a sensitivity of b82 dBm. The output voltage of the circuit ranges from 0.5V to 1.5V typically.
OVERVIEW
The LMX2240 IF demodulator is a low power IF processor
that includes a frequency discriminator, an IF hard limiting
amplifier, and a received signal strength indicator (RSSI).
The LMX2240 is capable of differentially demodulating an
FM or AM signal with as high an IF as 150 MHz, avoiding a
costly second down-conversion. The RSSI output can be
used for time gated channel measurements required in
TDMA and other systems. Other features include high receiver sensitivity and a power down mode to allow for standby operation.
THE FREQUENCY DISCRIMINATOR
The frequency discriminator is a Gilbert cell mixer that requires an external tank circuit to create a 90§ phase shift at
the desired frequency. The output of this circuit is centered
at 1.5V by an internal level shifting circuit, and a mid-range
voltage (at 1.5V) is also provided. The sensitivity of the discriminator to phase inaccuracies is 5.5 mV/degree (see Applications Information). This means that for a phase imbalance of 10§ , the received eye diagram will be shifted by
about 55 mV off of the 1.5V mid-range voltage. For the typical case, this amounts to about 10% of the output eye diagram (for 400 mVPP output).
THE LIMITING AMPLIFIER
The limiting amplifier has a typical gain of 70 dB and a sensitivity of about b75 dBm. This allows it to be used in the
DECT system with 20 dB net RF gain in front of it to achieve
a sensitivity of b95 dBm. The limiter is a five stage amplifier
with internal compensation at each stage to ensure stability.
Two external compensation capacitors are also required to
further enhance stability. The input to the limiter is a relatively low impedance to allow easy matching to typical IF surface acoustic wave (SAW) filters. The output of the limiter is
connected off chip to an external quadrature tank circuit as
well as connected internally to the discriminator (mixer). The
output impedance of the limiter is 250X (typical).
4
Typical Performance Characteristics
Limiter Gain vs Frequency with
Temperature as a Parameter
TL/W/11755 – 4
Limiter Gain vs Frequency with
Supply Voltage as a Parameter
TL/W/11755 – 5
5
Typical Performance Characteristics (Continued)
Current Consumption vs Supply Voltage
with Temperature as a Parameter
Discriminator Output Peak-to-Peak Voltage
vs Supply with Temperature as a Parameter
TL/W/11755–6
TL/W/11755 – 7
Mid-Range (Reference) Voltage vs Supply
with Temperature as a Parameter
Power Down Current vs Temperature
TL/W/11755–8
TL/W/11755 – 9
Limiter Output Power vs Frequency
with Voltage as a Paramerer
Limiter Output Power vs Frequency
with Temperature as a Paramerer
TL/W/11755–10
TL/W/11755 – 11
6
Typical Performance Characteristics (Continued)
RSSI Output vs Input Power
with VCC as a Parameter
TL/W/11755 – 12
RSSI Output vs Input Power with
Temperature as a Parameter
TL/W/11755 – 13
7
Automatic Test Circuit
TL/W/11755 – 14
C1 e 1000 pF g 10% NPO Ceramic
C2 e 1000 pF g 10% NPO Ceramic
C3 e 1000 pF g 10% NPO Ceramic
R1 e 25X g 5% (/4W Thin Film Carbon
R2 e 1 kX g 5% (/4W Thin Film Carbon
R3 e 1 kX g 5% (/4W Thin Film Carbon
L1 e 10 mH g 5% Air Coil
C4 e 1000 pF g 10% NPO Ceramic
R4 e 20X g 5% (/4W Thin Film Carbon
C5 e 1000 pF g 10% NPO Ceramic
R5 e 3.9 kX g 5% (/4W Thin Film Carbon
8
Typical Application Example
TL/W/11755 – 15
C1 e C2 e C3 e C5 e C6 e 100 pF g 10% NPO Ceramic
C7 e C9 e 0.01 mF g 10% NPO Ceramic
C4 e 1 pF g 10% NPO Ceramic
C8 e 82 pF g 10% X7R Ceramic
R1 e 4 kX g 5% (/4W Thin Film Carbon
R2 e 880X g 5% (/4W Thin Film Carbon
Tank e Toko Ý638AH-0294
All supporting components 0603 surface mount except tank.
9
Applications Information
With a circuit that gives an output peak-to-peak voltage of
1.0 VPP (min) with ideal quadrature, the slope is seen to be
5.5 mV/degree. With a practical quadrature tank circuit at
110.6 MHz, the phase shift over a 1 MHz bandwidth is about
45§ –50§ , which translates to an output peak-to-peak voltage
of about 250 mVPP.
THE INTERMEDIATE FREQUENCY LIMITER
The IF limiter has a large amount of gain at high enough
frequency to cause concern about oscillation. To ensure
that the limiter does not oscillate, a few precautions should
be taken. The compensation capacitors that are used
should be chosen to roll off any unwanted frequencies below the band of interest. The capacitor should be a high Q,
RF type ceramic chip capacitor. For DECT, the capacitor
value should be 100 pF, and the capacitors should be soldered as close to the LMX2240 as possible. This will create
a pass band from 40 MHz to 150 MHz. The AC coupling
capacitor at the input to the limiter (from the SAW filter)
should be the same value as the compensation capacitors.
Assume the FM modulated signal is denoted as
s(t) e cos (0ct a m(t)) ,
where
m(t) e m
#
(4)
t
b(t) dt ,
b%
and b(t) is the modulating baseband signal. The constant m is defined as m e 2DfTb. The signal s(t) must
be delayed by some u so that
THE DISCRIMINATOR
There are two types of discriminator that can be used to
demodulate FM signals. The first is a delay line discriminator, which uses a delay in one path of the received signal to
introduce a phase difference between it and the received
signal. The operation of the delay line discriminator is derived in the inset box. The other type of discriminator relies
on a quadrature tank to directly introduce a phase shift in
the received signal. This is the type of implementation that
is commonly used in mobile communications because of its
relative ease of construction and low cost.
The discriminator operates best when the inputs to it are
hard-limited (i.e., square edges). If the input signal is small
enough such that the IF amplifier cannot limit it, the output
voltage swing of the limiter will suffer. Typically, the minimum voltage swing the discriminator can see and still fully
switch is about 100 mVPP. The two inputs to the discriminator can be of different peak-to-peak voltage swings as long
as both are over the lower limit. This allows the quadrature
tank circuit to have some insertion loss. In fact, up to 8 dB
insertion loss can be tolerated while still ensuring that the
discriminator output won’t suffer.
The quadrature circuit can also affect the discriminator output voltage swing. The discriminator output voltage swing
specified assumes perfect quadrature at the frequency of
interest (mixer operation). With available analog components, perfect quadrature is not possible. This is due in part
to the high frequency of the IF and the proportionally very
narrow bandwidth of the desired signal. For example, a
DECT signal is about 1 MHz wide, which is k 1% of the IF
at which the demodulation occurs. This makes the quadrature circuit difficult to achieve. With moderately high Q components, however, a reasonable phase shift can be
achieved with a single pole tank. This is illustrated by the
following equation: the output of the discriminator is given
by
DISCout e cos(0c t ) # cos(0c t a w),
(1)
l(t) e s(t a u) e cos (0c(t a u) a m(t a u)) .
If the delay u is such that
0ct e 2nq a
q
, n e 0, 1, 2, 3, . . . ,
2
then s(t a u) e sin(0ct a m(t a u)),
and multiplying (4) and (7) yields
s(t) l(t) e cos (0ct a m(t)) sin (0ct a m(t a u))
1
e
sin (20ct a m(t) a m(t a u))
2
1
a
sin (m(t a u) b m(t)) .
2
(5)
(6)
(7)
(8)
The double frequency component can be filtered off
with a lowpass filter. If u is kept small,
1
1
[m(t a u) b m(t)]
sin (m(t a u) b m(t)) &
2
2
tau
m
e
b(t) dt b
b%
2
t
m
b(t) dt
(9)
b%
2
a
t u
m
e
b(t) dt
2
t
m
&u
b(t) .
2
The object for a delay line, then, is to maximize the delay while retaining the approximations necessary to satisfy (9), u k 0.1 Tb.
#
#
#
which results in
DISCout e cos(0c t a 0c t a w) a cos(0c t b 0c t b w). (2)
When the double frequency component is filtered out with a
low pass filter, the cosine of the phase remains
DISCout e cos(b w) e cos(w).
(3)
It can be seen that at 90§ phase shift, the output will be zero.
At 0§ , the output will be 0.5, and at 180§ , it will be b0.5. The
output swing is then set by the multiplication of the cosine
term with the discriminator output amplifier’s gain.
10
11
LMX2240 Intermediate Frequency Receiver
Physical Dimensions inches (millimeters)
16-Lead Molded Package (SO)
Order Number LMX2240M
For Tape and Reel Order Number LMX2240MX
NS Package Number M16A
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