MOTOROLA MC74ACT652DW Octal transceiver/register with 3-state outputs (non-inverting) Datasheet

! # ! !
$!! "!"!
Independent Registers for A and B Buses
Multiplexed Real-Time and Stored Data Transfers
Choice of True and Inverting Data Paths
3-State Outputs
300 mil Slim Dual-in-Line Package
Outputs Source/Sink 24 mA
′ACT652 Has TTL Compatible Inputs
1
REAL TIME TRANSFER
B-BUS TO A-BUS
A-BUS
A-BUS
REG
OCTAL TRANSCEIVER/
REGISTER WITH 3-STATE
OUTPUTS (NON-INVERTING)
24
REAL TIME TRANSFER
A-BUS TO B-BUS
REG
$ #!
The MC74AC/ACT652 consists of registered bus transceiver circuits, with
outputs, D-type flip-flops and control circuitry providing multiplexed transmission of
data directly from the input bus or from the internal storage registers. Data on the A
or B bus will be loaded into the respective registers on the LOW-to-HIGH transition
of the appropriate clock pin (CAB or CBA). The four fundamental data handling
functions available are illustrated in Figures 1 to 4.
•
•
•
•
•
•
•
REG
N SUFFIX
CASE 724-03
PLASTIC PACKAGE
REG
24
1
B-BUS
B-BUS
Figure 1
Figure 2
STORAGE
FROM BUS TO REGISTER
TRANSFER
FROM REGISTER TO BUS
A-BUS
A-BUS
REG
REG
REG
DW SUFFIX
CASE 751E-04
SOIC PACKAGE
A0 – A7
REG
B-BUS
B-BUS
Figure 3
Figure 4
PIN NAMES
B0 – B7
CAB, CBA
SAB, SBA
GAB, GBA
Data Register A Inputs
Data Register A Outputs
Data Register B Inputs
Data Register B Outputs
Clock Pulse Inputs
Transmit/Receive Inputs
Output Enable Inputs
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
–0.5 to +7.0
V
VCC
DC Supply Voltage (Referenced to GND)
Vin
DC Input Voltage (Referenced to GND)
–0.5 to VCC + 0.5
V
Vout
DC Output Voltage (Referenced to GND)
–0.5 to VCC + 0.5
V
Iin
DC Input Current, per Pin
± 20
mA
Iout
DC Output Sink/Source Current, per Pin
± 50
mA
ICC
DC VCC or GND Current per Output Pin
± 50
mA
Tstg
Storage Temperature
–65 to +150
°C
* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended
Operating Conditions.
FACT DATA
5-1
MC74AC652 MC74ACT652
Pinout: 24-Lead Plastic Package (Top View)
VCC
CBA
SBA
GBA
B0
B1
B2
B3
B4
B5
B6
B7
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
CAB
SAB
GAB
A0
A1
A2
A3
A4
A5
A6
A7
GND
LOGIC SYMBOL
CAB
SAB
GAB
CBA
SBA
GBA
B0
B1
B2
B3
B4
B5
B6
B7
A0
A1
A2
A3
A4
A5
A6
A7
LOGIC DIAGRAM
GBA
GAB
CBA
SBA
CAB
SAB
1 OF 8 CHANNELS
D0
C0
B0
A0
D0
C0
TO 7 OTHER CHANNELS
Please note that this diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
FACT DATA
5-2
MC74AC652 MC74ACT652
FUNCTION TABLE
Inputs
Data I/O*
Operation or Function
GAB
GBA
CAB
CBA
SAB
SBA
A0 – A7
B0 – B7
L
L
H
H
H or L
⇑
H or L
⇑
X
X
X
X
Input
Input
X
H
H
H
⇑
⇑
H or L
⇑
X
X**
X
X
Input
Input
Unspecified*
Output
Store A, Hold B
Store A in Both Registers
L
L
X
L
H or L
⇑
⇑
⇑
X
X
X
X**
Unspecified*
Output
Input
Input
Hold A, Store B
Store B in Both Registers
L
L
L
L
X
X
X
H or L
X
X
L
H
Output
Input
Real-Time B Data to A Bus
Stored B Data to A Bus
H
H
H
H
X
H or L
X
X
L
H
X
X
Input
Output
Real-Time A Data to B Bus
Stored A Data to B Bus
H
L
H or L
H or L
H
H
Output
Output
Stored A Data to B Bus and
Stored B Data to A Bus
Isolation
Store A and B Data
* The data output functions may be enabled or disabled by various signals at the GBA and GAB inputs. Data input functions are always enabled; i.e., data at the
bus pins will be stored on every LOW-to-HIGH transition of the appropriate clock inputs.
** Select control = L: clocks can occur simultaneously.
H = HIGH Voltage Level; L = LOW Voltage Level; X = Immaterial; ⇑ = LOW-to-HIGH Transition
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC
Supply Voltage
Vin, Vout
DC Input Voltage, Output Voltage (Ref. to GND)
tr, tf
Input Rise and Fall Time (Note 1)
′AC Devices except Schmitt Inputs
tr, tf
Input Rise and Fall Time (Note 2)
′ACT Devices except Schmitt Inputs
TJ
Junction Temperature (PDIP)
TA
Operating Ambient Temperature Range
IOH
IOL
Min
Typ
Min
′AC
2.0
5.0
6.0
′ACT
4.5
5.0
5.5
0
VCC
VCC @ 3.0 V
150
VCC @ 4.5 V
40
VCC @ 5.5 V
25
VCC @ 4.5 V
10
VCC @ 5.5 V
8.0
Unit
V
V
ns/V
ns/V
140
°C
85
°C
Output Current — HIGH
–24
mA
Output Current — LOW
24
mA
–40
1. Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
FACT DATA
5-3
25
MC74AC652 MC74ACT652
DC CHARACTERISTICS
Symbol
Parameter
VCC
(V)
74AC
74AC
TA = +25°C
TA =
–40°C to +85°C
Typ
VIH
VIL
VOH
Guaranteed Limits
3.0
4.5
5.5
1.5
2.25
2.75
2.1
3.15
3.85
2.1
3.15
3.85
V
VOUT = 0.1 V
or VCC – 0.1 V
Maximum Low Level
Input Voltage
3.0
4.5
5.5
1.5
2.25
2.75
0.9
1.35
1.65
0.9
1.35
1.65
V
VOUT = 0.1 V
or VCC – 0.1 V
Minimum High Level
Output Voltage
3.0
4.5
5.5
2.99
4.49
5.49
2.9
4.4
5.4
2.9
4.4
5.4
V
2.56
3.86
4.86
2.46
3.76
4.76
0.1
0.1
0.1
0.1
0.1
0.1
3.0
4.5
5.5
0.36
0.36
0.36
0.44
0.44
0.44
5.5
±0.1
5.5
±0.6
Minimum Low Level
Output Voltage
IIN
Maximum Input
Leakage Current
IOZT
Maximum
3-State
3.0
4.5
5.5
0.002
0.001
0.001
IOUT = – 50 µA
V
IOHD
ICC
†Minimum Dynamic
Output Current
Maximum Quiescent
Supply Current
*VIN = VIL or VIH
– 12 mA
IOH
– 24 mA
– 24 mA
IOUT = 50 µA
V
V
*VIN = VIL or VIH
12 mA
IOL
24 mA
24 mA
±1.0
µA
VI = VCC, GND
±6.0
µA
VI (OE) = VIL, VIH
VI = VCC, GND
VO= VCC, GND
5.5
75
mA
VOLD = 1.65 V Max
5.5
–75
mA
VOHD = 3.85 V Min
80
µA
VIN = VCC or GND
Current
IOLD
Conditions
Minimum High Level
Input Voltage
3.0
4.5
5.5
VOL
Unit
5.5
8.0
* All outputs loaded; thresholds on input associated with output under test.
† Maximum test duration 2.0 ms, one input loaded at a time.
Note: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V.
FACT DATA
5-4
MC74AC652 MC74ACT652
AC CHARACTERISTICS
Symbol
VCC*
(V)
Parameter
74AC
74AC
TA = +25°C
CL = 50 pF
TA = –40°C
to +85°C
CL = 50 pF
Min
Max
Min
Max
Unit
tPLH
Propagation Delay
CPBA or CPAB to An or Bn
3.0
5.0
4.0
2.5
17.0
12.0
3.0
2.0
19.0
14.0
ns
tPHL
Propagation Delay
CPBA or CPAB to An or Bn
3.0
5.0
3.0
2.0
14.5
10.5
2.5
1.5
16.5
12.0
ns
tPLH
Propagation Delay
A or B to Bn or An
3.0
5.0
3.0
2.0
14.0
9.5
2.5
1.5
16.0
11.0
ns
tPHL
Propagation Delay
A or B to Bn or An
3.0
5.0
2.5
1.5
13.0
9.0
2.0
1.0
15.0
10.5
ns
tPLH
Propagation Delay
SBA or SAB to An or Bn
3.0
5.0
3.0
2.5
14.0
10.0
2.5
2.0
16.0
11.5
ns
tPHL
Propagation Delay
SBA or SAB to An or Bn
3.0
5.0
2.5
2.0
13.5
10.0
2.0
1.5
15.5
11.5
ns
tPZH
Output Enable Time
OEBA to An
3.0
5.0
2.5
1.5
12.0
9.0
2.0
1.0
13.5
10.0
ns
tPZL
Output Enable Time
OEBA to An
3.0
5.0
2.5
1.5
12.0
9.0
2.0
1.0
14.0
10.5
ns
tPHZ
Output Disable Time
OEBA to An
3.0
5.0
3.0
2.0
13.0
11.0
2.5
1.5
14.0
12.0
ns
tPLZ
Output Disable Time
OEBA to An
3.0
5.0
2.5
2.0
12.5
10.5
2.0
1.5
14.0
12.0
ns
* Voltage Range 3.3 V is 3.3 V ±0.3 V.
Voltage Range 5.0 V is 5.0 V ±0.5 V.
FACT DATA
5-5
MC74AC652 MC74ACT652
DC CHARACTERISTICS
Symbol
Parameter
VCC
(V)
74ACT
74ACT
TA = +25°C
TA =
–40°C to +85°C
Typ
Guaranteed Limits
Unit
Conditions
VIH
Minimum High Level
Input Voltage
4.5
5.5
1.5
1.5
2.0
2.0
2.0
2.0
V
VOUT = 0.1 V
or VCC – 0.1 V
VIL
Maximum Low Level
Input Voltage
4.5
5.5
1.5
1.5
0.8
0.8
0.8
0.8
V
VOUT = 0.1 V
or VCC – 0.1 V
VOH
Minimum High Level
Output Voltage
4.5
5.5
4.49
5.49
4.4
5.4
4.4
5.4
V
3.86
4.86
3.76
4.76
0.1
0.1
0.1
0.1
4.5
5.5
0.36
0.36
0.44
0.44
V
*VIN = VIL or VIH
– 24 mA
IOH
– 24 mA
±0.1
±1.0
µA
VI = VCC, GND
1.5
mA
VI = VCC – 2.1 V
±6.0
µA
VI (OE) = VIL, VIH
VI = VCC, GND
VO = VCC, GND
5.5
75
mA
VOLD = 1.65 V Max
5.5
–75
mA
VOHD = 3.85 V Min
80
µA
VIN = VCC or GND
4.5
5.5
VOL
Minimum Low Level
Output Voltage
4.5
5.5
IIN
Maximum Input
Leakage Current
5.5
∆ICCT
Additional Max. ICC/Input
5.5
IOZT
Maximum
3-State
5.5
0.001
0.001
0.6
±0.6
V
V
Current
IOLD
IOHD
ICC
†Minimum Dynamic
Output Current
Maximum Quiescent
Supply Current
5.5
8.0
* All outputs loaded; thresholds on input associated with output under test.
† Maximum test duration 2.0 ms, one input loaded at a time.
FACT DATA
5-6
IOUT = – 50 µA
*VIN = VIL or VIH
– 24 mA
IOH
– 24 mA
IOUT = – 50 µA
MC74AC652 MC74ACT652
AC CHARACTERISTICS
Symbol
VCC*
(V)
Parameter
74ACT
74ACT
TA = +25°C
CL = 50 pF
TA = –40°C
to +85°C
CL = 50 pF
Min
Max
Min
Max
Unit
tPLH
Propagation Delay
CPBA or CPAB to An or Bn
5.0
4.0
14.5
3.5
16.5
ns
tPHL
Propagation Delay
CPBA or CPAB to An or Bn
5.0
3.5
14.5
3.0
16.5
ns
tPLH
Propagation Delay
A or B to Bn or An
5.0
2.5
11.5
2.0
13.0
ns
tPHL
Propagation Delay
A or B to Bn or An
5.0
2.5
11.5
2.0
13.0
ns
tPLH
Propagation Delay
SBA or SAB to An or Bn
5.0
2.5
12.0
2.0
13.5
ns
tPHL
Propagation Delay
SBA or SAB to An or Bn
5.0
3.0
12.0
2.5
13.5
ns
tPZH
Output Enable Time
OEBA to An
5.0
2.0
11.5
1.5
13.0
ns
tPZL
Output Enable Time
OEBA to An
5.0
2.5
11.5
2.0
13.0
ns
tPHZ
Output Disable Time
OEBA to An
5.0
3.0
13.0
2.5
14.0
ns
tPLZ
Output Disable Time
OEBA to An
5.0
2.5
12.5
2.0
14.0
ns
tPZH
Output Enable time
OEAB to Bn
5.0
2.5
12.0
2.0
13.5
ns
tPZL
Output Enable Time
OEAB to Bn
5.0
2.5
12.0
2.0
13.5
ns
tPHZ
Output Enable Time
OEAB to Bn
5.0
3.5
13.5
3.0
14.5
ns
tPLZ
Output Enable Time
OEAB to Bn
5.0
3.0
13.5
2.5
15.0
ns
ts
Setup Time, HIGH or LOW
An or Bn to CPBA or CPAB
5.0
7.0
8.0
ns
th
Hold Time, HIGH or LOW
An or Bn to CPBA or CPAB
5.0
2.5
2.5
ns
tw
CPAB, CPBA Pulse Width
HIGH or LOW
5.0
6.0
7.0
ns
* Voltage Range 3.3 V is 3.3 V ±0.3 V.
Voltage Range 5.0 V is 5.0 V ±0.5 V.
CAPACITANCE
Symbol
Parameter
74ACT
Typ
Unit
Test Conditions
CIN
Input Capacitance
4.5
pF
VCC = 5.0 V
CI/O
Input/Output Capacitance
15
pF
VCC = 5.0 V
CPD
Power Dissipation Capacitance
60.0
pF
VCC = 5.0 V
FACT DATA
5-7
MC74AC652 MC74ACT652
OUTLINE DIMENSIONS
N SUFFIX
PLASTIC DIP PACKAGE
CASE 724–03
ISSUE D
–A–
24
13
1
12
NOTES:
1. CHAMFERED CONTOUR OPTIONAL.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
4. CONTROLLING DIMENSION: INCH.
–B–
L
C
–T–
NOTE 1
K
SEATING
PLANE
N
E
G
M
J
F
D
24 PL
0.25 (0.010)
24 PL
0.25 (0.010)
T A
M
M
T B
M
24
12X
P
0.010 (0.25)
1
M
B
M
12
D
J
0.010 (0.25)
M
T A
S
B
S
F
R
C
–T–
M
22X
MILLIMETERS
MIN
MAX
31.25
32.13
6.35
6.85
3.69
4.44
0.38
0.51
1.27 BSC
1.02
1.52
2.54 BSC
0.18
0.30
2.80
3.55
7.62 BSC
0_
15_
0.51
1.01
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN
EXCESS OF D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
13
–B–
SEATING
PLANE
INCHES
MIN
MAX
1.230
1.265
0.250
0.270
0.145
0.175
0.015
0.020
0.050 BSC
0.040
0.060
0.100 BSC
0.007
0.012
0.110
0.140
0.300 BSC
0_
15_
0.020
0.040
DW SUFFIX
PLASTIC SOIC PACKAGE
CASE 751E–04
ISSUE E
–A–
24X
M
DIM
A
B
C
D
E
F
G
J
K
L
M
N
K
G
X 45 _
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
15.25
15.54
7.40
7.60
2.35
2.65
0.35
0.49
0.41
0.90
1.27 BSC
0.23
0.32
0.13
0.29
0_
8_
10.05
10.55
0.25
0.75
INCHES
MIN
MAX
0.601
0.612
0.292
0.299
0.093
0.104
0.014
0.019
0.016
0.035
0.050 BSC
0.009
0.013
0.005
0.011
0_
8_
0.395
0.415
0.010
0.029
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P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447
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◊
FACT DATA
5-8
*MC74AC652/D*
MC74AC652/D
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